GT Verif 2018
28 - 30 mai 2018
  
      Les journées du GT-Vérif visent à rassembler la communauté française en vérification formelle, et en particulier les chercheurs juniors, doctorants et post-doctorants, avec pour objectif de favoriser les collaborations, l’ouverture sur des thématiques liées à la vérification, et pourquoi pas préparer de futures visites de doctorant(e)s.
View online : GT Verif 2018
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      - 20 years of Verimag, September
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- RESSI 2017 : les Rendez-vous
 
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-  Conferences  
          - November 24-28 2025 Synchron 2025
 
Seminars
- Seminars  
      - 13 November 2025 Yann Herklotz: Towards scalable verification and efficient hardware generation using verified (…)
- 25 November 2025 Véronique Cortier: Electronic voting: design, attack, and formal verification
- 1 December 2025 Sylvain Boulme: Introduction à la programmation orientée objet en crystal
- 4 December 2025 Jannik Laval: A venir (thème cybersécu)
- 11 December 2025 Thaïs Baudon: A venir (thème: compilation optimisant les représentations mémoire)
- 18 December 2025 Jérémie Decouchant: A venir (theme cybersecu)
 
New publications
-    Some Recent Publications   
      
   
           
     
      
     
           
     
           
      
     
           
     
           
      
     
           
     
           
      
     
           
     
   
    
   
      
   - Bruno Ferres, Oussama Oulkaid, Matthieu Moy, Gabriel Radanne, Ludovic Henrio, Pascal Raymond, Mehdi Khosravian: A Survey on Transistor-Level Electrical Rule Checking of Integrated Circuits
- Karine Altisen, Marius Bozga: Revisited Convergence of a Self-stabilizing BFS Spanning Tree Algorithm
- Marius Bozga, Radu Iosif, Arnaud Sangnier, Neven Villani: Counting Abstraction and Decidability for the Verification of Structured Parameterized Networks
- Marius Bozga, Radu Iosif, Florian Zuleger: Regular Grammars for Sets of Graphs of Tree-Width 2
 
Jobs and internships
-  Jobs and internships  
 - [Funded PhD] Fault Injection Attacks: Automated Analysis of Counter-Measures At The Binary Level
- [Master] Decision Procedure for Equivalence Relations
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
 
 
    
   