Publications

Maiza, C. (2023) Hardware and software analyses for precise and efficient timing analysis, PhD thesis. Univ. Grenoble Alpes Available at: https://hal.science/tel-04741877.

Dupont De Dinechin, M., Schuh, M., Moy, M., and Maiza, C. (2020) Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems. In: DATE 2020 - Design, Automation and Test in Europe Conference. Grenoble, France Available at: https://hal.archives-ouvertes.fr/hal-02431273.

Schuh, M., Maiza, C., Goossens, J., Raymond, P., and Dinechin, B. (2020) A study of predictable execution models implementation for industrial data-flow applications on a multi-core platform with shared banked memory. In: RTSS 2020, Real-Time Systems Symposium. Available at: https://hal.science/hal-03185800v1.

Maiza, C., Rihani, H., Rivas, J. M., Goossens, J., Altmeyer, S., and Davis, R. I. (2019) A survey of timing verification techniques for multi-core real-time systems. ACM Comput. Surv. 52, (3) 56:1–56:38. https://doi.org/10.1145/3323212

Raymond, P., Maiza, C., Parent-Vigouroux, C., Jahier, E., Halbwachs, N., Carrier, F., Asavoae, M., and Boutonnet, R. (2019) Improving WCET evaluation using linear relation analysis. Leibniz Transactions on Embedded Systems 6, (1) 02–1–02:28. https://doi.org/10.4230/LITES-v006-i001-a002

Touzeau, V., Maiza, C., Monniaux, D., and Reineke, J. (2019) Fast and exact analysis for lru caches. Proc. ACM Program. Lang. 3 54:1–54:29. https://doi.org/10.1145/3290367

Davis, R. I., Altmeyer, S., Indrusiak, L., Maiza, C., Nelis, V., and Reineke, J. (2018) An extensible framework for multicore response time analysis. Real-Time Systems 54, (3) 607–661. Available at: http://rdcu.be/uhBR.

Phavorin, G., Richard, P., Goossens, J., Maiza, C., George, L., and Chapeaux, T. (2018) Online and offline scheduling with cache-related preemption delays. Real-Time Systems 54, (3) 662–699

Maiza, C., Raymond, P., Parent-Vigouroux, C., Bonenfant, A., Carrier, F., Cassé, H., Cuenot, P., Claraz, D., Halbwachs, N., Jahier, E., Li, H., Michiel, M. de, Mussot, V., Puaut, I., Rochange, C., Rohou, E., Ruiz, J., Sotin, P., and Sun, W.-T. (2017) The w-sept project: Towards semantic-aware wcet estimation. In: Reineke, J. (ed.) 17th International Workshop on Worst-Case Execution Time Analysis (Wcet 2017) Vol. 57. Dagstuhl, Germany: Schloss Dagstuhl–Leibniz-Zentrum fuer Informatik https://doi.org/10.4230/OASIcs.WCET.2017.9

Touzeau, V., Maiza, C., Monniaux, D., and Reineke, J. (2017) Ascertaining uncertainty for efficient exact cache analysis. In: Rupak Majumdar, V. K. (ed.) Computer Aided Verification - 29th International Conference Vol. 10427. Heidelberg, France: Rupak Majumdar and Viktor Kuncak; Springer https://doi.org/10.1145/216585.216588

Bonenfant, A., Carrier, F., Cassé, H., Cuenot, P., Claraz, D., Halbwachs, N., Li, H., Maiza, C., De Michiel, M., Mussot, V., Parent-Vigouroux, C., Puaut, I., Raymond, P., Rohou, E., and Sotin, P. (2016) When the worst-case execution time estimation gains from the application semantics. In: 8th European Congress on Embedded Real-Time Software and Systems. Toulouse, France Available at: https://hal.inria.fr/hal-01235781.

Goossens, J., and Maiza, C. (2016) Guest editorial - RTNS 2014. Real-Time Systems 52, (2) 123–124

Rihani, H., Maiza, C., and Moy, M. (2016) Efficient Execution of Dependent Tasks on Many-Core Processors. In: RTSOPS 2016. Toulouse, France

Rihani, H., Moy, M., Maiza, C., Davis, R. I., and Altmeyer, S. (2016) Response Time Analysis of Synchronous Data Flow Programs on a Many-Core Processor. In: RTNS 2016. Brest, France https://doi.org/10.1145/2997465.2997472

Touzeau, V., Maiza, C., and Monniaux, D. (2016) Model checking of cache for WCET analysis refinement. In: 10th Junior Researcher Workshop on Real-Time Computing. Available at: http://jrwrtc2016.gforge.inria.fr/docs/JRWRTC16_proceedings.pdf.

Altmeyer, S., Davis, R. I., Indrusiak, L., Maiza, C., Nelis, V., and Reineke, J. (2015) A generic and compositional framework for multicore response time analysis. In: Proceedings of the 23rd International Conference on Real-Time Networks and Systems (Rtns 2015)

Altmeyer, S., Lisper, B., Maiza, C., Reineke, J., and Rochange, C. (2015) WCET and mixed-criticality: What does confidence in WCET estimations depend upon? In: 15th International Workshop on Worst-Case Execution Time Analysis, WCET 2015, July 7, 2015, Lund, Sweden. https://doi.org/10.4230/OASIcs.WCET.2015.65

Phavorin, G., Richard, P., Goossens, J., Chapeaux, T., and Maiza, C. (2015) Scheduling with preemption delays: Anomalies and issues. In: Proceedings of the 23rd International Conference on Real Time and Networks Systems. New York, NY, USA: ACM

Phavorin, G., Richard, P., and Maiza, C. (2015) Complexity of scheduling real-time tasks subjected to cache-related preemption delays. In: Emerging Technologies Factory Automation (Etfa), 2015 Ieee 20th Conference on

Raymond, P., Maiza, C., Parent-Vigouroux, C., Carrier, F., and Asavoae, M. (2015) Timing analysis enhancement for synchronous program. Real-Time Systems 1–29. https://doi.org/10.1007/s11241-015-9219-y

Rihani, H., Moy, M., Maiza, C., and Altmeyer, S. (2015) WCET analysis in shared resources real-time systems with TDMA buses. In: RTNS 2015. Lille, France https://doi.org/10.1145/2834848.2834871

Cassé, H., Maiza, C., Parent-Vigouroux, C. and, and Raymond, P. (2014) Schedulability and modular analysis: How to fit timing model? In: OPRTC. Available at: http://www-verimag.imag.fr/PUBLIS/uploads/elvyt3392.pdf.

Henry, J., Asavoae, M., Monniaux, D., and Maiza, C. (2014) How to compute worst-case execution time by optimization modulo theory and a clever encoding of program semantics. In: SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2014, LCTES ’14. https://doi.org/10.1145/2597809.2597817

Jan, M., Hedia, B. B., Goossens, J., and Maiza, C. eds. (2014) 22nd international conference on real-time networks and systems, RTNS ’14, versaille, france, october 8-10, 2014. ACM

Maiza, C., Rochange, C., and Raymond, P. (2014a) Estimation de temps d’exécution et délais. In: Chetto, M. (ed.) Ordonnancement Dans Les Systèmes Temps Réel. ISTE editions

Maiza, C., Rochange, C., and Raymond, P. (2014b) Estimation of execution time and delays. In: Chetto, M. (ed.) Real-Time Systems Scheduling 1. ISTE editions Available at: http://www.iste.co.uk/index.php?p=a&ACTION=View&id=744.

Raymond, P., Maiza, C., Parent-Vigouroux, C., Carrier, F., and Asavoae, M. (2014) Timing analysis enhancement for synchronous program. In: Workshop on Reconciling Performance and Predictability (Repp). Available at: http://www-verimag.imag.fr/PUBLIS/uploads/kihec5769.pdf.

Reineke, J., Altmeyer, S., Grund, D., Hahn, S., and Maiza, C. (2014) Selfish-lru: Preemption-aware caching for predictability and performance. In: Proceedings of the 20th Real-Time and Embedded Technology and Applications Symposium (Rtas’14). Available at: http://www-verimag.imag.fr/PUBLIS/uploads/bknlq1625.pdf.

Asavoae, M., Maiza, C., and Raymond, P. (2013) Program semantics in model-based wcet analysis: A state of the art perspective. In: Maiza, C. (ed.) 13th International Workshop on Worst-Case Execution Time Analysis, Wcet 2013, July 9, 2013, Paris, France Vol. 30. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik Available at: http://www-verimag.imag.fr/PUBLIS/uploads/rhdhu7986.pdf.

Davis, R. I., Santinelli, L., Altmeyer, S., Maiza, C., and Cucu-Grosjean, L. (2013) Analysis of Probabilistic Cache Related Pre-emption Delays. In: 25th Euromicro Conference on Real-Time Systems (ECRTS 2013)

Lunniss, W., Altmeyer, S., Maiza, C., and Davis, R. I. (2013) Integrating cache related pre-emption delay analysis into edf scheduling. In: 19th Ieee Real-Time and Embedded Technology and Applications Symposium, Rtas 2013, Philadelphia, Pa, Usa, April 9-11, 2013. IEEE Computer Society

Raymond, P., Maiza, C., Parent-Vigouroux, C., and Carrier, F. (2013) Timing analysis enhancement for synchronous program. In: RTNS. Available at: http://www-verimag.imag.fr/PUBLIS/uploads/ovcuf5189.pdf.

Altmeyer, S., Davis, R. I., and Maiza, C. (2012) Improved cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems. Real-Time Systems 48, (5) 499–526. https://doi.org/DOI: 10.1007/s11241-012-9152-2

Whitham, J., Davis, R. I., Audsley, N. C., Altmeyer, S., and Maiza, C. (2012) Investigation of Scratchpad Memory for Preemptive Multitasking. In: RTSS

Altmeyer, S., Davis, R. I., and Maiza, C. (2011a) Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems. In: Proceedings of the 32nd Ieee Real-Time Systems Symposium (Rtss)

Altmeyer, S., Davis, R. I., and Maiza, C. (2011b) Pre-emption cost aware response time analysis for fixed priority pre-emptive systems. University of York, Department of Computer Science Available at: http://www.cs.york.ac.uk/ftpdir/reports/2011/YCS/464/YCS-2011-464.pdf.

Maiza, C., and Rochange, C. (2011a) A framework for the timing analysis of dynamic branch predictors. In: Proceedings of the 19th International Conference on Real-Time and Network Systems (Rtns2011). Available at: http://www-verimag.imag.fr/PUBLIS/uploads/smcbu8095.pdf.

Maiza, C., and Rochange, C. (2011b) A framework for the timing analysis of dynamic branch predictors. IRIT Available at: http://www-verimag.imag.fr/PUBLIS/uploads/zdmwc1034.pdf.

Altmeyer, S., and Maiza, C. (2010) Cache-related preemption delay via useful cache blocks: Survey and redefinition. Journal of Systems Architecture 57 707–719. https://doi.org/10.1016/j.sysarc.2010.08.006

Altmeyer, S., Maiza, C., and Reineke, J. (2010) Resilience analysis: Tightening the crpd bound for set-associative caches. In: LCTES ’10: Proceedings of the Acm Sigplan/Sigbed 2010 Conference on Languages, Compilers, and Tools for Embedded Systems. New York, NY, USA: ACM https://doi.org/10.1145/1755888.1755911

Altmeyer, S., and Maiza-Burguière, C. (2010) Influence of the task model on the precision of scheduling analysis for preemptive systems. In: Fisher, N. and Davis, R. I. (eds.) Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar

Cullmann, C., Ferdinand, C., Gebhard, G., Grund, D., Maiza, C., Reineke, J., Triquet, B., and Wilhelm, R. (2010) Predictability considerations in the design of multi-core embedded systems. In: Proceedings of Embedded Real Time Software and Systems

Wilhelm, R., Altmeyer, S., Maiza-Burguière, C., Grund, D., Herter, J., Reineke, J., Wachter, B., and Wilhelm, S. (2010) Static timing analysis for hard real-time systems. In: VMCAI. Springer Verlag https://doi.org/10.1007/978-3-642-11319-2_3

Altmeyer, S., and Maiza-Burguière, C. (2009) A new notion of useful cache block to improve the bounds of cache-related preemption delay. In: Proceedings of the 21st Euromicro Conference on Real-Time Systems (Ecrts ’09). IEEE Computer Society https://doi.org/10.1109/ECRTS.2009.21

Altmeyer, S., Maiza-Burguière, C., and Wilhelm, R. (2009) Computing the maximum blocking time for scheduling with deferred preemption. In: Workshop on Software Technologies for Future Dependable Distributed Systems. https://doi.org/10.1109/STFSSD.2009.12

Maiza-Burguière, C., Reineke, J., and Altmeyer, S. (2009) Cache-related preemption delay computation for set-associative caches—pitfalls and solutions. In: Proceedings of 9th International Workshop on Worst-Case Execution Time (WCET) Analysis. Available at: http://drops.dagstuhl.de/opus/volltexte/2009/2285/pdf/Burguiere.2285.pdf.

Maiza-Burguière, C. (2008) Modeliser la prediction de branchement pour le calcul de temps d’execution pire-cas, PhD thesis. Universite Paul Sabatier - Toulouse 3 Available at: http://thesesups.ups-tlse.fr/383/1/Burguiere_Claire.pdf.

Maiza-Burguière, C., and Rochange, C. (2007) On the complexity of modeling dynamic branch predictors when computing worst-case execution time. In: Proceedings of the ERCIM/DECOS Workshop on Dependable Embedded Systems. Available at: ftp://ftp.irit.fr/IRIT/TRACES/8158_ercim.pdf.

Maiza-Burguière, C., and Rochange, C. (2006) History-based schemes and implicit path enumeration. In: Proceedings of the 6th International Workshop on Worst-Case Execution Time (WCET) Analysis. Available at: http://drops.dagstuhl.de/opus/volltexte/2006/670/pdf/WCET_Burguiere.670.pdf.

Maiza-Burguière, C., and Rochange, C. (2005a) A contribution to branch prediction modeling in wcet analysis. In: Proceedings of the Conference on Design, Automation and Test in Europe (Date’05) Vol. 1. https://doi.org/10.1109/DATE.2005.7

Maiza-Burguière, C., and Rochange, C. (2005b) Modelisation d’un predicteur de branchement bimodal dans le calcul du wcet par la methode ipet. In: Proceedings of the Conference on Real-Time Systems (Rts’05). Available at: ftp://ftp.irit.fr/IRIT/TRACES/5336_rts05.pdf.

Maiza-Burguière, C., Rochange, C., and Pascal, S. (2005) A case for static branch prediction modeling in real-time systems. In: Proceedings of the 11th Ieee International Conference on Embedded and Real-Time Computing Systems and Applications (Rtcsa’05). https://doi.org/10.1109/RTCSA.2005.5