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VERIMAG + STMicroelectronics common projects [2002...[
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SYNCHRON
SLAP and SLA++P
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Quelques Publications Récentes
David Monniaux, Sylvain Boulmé:
Chamois: agile development of CompCert extensions for optimization and security
Basile Pesin, Sylvain Boulmé, David Monniaux, Marie-Laure Potet:
Formally Verified Hardening of C Programs against Hardware Fault Injection
Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne:
A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes:
Self-stabilizing synchronous unison in directed networks
Offres d'emploi et stages
Offres d'emploi et stages
[Professeur] Université Grenoble Alpes
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Towards New Frontiers in Multi-Core Response Time Analysis ?
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
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