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[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Masters
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
Emplois et stages à Verimag
Nouvelles publications
Quelques Publications Récentes (Ressources Partagées)
Karine Altisen, Stéphane Devismes, Anaïs Durand, Colette Johnen, Franck Petit:
Self-stabilizing Systems in Spite of High Dynamics
Léo Gourdin:
Lazy Code Transformations in a Formally Verified Compiler
Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes:
Pour battre à l'unisson, il faut que tous les chemins viennent de Rome
Erwan Jahier, Karine Altisen, Stéphane Devismes:
Exploring Worst Cases of Self-stabilizing Algorithms using Simulations
Karine Altisen, Pierre Corbineau, Stéphane Devismes:
Certification of an exact worst-case self-stabilization time
Cyril Six, Léo Gourdin, Sylvain Boulmé, David Monniaux, Justus Fasse, Nicolas Nardino:
Formally Verified Superblock Scheduling
Léo Gourdin, Benjamin Bonneau, Sylvain Boulmé, David Monniaux, Alexandre Bérard:
Formally Verifying Optimizations with Block Simulations
Karine Altisen, Stéphane Devismes, Erwan Jahier:
sasa: a SimulAtor of Self-stabilizing Algorithms
Offres d'emploi et stages
Offres d'emploi et stages (Ressources Partagées)
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
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