Publications related to the project
- Co-Simulation of Functional SystemC/TLM Models with Power/Thermal Solvers. Bouhadiba, T. and Moy, M. and Maraninchi, F. and Cornet, J. and Maillet-Contoz, L. and Materic, I, Workshop on Virtual Prototyping of Parallel and Embedded Systems 2013 (ViPES’2013). online.
- System-Level Modeling of Energy in TLM for Early Validation of Power and Thermal Management. Tayeb Bouhadiba, Matthieu Moy, Florence Maraninchi - Design Automation and Test Europe (DATE) 2013. Complete reference
- Combining SystemC, IP-XACT and UML-MARTE in model-based SoC design. Jean-François Le Tallec, Julien DeAntoni, Robert de Simone, Benoît Ferrero, Frédéric Mallet, Laurent Maillet-Contoz. In Proc. of the 2011 Workshop on Model Based Engineering for Embedded Systems Design, M-BED’2011, to appear, Grenoble, France, March 2011. Complete reference
- Modeling of Time in Discrete-Event Simulation of Systems-on-Chip. Giovanni Funchal, Matthieu Moy. In Proc. of the 9th ACM/IEEE International Conference on Formal Methods and Models for Codesign MEMOCODE’2011, Cambridge, UK. Complete reference
- A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts. . Ons Mbarek, Alain Pegatoquet, Michel Auguin. PATMOS 2011.
- Co-simulation of a SystemC TLM virtual platform with a Power Simulator at the architectural level: Case of a Set Top Box. J. Cornet, L. Maillet-Contoz (ST Grenoble), I. Materic, S. Kaiser, H. Bousseta (DOCEA Power), T. Bouhadiba, M. Moy, F. Maraninchi (VERIMAG). User Track at the 2012 Design Automation Conference (DAC), San Francisco, USA, June 2012.
- A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts. Ons Mbarek, Alain Pegatoquet, Michel Auguin. PATMOS 2011. Madrid, Spain, September 26 - 29, 2011.
- Nouvelle Approche pour l’Estimation et le Controle d’Energie d’un Composant au Niveau Transactionnel, O. Mbarek, A. Pegatoquet, M. Auguin, LEAT, Colloque National GDR SOC SIP, Juin 2010 CERGY. online
- Using Model Driven Engineering to Reliably Accelerate Early Low Power Intent Exploration for a System-on-Chip Design O. Mbarek, A. Khecharem, A. Pegatoquet, M. Auguin, 27th Symposium On Applied Computing, Riva del Garda (Trento), Italy, March 26-30, 2012
- Using UPF Standard Concepts for Power-Aware Design and Verification of Systems-on-Chip at Transaction-Level. Ons Mbarek, Alain Pegatoquet, Michel Auguin. IET Circuits, Devices & Systems. to appear.
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