ANR Arpege HELP 2009-2012

HELP Presentation Poster

Florence Maraninchi — 2013-08-26T14:07:17Z

A general overview of the objectives and results. - General Presentation

Approach & Results

Florence Maraninchi — 2011-02-03T10:38:47Z

The HELP approach consists in: Studying power architectures and the standard formats used to specify them (e.g., UPF) Proposing systematic principles for the instrumentation of a SystemC/TLM functional and timed model with energy consumption information (in the form of power-state automata, or traffic-related information); the instrumentation is used for the simulation of non-functional properties (energy consumption and temperture); it may also include contracts about the way the (...) - Results

Intranet (members only)

Florence Maraninchi — 2010-01-28T08:04:12Z

- Documents

Publications related to the project

Florence Maraninchi — 2010-01-27T16:03:21Z

Co-Simulation of Functional SystemC/TLM Models with Power/Thermal Solvers. Bouhadiba, T. and Moy, M. and Maraninchi, F. and Cornet, J. and Maillet-Contoz, L. and Materic, I, Workshop on Virtual Prototyping of Parallel and Embedded Systems 2013 (ViPES'2013). online. System-Level Modeling of Energy in TLM for Early Validation of Power and Thermal Management. Tayeb Bouhadiba, Matthieu Moy, Florence Maraninchi - Design Automation and Test Europe (DATE) 2013. Complete reference Combining (...) - Publications

Related Projects

Florence Maraninchi — 2010-01-21T21:03:17Z

ANR ARESA and ARESA2: part of these projects is devoted to the global (and formal) modeling of energy consumption in sensor networks. In ARESA2, this topic is related to the security aspects. Minalogic openTLM 2006-2010: open tools for the transaction-level modeling of systems-on-a-chip. ANR FoToVP 2006-2009: one of the topics is the extraction of formal models from engineering languages (like SystemC); another topic is the use of analytical models (e.g., the real-time calculus) for (...) - Documents

The proposal

Florence Maraninchi — 2010-01-21T20:57:49Z

State of the Art The focus of research on design of large hardware circuits and Systems-on-Chips has shifted from Register-Transfer Level (RTL) to Electronic System Level (ESL). ESL in fact consists of a multiplicity of sublevels, depending more and less on extra-functional features such as approximate timing. The most famous modeling formalism for ESL design is named SystemC (see the official OSCI site). Defining clear levels for component descriptions allow to devise a platform-based (...) - Documents

HELP: an Overview

Florence Maraninchi — 2010-01-21T14:26:36Z

Overview of the context and objectives of the project.

- General Presentation / Editorial, page_accueil