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Ongoing Phd Thesis
Ongoing Phd Thesis
Thomas Mari
(2019 - 2024)
Aina Rasoldier
(2020 - 2024)
Ihab Alshaer
(2020 - 2024)
Thomas Vigouroux
(2021 - 2024)
Lucas Bueri
(2021 - 2024)
Bob Aubouin-Pairault
(2021 - 2024)
Hadi Dayekh
(2021 - 2024)
Alban Reynaud Michez
(2022 - 2025)
Oussama Oulkaid
(2022 - 2025)
Ana Maria Gomez Ruiz
(2022 - 2025)
Weicheng He
(2023 - 2026)
Benjamin Bonneau
(2023 - 2026)
Alexandre Berard
(2023 - 2026)
Baptiste De Goër De Herve
(2023 - 2026)
Basile Gros
(2023 - 2026)
News
NEWS
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
Junior research professorship on cybersecurity at the software-hardware boundary
Seminars
Seminars
4 April 2024
Sébastien Michelland:
Abstract interpreters: a monadic approach to modular verification
11 April 2024
Andrei Paskevich:
Tba
New publications
Some Recent Publications
Dominique Larchey-Wendling, Jean-François Monin:
Proof Pearl: Faithful Computation and Extraction of \mu-Recursive Algorithms in Coq
Joseph Sifakis:
Testing System Intelligence
Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton:
Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
Karine Altisen, Pierre Corbineau, Stéphane Devismes:
Certified Round Complexity of Self-Stabilizing Algorithms
Jobs and internships
Jobs and internships
[Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
PERSYVAL Master 2 Scholarships
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
[L3/M1] Theory and Practice of Vectorial Extension for Stream Processing
[Master] Modeling and Characterizing Fault Attacks exploiting the Memory Architecture
[Master] Proved-Secure Compilation for RISC-V Processor
[Master] A Solver for Monadic Second Order Logic of Graphs of Bounded Tree-width
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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