Related Lab Topic :
PhD
Basile Gros
is preparing a PhD thesis in Verimag
from October 2023
to September 2026,
under the supervision of
Jean-François Monin
Related Lab Topic :FormalProofs
Related Lab Topic :
Browsing
News
Seminars
- Seminars
- 28 November 2024 Grégoire Bussone: Reducing copies and memory consumption in synchronous languages
- 2 December 2024 Thomas Vigouroux: Quantitative analysis for adaptive attackers (Phd)
- 12 December 2024 Lucas Bueri: Tba (Phd)
- 12 December 2024 Bob Aubouin-pairault: (Phd)
New publications
- Some Recent Publications
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing Synchronous Unison in Directed Networks
- Claire Maiza: Hardware and software analyses for precise and efficient timing analysis
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- Marius Bozga, Radu Iosif, Joseph Sifakis: Verification of component-based systems with recursive architectures
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences