Engineer position at Verimag: Modeling Power-Consumption of Systems-on-a-Chip in SystemC/TLM
Note: a postdoc position on the same project is also open. See this page.
Scientific Context
Transaction-Level Modeling of Systems-on-a-Chip:
The silicon industry is widely adopting a methodology called Transaction-Level Modeling (TLM), that consists essentially in writting abstract, but yet executable models the hardware contained in a Chip.
SystemC is a C++ library used for the description of SoCs at different levels of abstraction, including TLM. It comes with a simulation environment, and became a standard (IEEE 1666). SystemC offers a set of primitives for the description of parallel activities representing the physical parallelism of the hardware blocks. The TLM level of abstraction can be described with SystemC.
Power consumption:
The need for low-power systems is now well admitted, in the domain of embedded systems in general. This is particularly true for sensor networks or consumer electronics (mobile phones and all kinds of portable devices), because of lifetime constraints. But this is also true for other (non autonomous) embedded systems, in a world concerned with sustainable development.
Evaluating power-consumption early in the design flow, and therefore at a high level of abstraction such as TLM, is one of the challenges in the design of modern embedded systems.
Verimag, STMicroelectronics and Docea Power Common Projects
Verimag and STMicroelectronics have been working together on TLM-related problems since 2002, in various domains such as formal and runtime verification, modeling issues and component-based design.
Docea Power is a start-up company specialized in power consumption and temperature analysis. Verimag started collaborating with Docea in march 2008 (See this page), and the collaboration continues in the HELP project.
Summary of expected work
The candidate will work in the context of the HELP project, in collaboration with senior researchers and postdoc students. Development is needed on the two following points:
- Component-based power-consumption models in SystemC/TLM; a set of generic building blocks should be developed, and used for the modeling of a case-study provided by the industrial partners. A first experiment in SystemC/TLM has been developed by a member of the project, and will be used as a starting point.
- The best ways to connect a functional simulator with a tool for the analysis of non-functional properties (temperature, power-consumption). The current approach is to run the functional simulator, and let it dump a trace (typically in a text file). The non-functional analysis is done after-the-fact, based on this execution trace. This approach is limited since it does not allow a bi-directional communication between the functional simulator and the non-functional part (for example, a temperature sensor could hardly be modeled).
Required Skills
The ideal candidate should combine solid development skills, a previous experience in C++, and some background on the modeling of computer systems. He/she should have some degree of autonomy. Good English speaking and writing skills are required (French is not required).
Terms of employment
A full-time position as engineer, for a period of 18 months starting as soon as possible.
The salary will be between 2300 EUR and 2800 EUR gross per month depending on qualifications and experience.
Application
Send a detailed CV, a list of referees (persons that can recommend you), and a short letter explaining your motivations for this position, by email to:
Florence.Maraninchi@imag.fr, Matthieu.Moy@imag.fr, Karine.Altisen@imag.fr
Please include [JOB HELP] in the subject of your mail, and only attach PDF files.
Send your application as soon as possible, and no later than March 15th, 2011.
