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Rubriques

• Verimag
• Axes
• Contact
• Plan du site

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• Acces au Batiment

Actualités

Nouvelles publications

• Quelques Publications Récentes
  • Marius Bozga, Radu Iosif, Joseph Sifakis: Verification of component-based systems with recursive architectures
  • Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel B. Sant'Anna: Model Checking of Distributed Algorithms using Synchronous Programs
  • Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton: Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
  • Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler

Offres d'emploi et stages

• Offres d'emploi et stages
  • [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
  • [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
  • [Funded PhD] Quantitative analysis of software security against adaptive attacks
  • [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
  • [Master] Analyzing fault parameters triggering timing anomalies
  • [Master] Exploration by model-checking of timing anomaly cancellation in a processor
  • [Master] Towards New Frontiers in Multi-Core Response Time Analysis ?
  • [Master]Leakage in presence of an active and adaptive adversary
  • [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences