Related Lab Topic :
PhD
Weicheng He
is preparing a PhD thesis in Verimag
from May 2023
to April 2026,
under the supervision of
Saddek Bensalem
Related Lab Topic :Fetlas
Related Lab Topic :
Browsing
New publications
- Some Recent Publications
- David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel: Testing a Formally Verified Compiler
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Léo Gourdin, Benjamin Bonneau, Sylvain Boulmé, David Monniaux, Alexandre Bérard: Formally Verifying Optimizations with Block Simulations
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Certified Round Complexity of Self-Stabilizing Algorithms
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- [Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Formal Modeling and Verification of Parameterized and Distributed Systems
- [Funded PhD] Improving Diagnosis for a Formal Verification Tool for Electrical Circuits at Transistor Level
- [Funded PhD] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences