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ACTUALITÉS
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
Séminaires
Séminaires
4 avril 2024
Sébastien Michelland:
Abstract interpreters: a monadic approach to modular verification
11 avril 2024
Andrei Paskevich:
Coma: an intermediate verification language with explicit abstraction barriers
2 mai 2024
Matthieu Moy:
How to build a broken system?
Nouvelles publications
Quelques Publications Récentes
Gaëlle Walgenwitz, Benjamin Wack:
Retour d'expérience -- modélisation par des automates d'un objet concret, le flexagone
David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel:
Testing a Formally Verified Compiler
Karine Altisen, Pierre Corbineau, Stéphane Devismes:
Complexité certifiée d'algorithmes autostabilisants en rondes
Claire Maiza:
Hardware and software analyses for precise and efficient timing analysis
Offres d'emploi et stages
Offres d'emploi et stages
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Bourses PERSYVAL de M2
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
[Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] A Solver for Monadic Second Order Logic of Graphs of Bounded Tree-width
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
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