Accueil
>
Verimag
>
Séminaires
Détails sur le séminaire
CTL
23 juin 2011 - 10h00
Randomizable Commutative Signature and Encryption Schemes
par
David Pointcheval
de ENS/CNRS/INRIA
Résumé :
This is a joint work with Olivier Blazy, Georg Fuchsbauer and Damien Vergnaud.
Navigation
Rubriques
Verimag
Membres
Publications
Outils
Thèse en cours
Emplois et stages
Projets
Partenaires
Colloques et Conférences
Séminaires
Archives
Documents
Axes
Contact
Plan du site
Acces au Batiment
Actualités
ACTUALITÉS
Junior professorship chair on verifiable / explainable artificial intelligence
Séminaires
Séminaires
2 mai 2024
Matthieu Moy:
How to build a broken system?
30 mai 2024
Mohamed Maghenem:
A hybrid-systems framework for distributed gradient-based estimation
Nouvelles publications
Quelques Publications Récentes
Erwan Jahier, Karine Altisen, Stéphane Devismes:
Exploring Worst Cases of Self-stabilizing Algorithms using Simulations
Léo Gourdin, Benjamin Bonneau, Sylvain Boulmé, David Monniaux, Alexandre Bérard:
Formally Verifying Optimizations with Block Simulations
Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes:
On Self-stabilizing Leader Election in Directed Networks
Marius Bozga, Radu Iosif, Joseph Sifakis:
Verification of component-based systems with recursive architectures
Offres d'emploi et stages
Offres d'emploi et stages
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Bourses PERSYVAL de M2
Junior professorship chair on verifiable / explainable artificial intelligence
[Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Contact
|
Plan du site
|
Site réalisé avec SPIP 4.2.8
+
AHUNTSIC
[CC License]
info visites
3951681
English
Français