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CTL
24 March 2009 - 13h30
Chiffrement homomorphe additif et multiplicatif basé sur le pire cas de uSVP
by
Carlos Aguilar Melchor
from Universite de Limoges XLIM
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Poste de Professeur⋅e des Universités Verimag/UGA
Intelligence artificielle, sciences du logiciel, méthodes formelles
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Some Recent Publications
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Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance vs. Precision Trade-offs
Bruno Ferres, Oussama Oulkaid, Matthieu Moy, Gabriel Radanne, Ludovic Henrio, Pascal Raymond, Mehdi Khosravian:
A Survey on Transistor-Level Electrical Rule Checking of Integrated Circuits
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Regular Grammars for Sets of Graphs of Tree-Width 2
Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Marius Bozga, Maxime Perrotin:
Specification and model-checking of space systems in the TASTE toolset
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Poste de Professeur⋅e des Universités Verimag/Grenoble-INP
Poste de Professeur⋅e des Universités Verimag/UGA
[PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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