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Anciens de l’équipe Synchrone
Anciens de l’équipe Synchrone
Jan Mikac
Lionel Morel
Fabien Gaucher
Yann Rémond
Muriel Jourdan
Tayeb Bouhadiba
Laure Danthony-Gonnord
David Stauch
Youssef Bouzouzou
Claude Helmstetter
Ludovic Samper
Olivier Bezet
Yanhong Liu
Jérôme Cornet
Actualités
ACTUALITÉS
Joseph Sifakis élu membre de la National Academy of Sciences
Junior professorship chair on verifiable / explainable artificial intelligence
Séminaires
Séminaires
16 mai 2024
Gaiyun Liu:
Modeling, analysis, and supervisory control of networked discrete event systems
30 mai 2024
Mohamed Maghenem:
A hybrid-systems framework for distributed gradient-based estimation
Nouvelles publications
Quelques Publications Récentes
Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne:
A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
Marius Bozga, Radu Iosif, Joseph Sifakis:
Verification of component-based systems with recursive architectures
Claire Maiza:
Hardware and software analyses for precise and efficient timing analysis
Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton:
Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
Offres d'emploi et stages
Offres d'emploi et stages
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Bourses PERSYVAL de M2
Junior professorship chair on verifiable / explainable artificial intelligence
[Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
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