Verimag

Claude Helmstetter

supervisor : F. Maraninchi - PhD 2003-2007

Validating Models of Systems-on-a-Chip with Loose Timings and Non-Deterministic Schedulings

Committee (march 26, 2007) :

  • Florence Maraninchi (supervisor, VERIMAG)
  • Gérard Berry (reviewer, EsterelTechnology, Academy of Sciences)
  • Patrice Godefroid (reviewer, Microsoft Research, USA)
  • Laurent Maillet-Contoz (advisor, STMicroelectronics)
  • Marc Renaudin (president, Grenoble INP)

PhD text on HAL (in French)

Personal Homepage

Publications

2016

  1. Modeling Power Consumption and Temperature in TLM Models. Matthieu Moy, Claude Helmstetter, Tayeb Bouhadiba, Florence Maraninchi - Leibniz Transactions on Embedded Systems - [bibtex]

2013

  1. Fast and Accurate TLM Simulations using Temporal Decoupling for FIFO-based Communications. Claude Helmstetter, Jérôme Cornet, Bruno Galilée, Matthieu Moy, Pascal VIVET - Design, Automation and Test in Europe (DATE) - [bibtex]

2011

  1. Designing a CPU model: from a pseudo-formal document to fast code. Frédéric Blanqui, Claude Helmstetter, Vania Joloboff, Jean-François Monin, Xiaomu Shi - Proceedings of the 3rd Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools - [bibtex]

2010

  1. Designing a CPU simulator: from a pseudo-formal document to fast code. Frédéric Blanqui, Claude Helmstetter, Vania Joloboff, Jean-François Monin, Xan Shi - [bibtex]
  2. SimSoC-Cert: a Certified Simulator for Systems on Chip. Frédéric Blanqui, Claude Helmstetter, Vania Joloboff, Jean-François Monin, Xan Shi - [bibtex]

2009

  1. Full Simulation Coverage for SystemC Transaction-Level Models of Systems-on-a-Chip. Claude Helmstetter, Florence Maraninchi, Laurent Maillet-Contoz - Formal Methods in System Design - [bibtex]

2008

  1. SystemC/TLM Semantics for Heterogeneous System-on-Chip Validation. Florence Maraninchi, Matthieu Moy, Jérôme Cornet, Laurent Maillet-Contoz, Claude Helmstetter, Claus Traulsen - 2008 Joint IEEE-NEWCAS and TAISA Conference - [bibtex]

2007

  1. Validation de modèles de systèmes sur puce en présence d'ordonnancements indéterministes et de temps imprécis. Claude Helmstetter - [bibtex]

2006

  1. Test Coverage for Loose Timing Annotations. Claude Helmstetter, Florence Maraninchi, Laurent Maillet-Contoz - 11th International Workshop on Formal Methods for Industrial Critical Systems - [bibtex]
  2. Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip. Claude Helmstetter, Florence Maraninchi, Laurent Maillet-Contoz, Matthieu Moy - Formal Methods in Computer Aided Design (FMCAD) - [bibtex]

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