Critical Embedded Systems on Manycore Architectures
Students, Projects, and Collaborations
- Hanan Kanso (Master 2014)
- Amaury Graillat (Master 2015)
- Moustapha Lo (PhD 2015-2018), Nicolas Valot (Airbus Helicopters), CIFRE PhD
- Pascal Raymond, Matthieu Moy (Verimag), Amaury Graillat (CIFRE PhD, Kalray)
- Projects: CESyMPA, CAPACITES
Topic
The current hardware architectures are not suitable for critical embedded systems, because they are designed for average performance, offering transparent mechanisms at several levels (from the pre-fetching mechanisms in memory controllers to the routing algorithms in networks on a chip, including the very principle of a cache, load balancing techniques, etc.). All these mechanisms are a major obstacle to predictability and determinism, as required by certification authorities. The question of how to design an embedded system for the critical domains, using modern hardware architectures, therefore raises a huge interest, both in companies, and in academia. There is no satisfactory solution yet.
In the context of the project
CESyMPA
(Persyval-Lab, 2013-2014), we advocate that these topics deserve a new
and fresh look, “forgetting” about the constraints of existing
components or software solutions. In this project, we aim at exploring
ways to implement critical systems as software running on
multiprocessor architectures, in such a way that the complete solution
be simple and provably deterministic, therefore acceptable by
certification authorities. We would like to come up with a clear idea
of what could be an ideal hardware architecture and design flow for
“predictable-by-construction” critical embedded systems. Even if it is
not feasible for a number of reasons, ranging from hardware
fabrication problems to economic viability, this is scientifically
worth trying because it would give an estimation of the distance
between such an ideal solution and what exists now, and help
identifying the tricky problems with the current hardware.
In the context of the project CAPACITES, and the CIFRE PhDs of Moustapha Lo and Amaury Graillat, we study the use of the Kalray MPPA manycore processor for critical real-time applications.
Models in Smart Cities
Students and Collaborations
- Laurent Lemke (PhD)
- Didier Donsez (LIG)
- Gilles Privat (Orange Labs)
Topic
Smart cities currently rely on the deployment of dedicated IoT
infrastructures, each from a given stakeholder, and mostly for
monitoring applications. We investigate a solution to transform these
vertical organizations into horizontal ones, to allow several
stakeholders to share the infrastructure, for both monitoring and
control applications. Our proposal uses state- based models inherited
from typical embedded systems models, to represent sensors, actuators
and portions of space like streets, crossings, etc. These models are
automatically translated into REST resources to provide a standard
interface for monitoring and control purposes. We also propose a
distributed infrastructure able to execute applications with various
timing requirements and conflicting needs. We illustrate these ideas
with a proof of concept implementation, a programming model and
guidelines for application programmers.
Components, Contracts, Early Execution, functional and extra-functional properties, quality-of-use
Students, Projects, and Collaborations
- Tayeb Bouhadiba, PhD 2006-2010
- Giovanni Funchal, PhD 2007-2011
- Yuliia Romenska , PhD 2013-2017
- Vincent Morice, PhD 2018-2021
- FoToVP
- ALIDECS / ACI “Sécurité & Informatique” French Programme, 2004-2007
- openTLM
- CATRENE OpenES 2013-2016 –
Open ESL Technologies for Next Generation Embedded Systems
Open modeling and simulation tools for analysing functional and non-functional properties at system level, for systems-on-a-chip.
Project Leader: STMicroelectronics, Grenoble
- CIFRE STMicroeletronics 2018-2021
Topic
In the context of the OpenES project, we designed a very general and high-level notion of a component for hardware/software systems, for which functional properties can be specified in a contract-like formalism. Contrary to a lot of component models at this level of abstraction, our framework is executable. A non-deterministic component can be “executed” if, given inputs, we are able to generate random outputs such that the non-deterministic contract that links inputs and outputs is satisfied. This method relies on constraint solvers. We defined a formalism and execution engine compatible with existing SystemC/TLM components.
We are now starting to work on the idea of a “quality of use” contract for a HW/SW component. In the execution of a system made of several components (some of them given in full details, some of them described by their contracts only), we will define warnings, able to identify situations in which, for instance, a piece of software makes a non-optimal use of a HW component (e.g., if it offers a DMA-like memory transfer, but the SW does not use it).
High Level Models for Functional and Extra-Functional Properties of HW/SW Systems
Students, Projects, and Collaborations
- Y. Romenska (PhD 2017), G. Funchal (PhD 2011), J. Cornet (PhD 2008), C. Helmstetter (PhD 2007), M. Moy (PhD 2005)
- HELP
- OpenTLM
- CATRENE OpenES 2013-2016 –
Open ESL Technologies for Next Generation Embedded Systems
Open modeling and simulation tools for analysing functional and non-functional properties at system level, for systems-on-a-chip.
Project Leader: STMicroelectronics, Grenoble
Topic
The work on systems-on-a-chip is conducted in collaboration with STMicrolectronics, Grenoble. The Register Transfer Level (RTL) used to be the entry point of the design flow of hardware systems, including systems-on-a-chip (SoCs). However, the simulation environments for such models do not scale up well. Developing and debugging embedded software for these low level models before getting the physical chip from the factory is no longer possible at a reasonable cost. New abstraction levels, such as the Transaction-Level Modeling, have emerged during the last decade. The TLM approach uses a component-based approach, in which hardware blocks are modules communicating with so-called transactions. The TLM models are used for early development of the embedded software, because the high level of abstraction allows a fast simulation. This new abstraction level requires that SoCs be described in some non-deterministic asynchronous way, with new synchronization mechanisms, quite different from the implicit synchronization of synchronous circuit descriptions. SystemC is a C++ library used for the description of SoCs at different levels of abstraction, from cycle accurate to purely functional models. It comes with a simulation environment, and has become a standard. SystemC offers a set of primitives for the description of parallel activities representing the physical parallelism of the hardware blocks. The TLM level of abstraction can be described with SystemC. Recent work at Verimag/Synchrone focused on the modeling of time and energy consumption at high levels of abstraction, typically TLM. We now work on general high-level models for heterogeneous embedded systems, which can be simulated very early in the design cycle. The idea is to specify the components by very abstract non-deterministic contract-like specifications, so that their composition can be executed very early, before all the details of their implementation is known.
Modeling, Analysis and Design of Ad-hoc Sensor Networks (2004-2013)
Students, Projects, and Collaborations
- ANR Projects ARESA, ARESA2
- Ludovic Samper (PhD 2008), Nicolas Berthier (PhD 2012)
- Collaboration with Orange Labs
- Other Verimag people involved: Laurent Mounier, Karine Altisen, Stéphane Devismes, Pascal Lafourcade
Synchronous Languages: Argos and Mode-Automata (1990-2004)
Argos is a pure synchronous language inspired by Statecharts. It is a synchronous language in which basic programs are explicit Mealy machines, and the compositions operators are the parallel composition and the hierarchic composition.
Students and Collaborations
- Muriel Vachon - Jourdan (PhD 1994)
- Yann Rémond (PhD 2001)
- Lionel Morel (PhD 2005)
- Airbus, EsterelTechnologies, Schneider Electric, …
Main references
Aspect-Oriented Programming for reactive systems (2002-2006)
Students and Collaborations
- David Stauch (PhD 2007)
- Karine Altisen
Main references
Automatic Debugging for reactive systems (1999-2003)
Students and Collaborations
- Fabien Gaucher (PhD 2003)