Axe :
Thèse
Basile Gros
effectue une thèse à Verimag
de octobre 2023
à septembre 2026,
sous la supervision de
Jean-François Monin
Axe :FormalProofs
Axe :
Navigation
Actualités
- Séminaires
- 16 mai 2024 Gaiyun Liu: Modeling, analysis, and supervisory control of networked discrete event systems
- 30 mai 2024 Mohamed Maghenem: A hybrid-systems framework for distributed gradient-based estimation
- 27 juin 2024 Nicolas Chappe: Tba (toward a verified compilation infrastructure for concurrent programs)
Séminaires
Nouvelles publications
- Quelques Publications
Récentes
- Claire Maiza: Hardware and software analyses for precise and efficient timing analysis
- Dominique Larchey-Wendling, Jean-François Monin: Proof Pearl: Faithful Computation and Extraction of \mu-Recursive Algorithms in Coq
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
- Joseph Sifakis: Testing System Intelligence
Offres d'emploi et stages
- Offres d'emploi et stages
- [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
- Bourses PERSYVAL de M2
- [Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
- [Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
