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Nouvelles publications
- Quelques Publications
Récentes
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Certification of an exact worst-case self-stabilization time
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne: A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing Synchronous Unison in Directed Networks
Offres d'emploi et stages
- Offres d'emploi et stages
- [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis ?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
