@phdthesis{Six1,
title = { {Optimized and formally-verified compilation for a VLIW processor} },
author = {Six, Cyril},
month = {Jul},
year = {2021},
team = {axe_FormalProofs, axe_SharedResources, PACSS},
pdf = {https://hal.archives-ouvertes.fr/tel-03326923/file/thesis.pdf},
hal_id = {tel-03326923},
hal_version = {v1},
}
bibtex
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Nouvelles publications
- Quelques Publications
Récentes
- Emma Ahrens, Marius Bozga, Radu Iosif, Joost-Pieter Katoen: Reasoning about distributed reconfigurable systems
- Florence Maraninchi: Let Us Not Put All Our Eggs in One Basket
- Marius Bozga, Lucas Bueri, Radu Iosif: Decision Problems in a Logic for Reasoning About Reconfigurable Distributed Systems
- Abdelhakim Baouya, Otmane Ait Mohamed, Samir Ouchani: Toward a context-driven deployment optimization for embedded systems: a product line approach
Offres d'emploi et stages
- Offres d'emploi et stages
- [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
- Bourses PERSYVAL de M2
- Measures against speculative attacks in a certified optimizing compiler
- Poste de maître de conférences VERIMAG / UFR IM2AG
- Security counter-measures in a certified optimizing compiler
- Thèse CIFRE : Cybersecurity - Fault injection attacks
- Verified hash tables and hash-consing
- [master/PhD] Formally verified optimizations for safety-critical embedded code
- [master/PhD] Static analysis of “pseudo-LRU” caches
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Certification of Distributed Self-Stabilizing Algorithms Using Coq
- [Master] Design and Evaluation of Strategies for Automated Proofs using Reasoning Modulo Equivalence
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Implementing the Silence to Reduce Energy Consumption in Wireless Sensor Networks
- [Master] Simulation of Distributed Algorithms
- [Master] Sûreté des essaims de robots mobiles
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences