@phdthesis{'Dur6',
title = { {Analyse de code et processus d'\'evaluation des composants s\'ecuris\'e contre l'injection de faute} },
author = {Dureuil, Louis},
month = {Oct},
year = {2016},
type = {Theses},
number = {2016},
school = {{Universit\'e Grenoble Alpes}},
team = {DCS, PACSS},
}
bibtex
Navigation
Actualités
Séminaires
- Séminaires
- 2 février 2023 Charlie Jacomme: A comprehensive, formal and automated analysis of the edhoc protocol.
- 6 février 2023 Bruno Ferres: using model checking for electrical rule checking of integrated circuits at (...)
- 20 février 2023 Anais Durand: Exploration of 3d environments by swarms of luminous autonomous robots.
- 23 février 2023 Léo Robert: How fast do you heal? a taxonomy for post-compromise security in secure-channel (...)
- 2 mars 2023 Arthur Perais: Exploring instruction fusion opportunities in general purpose processors
Nouvelles publications
- Quelques Publications
Récentes
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Certification of an exact worst-case self-stabilization time
- Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Ivan Kolesnikov, Marius Bozga, Maxime Perrotin: Model-checking of space systems designed with TASTE/SDL
- Mnacho Echenim, Radu Iosif, Nicolas Peltier: Entailment is Undecidable for Symbolic Heap Separation Logic Formul\ae with Non-Established Inductive Rules
- Marius Bozga, Radu Iosif, Joseph Sifakis: Verification of component-based systems with recursive architectures
Offres d'emploi et stages
- Offres d'emploi et stages
- [Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
- Measures against speculative attacks in a certified optimizing compiler
- Security counter-measures in a certified optimizing compiler
- Thèse CIFRE : Cybersecurity - Fault injection attacks
- Verified hash tables and hash-consing
- [master/PhD] Formally verified optimizations for safety-critical embedded code
- [master/PhD] Static analysis of “pseudo-LRU” caches
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Certification of Distributed Self-Stabilizing Algorithms Using Coq
- [Master] Design and Evaluation of Strategies for Automated Proofs using Reasoning Modulo Equivalence
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Implementing the Silence to Reduce Energy Consumption in Wireless Sensor Networks
- [Master] Simulation of Distributed Algorithms
- [Master] Sûreté des essaims de robots mobiles
- [Master]Leakage in presence of an active and adaptive adversary
- [Post-Doc] Open postdoc position (Software Security, Formal Methods, IIoT)
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
