P. Bourgos, A. Basu, M. Bozga, S. Bensalem, J. Sifakis, K. Huang
Rigorous System Level Modeling and Analysis of Mixed HW/SW Systems (2011)
Rigorous System Level Modeling and Analysis of Mixed HW/SW Systems (2011)
TR-2011-5.pdf
Keywords: System Level Design, Mixed HW/SW Systems, Mapping, Hardware Constraints, Simulation, Performance Evaluation
Abstract: A grand challenge in complex embedded systems design is developing methods and tools for modeling and analyzing the behavior of an application software running on a given hardware architecture. For application software running on multicore or distributed platforms, rigorous performance analysis techniques are essential for determining optimal implementations with respect to resource management criteria. We propose a rigorous method and a tool chain that allows to obtain a faithful model representing the behavior of a mixed hardware/software system from a model of its application software and a model of its underlying hardware architecture. The system model can be simulated and analyzed for validation of both functional and extra-functional properties. It also provides a basis for performance evaluation and automated code generation for target architectures. The method has been implemented as a tool chain that uses DOL (Distributed Operation Layer) as the frontend for specifying the application software and hardware architecture, and BIP (Behavior Interaction Priority) as the modeling and analysis framework. It is illustrated through the construction of system models of MJPEG and MPEG2 decoder applications running on MPARM, a multicore architecture.
