Ismail Assayad and Sergio Yovine
P-Ware: Performance-Aware Transaction-Level Simulation for Network Processor Applications (2006)
P-Ware: Performance-Aware Transaction-Level Simulation for Network Processor Applications (2006)
TR-2006-7.pdf
Keywords: Multi-processor, Platform-based design, Simulation, Performance, IPv4, IXP2800
Abstract: Platform-based design is an approach to cope with increasing costs in developing complex embedded systems. In order to support performance analysis at system-platform level, this report presents a methodology and tool which provide a joint SW/HW component-based modelling and simulation framework. Our framework allows for specifying variable transaction latencies, and separates functional and timed behavior of components. We apply the framework for analyzing several implementations of an IPv4 forwarder application on an Intels dual IXP2800. The analysis allows evaluating both SW and HW performance such as packets throughput, threads utilization, bus bandwidth and channels conflicts.
