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Synchrone Research Topics
Synchrone Research Topics
Virtual Prototyping and Simulation
Distributed Algorithms and Applications to Embedded Systems
Automatic Testing of Reactive Systems
Past Research Topics
Languages and Tools for Critical Real-Time Systems
News
NEWS
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
Seminars
Seminars
18 April 2024
Akram Idani:
Formal model-driven engineering
2 May 2024
Matthieu Moy:
How to build a broken system?
30 May 2024
Mohamed Maghenem:
A hybrid-systems framework for distributed gradient-based estimation
New publications
Some Recent Publications
Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne:
A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
Léo Gourdin:
Lazy Code Transformations in a Formally Verified Compiler
Gaëlle Walgenwitz, Benjamin Wack:
Retour d'expérience -- modélisation par des automates d'un objet concret, le flexagone
Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton:
Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
Jobs and internships
Jobs and internships
[Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
PERSYVAL Master 2 Scholarships
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
[Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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