Advisers: Claire Maiza and Lionel Rieg
Context: In hard real-time systems, the implementation must ensure guaranteed bounds on execution time and delays. On multi-core platforms, any shared resources access may cause interferences (shared memory and shared bus). The interference analysis must ensure bounded delay for shared resource accesses. The estimation of such delays for timing analysis or taking them into account for the implementation is a hot topic.
- interference analysis for timing analysis (hardware and software models)
- proof of non-interfering applications or guaranteed estimated bounds (timing anomaly)
- implementation of critical applications on multi-core
- scheduling implementation on the Kalray MPPA Coolidge