CTL (Amphitheater)
8 April 2015 - 13h30
Rigorous System-level Modeling and Performance Evaluation for Embedded System Design (Phd Defense)
by Ayoub Nouri from Verimag
Abstract: In the present work, we tackle the problem of modeling and evaluating performance in the context of embedded systems design. These have become essential for modern societies and experienced important evolution. Due to the growing demand on functionality and programmability, software solutions have gained in importance, although known to be less efficient than dedicated hardware. Consequently, considering performance has become a must, especially with the generalization of resource-constrained devices.
We present a rigorous and integrated approach for system-level performance
modeling and analysis. The proposed method enables faithful high-level modeling, encompassing both functional and performance aspects, and allows for rapid and accurate quantitative performance evaluation. The approach is model-based and relies on the SBIP formalism for stochastic component-based modeling and formal verification. We use statistical model checking for analyzing performance requirements and introduce a stochastic abstraction technique to enhance its scalability. Faithful high-level models are built by calibrating functional models with low-level performance information using automatic code generation and statistical inference.
We provide a tool-flow that automates most of the steps of the proposed approach and illustrate its use on a real-life case study for image processing. We consider the design and mapping of a parallel version of the HMAX models algorithm for object recognition on the STHORM many-cores platform. We explored timing aspects and the obtained results show not only the usability of the approach but also its pertinence for taking well-founded decisions in the context of system-level design.
Jury:
M. Saddek BENSALEM Verimag, Université Joseph Fourier (Directeur de thèse)
M. Marius BOZGA Verimag, CNRS (CoDirecteur de thèse)
M. Axel LEGAY INRIA (Co-encadrant de thèse)
M. Radu GROSU Vienna University of Technology (Rapporteur)
M. Albert COHEN INRIA (Rapporteur)
M. Jean Claude FERNANDEZ Verimag, Université Joseph Fourier (Examinateur)
M. Ahmed BOUAJJANI Université Paris Diderot (Paris 7) (Examinateur)
M. Kamel BARKAOUI CNAM Paris (Examinateur)
