salle A. Turing CE4
31 January 2013 - 14h00
by Dario Socci from Verimag
Résumé : Design Flow for Mixed-Critical Applications on Multi-core Systems
The introduction of many-cores and multi-cores is leading to an increasing trend in embedded systems towards implementing multiple subsystems upon a single shared platform. However, in most applications, not all the subsystems are equally critical. Especially this observation is important when human lives depend on correct functionality, e.g. in avionics systems. In mixed criticality systems different degrees of failures, from minor, hazardous to major, need to be distinguished.
The previous work mostly assumes time or space isolation of subsystems having different levels of criticality. However, when integrating different subsystems on a single multi-core die there is a need to share hardware resources (processors, on-chip memory, and global interconnect) between different subsystems. Also, a severe criticality-related problem already brightly manifested itself in popular many-core systems – the GPUs – and this problem is safety from hardware failures, and this problem will only increase as multi-core will become more and more commonplace. It is relatively well studied how to manage the resource sharing and safety when all subsystems have the same level of criticality. However, adding the mixed criticality assumption may easily boost the complexity from tractable to intractable, and a general lack of design methodology can be stated.
In this PhD research topic we collaborate in a recently launched European project CERTAINTY which aims to address this gap, and develop a prototype design flow. In different phases of the project, it is planned to collaborate in different tasks.