Jobs
Postdoc positions
- The VERIMAG laboratory has a vacancy for a post-doctoral position on "Development of Automatic Techniques for Software Verification" [More details]
- Postdoc position: Formal methods and software liability, new synergy, new challenges. [More details]
- Verimag recruits a research engineer in the context of the Open-EmBeDD project. [More details]
Thesis and Master subject propositions
- Formal methods and software liability: New synergy, new challenges
- Scheduling Stream-Processing Applications on a Multi-Processor
- Programming Languages for Stream Processing Applications
- Vérification formelle de protocoles de vote électronique.
- Vérification formelle de protocoles de vente aux enchères.
- Analyse formelle de la mobilité dans les communication sans fil.
- Analyse computationelle des chiffrements homomorphiques.
- Analyse des automates à compteurs avec contraintes octogonales
- Vérificiation de programmes avec structures arborescentes et données entières
