Verimag

Presentation


VERIMAG

A Leading Research Center in Embedded Systems


Embedded systems are at the heart of a wide area of applications, including avionics/aeronautics, space, transport, automotive, telecommunications, smart cards, consumer electronics. Embedded systems are composed of hardware and software components specifically designed for controlling a given application device. Embedded systems are of strategic importance for those sectors of the economy where Europe has traditionally been strong.

Research at Verimag provides theoretical and technical means for developing embedded systems, contributing to scientific advancement and industrial progress.

  • Over the last fifteen years, Verimag has actively contributed to the development of the state-of-the-art, in particular for synchronous languages, verification, testing and modeling.
  • The tools produced at Verimag are regularly transferred to commercial CASE tools and are used in a number of industrial applications.
  • Verimag coordinated the European Networks of Excellence Artist (2001-06), Artist2 (2006-08) and ArtistDesign (2008-12).
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Verimag’s strategy is to maintain a good balance between fundamental, experimental and applied research. This is particularly visible in long term cooperation with academic and industrial partners.

Verimag (UMR 5104), created in 1993, is an academic research laboratory affiliated with:

Verimag plays a major role in the university and engineering curricula at both UJF and Grenoble-INP. Approximately 30 PhD students participate in Verimag’s research programs.

Verimag regularly hosts major workshops and conferences.

Verimag is composed of three teams:

For more information, you can have a look at the last activity report, as well as to the Verimag brochure.

Keywords: Embedded systems - Formal Specification - Verification - Test - Simulation - Critical System - Real Time System - Hybrid System - Safety and Security - Synchronous Language - Modeling and Analysis of complex systems - Communication Protocol - Compilation - Static Analysis - Code Generation - Real Time Scheduling - Real-Time UML - SDL


Verimag
Centre Équation - 2, avenue de Vignate
38610 GIÈRES
Téléphone : +33 4 56 52 03 41
Télécopie : +33 4 56 52 03 44

Director : Nicolas Halbwachs

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