Paolo Torrini, Paul Caspi, Pascal Raymond
From Fault-Trees to Safety Conditions (2007)
From Fault-Trees to Safety Conditions (2007)
TR-2007-6.pdf
Keywords: Fault trees, safety conditions, formal verification
Abstract:
Technical Reports
TR-2007-6.pdf
Keywords: Fault trees, safety conditions, formal verification
Abstract:
Navigation
Actualités
- Conférences
- 24-28 Novembre 2025 Synchron 2025
Séminaires
- Séminaires
- 21 novembre 2025 Oussama Oulkaid: Formal models of integrated circuits for transistor level electrical verification (Phd)
- 25 novembre 2025 Véronique Cortier: Electronic voting: design, attack, and formal verification
- 1er décembre 2025 Sylvain Boulme: Introduction à la programmation orientée objet en crystal
- 4 décembre 2025 Jannik Laval: A venir (thème cybersécu)
- 11 décembre 2025 Thaïs Baudon: A venir (thème: compilation optimisant les représentations mémoire)
- 18 décembre 2025 Jérémie Decouchant: A venir (theme cybersecu)
Nouvelles publications
- Quelques Publications
Récentes
- Karine Altisen, Marius Bozga: Revisited Convergence of a Self-stabilizing BFS Spanning Tree Algorithm
- Marius Bozga, Radu Iosif, Arnaud Sangnier, Neven Villani: Counting Abstraction and Decidability for the Verification of Structured Parameterized Networks
- Thomas Vigouroux, Marius Bozga, Cristian Ene, Laurent Mounier: Function Synthesis for Maximizing Model Counting
- Bruno Ferres, Oussama Oulkaid, Matthieu Moy, Gabriel Radanne, Ludovic Henrio, Pascal Raymond, Mehdi Khosravian: A Survey on Transistor-Level Electrical Rule Checking of Integrated Circuits
Offres d'emploi et stages
- Offres d'emploi et stages
- [Funded PhD] Fault Injection Attacks : Automated Analysis of Counter-Measures At The Binary Level
- [Master] Decision Procedure for Equivalence Relations
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
