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VERIMAG + STMicroelectronics common projects [2002...[
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SLAP and SLA++P
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Actualités
ACTUALITÉS
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
Junior research professorship on cybersecurity at the software-hardware boundary
Séminaires
Séminaires
4 avril 2024
Sébastien Michelland:
Abstract interpreters: a monadic approach to modular verification
Nouvelles publications
Quelques Publications Récentes
Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond:
Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
Léo Gourdin, Benjamin Bonneau, Sylvain Boulmé, David Monniaux, Alexandre Bérard:
Formally Verifying Optimizations with Block Simulations
Léo Gourdin:
Lazy Code Transformations in a Formally Verified Compiler
Claire Maiza:
Hardware and software analyses for precise and efficient timing analysis
Offres d'emploi et stages
Offres d'emploi et stages
[Master] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
Bourses PERSYVAL de M2
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
[L3/M1] Theory and Practice of Vectorial Extension for Stream Processing
[Master] Modélisation et caractérisation d’attaques par faute exploitant l’architecture mémoire
[Master] Compilation prouvée sécurisée vers processeur RISC-V
[Master] A Solver for Monadic Second Order Logic of Graphs of Bounded Tree-width
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core : execution mode analysis to reduce interferences
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