Verimag

Program

  Wednesday, September 26

  • 13:30-17:30 -­ Afternoon Session
    • 13:30-14:00 - Welcome coffee
    • 14:00-15:00 - Joseph Sifakis (EPFL, Lausanne, and Verimag): Rigorous System Design in BIP
    • 15:00-16:00 - Ahmed Bouajjani (LIAFA, Paris): Analyzing Concurrent Program Behaviors under Weak Memory Models
    • 16:30-17:30 - Reinhard Wilhelm (Saarland University): Embedded Systems: Many Cores - Many Problems
  • 18:00 ­- Welcome reception (UFR IM²AG)

  Thursday, September 27

  • 9:00-12:30 ­ - Morning Session dedicated to Paul Caspi
    • 9:00-10:00 - Albert Benveniste (IRISA/INRIA, Rennes): Semantics and Compilation of a Hybrid Language
    • 10:00-11:00 - Gérard Berry (INRIA, Sophia-Antipolis et Collège de France): Synchronous/Asynchronous Web Orchestration with Hop and HipHop
    • ­ 11:30-12:30 - Verimag Speaker: Matthieu Moy, Transaction-Level Models of Systems-on-a-Chip: Can they be Correct, Faithful and Fast?
  • 14:00-17:30 ­ Afternoon Session
    • 14:00-15:00 - Luca Benini (Universita di Bologna): Digital Platform Design in the Twilight of a Moore’s Law
    • 15:00-16:00 - Gilles Barthe (IMDEA, Madrid):Computer-Aided Cryptographic Proofs
    • 16:30-17:30 - Verimag Speaker: Jannik Dreier, Computed-Aided Provable Security
  • 19:30: Workshop dinner (restaurant "Chez le Per’Gras")

  Friday, September 28

  • 9:00-12:30 ­ Morning Session
    • 9:00-10:00 - Pravin Varaiya (Berkeley University): The Max-pressure Controller for Networks of Signalized Intersections
    • 10:00-11:00 - Tom Henzinger (IST Austria) Twenty Years of Real-Time and Hybrid Systems
    • 11:30-12:30 - Verimag Speaker: Oded Maler, Timed Systems: The Unconquered Frontier
  • 12:30. Lunch - End of the workshop

titre documents joints

25 September 2012
info document : PDF
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