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Some Synchrone Former Members
Some Synchrone Former Members
Jan Mikac
Lionel Morel
Fabien Gaucher
Yann Rémond
Muriel Jourdan
Tayeb Bouhadiba
Laure Danthony-Gonnord
David Stauch
Youssef Bouzouzou
Claude Helmstetter
Ludovic Samper
Olivier Bezet
Yanhong Liu
Jérôme Cornet
News
NEWS
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
Junior research professorship on cybersecurity at the software-hardware boundary
Seminars
Seminars
4 April 2024
Sébastien Michelland:
Abstract interpreters: a monadic approach to modular verification
11 April 2024
Andrei Paskevich:
Tba
New publications
Some Recent Publications
David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel:
Testing a Formally Verified Compiler
Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond:
Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes:
Self-stabilizing Synchronous Unison in Directed Networks
Dominique Larchey-Wendling, Jean-François Monin:
Proof Pearl: Faithful Computation and Extraction of \mu-Recursive Algorithms in Coq
Jobs and internships
Jobs and internships
[Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
PERSYVAL Master 2 Scholarships
Junior professorship chair on verifiable / explainable artificial intelligence
Poste de professeur des universités (section 27)
[L3/M1] Theory and Practice of Vectorial Extension for Stream Processing
[Master] Modeling and Characterizing Fault Attacks exploiting the Memory Architecture
[Master] Proved-Secure Compilation for RISC-V Processor
[Master] A Solver for Monadic Second Order Logic of Graphs of Bounded Tree-width
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
[Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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