Related Lab Topic :
PhD
Neven Villani
is preparing a PhD thesis in Verimag
from September 2024
to August 2027,
under the supervision of
Radu Iosif
Related Lab Topic :Mohytos
Related Lab Topic :
Browsing
News
Seminars
- Seminars
- 16 November 2026 Benjamin Bonneau: Propagation of semantic information in a verified compilation pipeline (Phd)
- 19 November 2026 Clement Chavanon: Barocq: a high-level programming language for efficient and verifiable embedded system (…)
- 25 November 2026 Dominique Larchey-wendling: Constructive substitutes for kőnig’s lemma
- 26 November 2026 Basile Gros: Proxy-based small inversions for the rocq prover (Phd)
- 3 December 2026 Yann Kieffer: Fast and reliable exact real computations through functional programming.
- 17 December 2026 Guillaume Didier: How increasing complexity of processors make micro-architectural attacker’s life harder
New publications
- Some Recent Publications
- Bruno Ferres, Oussama Oulkaid, Matthieu Moy, Gabriel Radanne, Ludovic Henrio, Pascal Raymond, Mehdi Khosravian: A Survey on Transistor-Level Electrical Rule Checking of Integrated Circuits
- Karine Altisen, Marius Bozga: Revisited Convergence of a Self-stabilizing BFS Spanning Tree Algorithm
- Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel Baiocchi Sant'anna: Model checking of distributed algorithms using synchronous programs
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian: Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance vs. Precision Trade-offs