A Lecture at collège de France by Matthieu Moy

Sections

• Verimag
  • Members
  • Publications
  • Tools
  • Ongoing Phd Thesis
  • Jobs and Internships
  • Projects
  • Partners
  • Workshops and Conferences
  • Seminars
  • Documents
• Topics
• Contact
• Site Map

---

• Building Access

News

• NEWS
  • Poste de maître de conférences VERIMAG / UFR IM2AG

Seminars

• Seminars
  • 28 April 2023 Etienne Boespflug: Outils pour l’analyse de code et de contre-mesures pour l'injection de fautes (...) (Phd)
  • 28 April 2023 Thomas Jensen: An information flow logic based on partial equivalence relations
  • 4 May 2023 Joseph Sifakis: Artificial intelligence and autonomous systems

New publications

• Some Recent Publications
  • Mnacho Echenim, Radu Iosif, Nicolas Peltier: Entailment is Undecidable for Symbolic Heap Separation Logic Formul\ae with Non-Established Inductive Rules
  • Karine Altisen, Stéphane Devismes, Erwan Jahier: sasa: a SimulAtor of Self-stabilizing Algorithms
  • Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing Synchronous Unison in Directed Networks
  • Marius Bozga, Lucas Bueri, Radu Iosif: Decision Problems in a Logic for Reasoning About Reconfigurable Distributed Systems

Jobs and internships

• Jobs and internships
  • [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
  • PERSYVAL Master 2 Scholarships
  • Measures against speculative attacks in a certified optimizing compiler
  • Poste de maître de conférences VERIMAG / UFR IM2AG
  • Security counter-measures in a certified optimizing compiler
  • Verified hash tables and hash-consing
  • [master/PhD] Formally verified optimizations for safety-critical embedded code
  • [master/PhD] Static analysis of “pseudo-LRU” caches
  • [Master] Analyzing fault parameters triggering timing anomalies
  • [Master] Certification of Distributed Self-Stabilizing Algorithms Using Coq
  • [Master] Design and Evaluation of Strategies for Automated Proofs using Reasoning Modulo Equivalence
  • [Master] Exploration by model-checking of timing anomaly cancellation in a processor
  • [Master] Implementing the Silence to Reduce Energy Consumption in Wireless Sensor Networks
  • [Master] Simulation of Distributed Algorithms
  • [Master] Sûreté des essaims de robots mobiles
  • [Master]Leakage in presence of an active and adaptive adversary
  • [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences