Wednesday 29th January 2014, between 5pm and 6 pm, Matthieu Moy (Verimag) gives a Lecture at collège de France on « Virtual prototyping of systems on chip for an efficient and faithful simulation »
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A Lecture at collège de France by Matthieu Moy
View online : http://www.college-de-france.fr/sit...
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- Some Recent Publications
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton: Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne: A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: On Self-stabilizing Leader Election in Directed Networks
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- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences