- Timing analysis (WCET)
- CAOTIC project
- W-SEPT project
- Real-time and embedded systems
Research
Browsing
News
Seminars
New publications
- Some Recent Publications
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- Léo Gourdin, Benjamin Bonneau, Sylvain Boulmé, David Monniaux, Alexandre Bérard: Formally Verifying Optimizations with Block Simulations
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Complexité certifiée d'algorithmes autostabilisants en rondes
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences