Room 206 (2nd floor, badged access)
12 December 2024 - 14h00
tba (Phd Defense)
Lucas Bueri from Verimag
12 December 2024 - 14h00
tba (Phd Defense)
Lucas Bueri from Verimag
Abstract: tba
soutenance de these prevue
Browsing
News
Seminars
- Seminars
- 28 November 2024 Grégoire Bussone: Reducing copies and memory consumption in synchronous languages
- 2 December 2024 Thomas Vigouroux: Quantitative analysis for adaptive attackers (Phd)
- 12 December 2024 Lucas Bueri: Tba (Phd)
- 12 December 2024 Bob Aubouin-pairault: (Phd)
New publications
- Some Recent Publications
- Florence Maraninchi: Revisiting "Good" Software Design Principles To Shape Undone Computer Science Topics
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- Erwan Jahier, Karine Altisen, Stéphane Devismes: Exploring Worst Cases of Self-stabilizing Algorithms using Simulations
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
