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17 November 2020 - 14h00
A study of predictable execution models implementation for industrial data-flow applicationson a multi-core platform with shared banked memory
by Schuh Matheus from Kalray/Verimag
Abstract: -- to appear in RTSS 2020 ---
We study the implementation of data-flow applications on multi-core processor with on-chip shared multi-banked memory. Specifically, we consider the Kalray MPPA2 processor and three applications coded using the industrial toolchain SCADE Suite.We focus on the runtime environment assuming global static scheduling, time-triggered and non-preemptive execution of tasks. Our contributions include (i) atechnique to implement SCADE applications compli-ant with execution models inspired by PREMs (PRe-dictable Execution Models), (ii) an exhaustive com-parison of three execution models with and withoutisolation, and finally (iii) guidelines for predictable implementation of a data-flow application on multi-core processors with shared on-chip memory.
Topic: Verimag seminar: Matheus Schuh, presentation paper rtss 2020
Time: Nov 17, 2020 02:00 PM Paris
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