Seminar details

Room 206 (2nd floor, badged access)

24 January 2019 - 14h00
WCET and interference analysis for multicore systems
by Maiza Claire from VERIMAG

Abstract: In this talk, we present a survey on multi-core timing analyses including delays due to
interferences (shared memory, shared bus).
We show that interference analysis is possible (scalability and precision).
We illustrate this point with our interference analysis where the delay is integrated into schedulability analysis.
We show that applying this analysis to a real platform (Kalray MPPA2) comes with a necessary smart software implementation and hardware configuration.

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