Verimag

Looking for PhD Candidates

Tempo Team

Open Phd Positions at the Tempo group at VERIMAG, Grenoble

The Timed and Hybrid group (Tempo) at VERIMAG, one of the world-wide leading groups in cyber-physical systems, is looking for candidates for a 3-year Phd scholarships starting at September 2017. The salary (brut) is around 1700 Euros per month, medical insurance included.

Depending on the qualifications of the candidate, the possible topics proposed include:

  • Classification, pattern matching, learning and data mining for dynamic behaviors (time-series, signals) using new techniques inspired from verification
  • Specification formalism for continuous and hybrid behaviors based on temporal logics and regular expressions
  • Verification, test generation and systematic simulation of continuous and hybrid systems with application to control (avionics, automotive), analog circuits, smart grids and systems biology
  • Computational techniques for multi-criteria optimization
  • Other topics in applied theoretical computer science

Motivated candidates with a master’s degree and a solid background in a non-empty subset of computer science, machine learning, mathematics, control, electrical engineering, signal processing or systems biology, are kindly asked to send (an e-mail with "PhD candidate" in the title) a CV and motivation letter to Oded.Maler@imag.fr before June 7th 2017

The candidate will have to compete on a limited number of scholarship, hence we expect only candidate with excellent course notes, recommendation letters and preliminary research results

Knowledge of French is advantageous but does not constitute a pre-requisite (and courses will be covered by the lab).

The Grenoble area, in addition to the surrounding skiable mountains, features one of Europe’s largest concentrations of academic/industrial research and development with a lot of students and a relatively-cosmopolite atmosphere. You can easily reach Lyon (1 hour), Geneva (1.5 hours), Torino (2 hours), Paris (3 hours by train) and Barcelona (6 hours).

VERIMAG, http://www-verimag.imag.fr is one of the world-wide leading academic labs in verification and model-based design of embedded systems. Its past contributions include model checking (J. Sifakis, Turing Award 2007), the data-flow language Lustre underlying the SCADE programming environment for safety-critical systems, as well as pioneering contributions to the study of timed and hybrid systems and its applications.



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