Verimag

Technical Reports

Dario Socci, Peter Poplavko, Saddek Bensalem, Marius Bozga
Time-Triggered Mixed-Critical Scheduler on Single- and Multi-processor Platforms (Revised Version) (2015)

TR-2015-8.pdf


Keywords: time-triggered architecture, mixed criticality, multi-core scheduling, safety critical, hard real-time, precedence constraints, list scheduling, synchronous tasks

Abstract: Modern safety-critical systems, such as avionics, tend to be mixed-critical, because integration of different tasks with different assurance requirements can effectively reduce their costs in terms of hardware, at the risk, however to increase the costs for certification, in particular in the context of proving their schedulability. To simplify the certification costs such systems use Time Triggered (TT) scheduling paradigm, and a generalization of the Time Triggered (TT) scheduling paradigm Single Time Table per Mode (STTM). We present a state-of-the art preemptive STTM algorithm which works optimally on single core and shows good experimental results for multi-cores. In addition, because the algorithm can be applied on top of any memoryless scheduling policy, we show that applying it to list scheduling leads to support of task graph (precedence) dependencies for which our algorithm also shows good experimental results. Note that list scheduling also supports non-preemptive scheduling and the latter is very important for certain multi-core platforms. However, for applying our STTM approach for non-preemptive platform case we now do not have a completely correct algorithm, our previous tentative in that direction was recently discovered to still require some support of preemption. The latter discovery has lead to a revised version of this report, where we retract the non-preemption part of the results.

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