In the domain of security, verification is generally declined as robustness criteria and must be led against attacker models. We propose tools and technics dedicated to the evaluation of secure devices (smartcard or secured dongle) against fault attacks (such as laser or electromagnetic attacks). We are also interested for modeling and verifying other security requirements (confidentiality, integrity, isolation...) in particular in the context of Common Criteria certification.
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News
Seminars
New publications
- Recent Publications
- Mahieddine Dellabani: Formal Methods for Distributed Real-Time Systems
- Dogan Ulus: Pattern Matching with Time: Theory and Applications
- Rim El Ballouli, Saddek Bensalem, Marius Bozga, Joseph Sifakis: Programming Dynamic Reconfigurable Systems
- Emmanouela Stachtiari, Anastasia Mavridou, Panagiotis Katsaros, Simon Bliudze, Joseph Sifakis: Early validation of system requirements and design through correctness-by-construction
- Stéphane Devismes, David Ilcinkas, Colette Johnen: Silent self-stabilizing scheme for spanning-tree-like constructions
- Dejan Nickovic, Olivier Lebeltel, Oded Maler, Thomas Ferrére, Dogan Ulus: AMT 2.0: Qualitative and Quantitative Trace Analysis with Extended Signal Temporal Logic
Jobs and internships
- Jobs and internships
- Phd Proposal : Inférence de modèles de faute pour simulation d’attaques sur composants sécurisés
- Phd proposal : Optimisation de l’évaluation et des tests de sécurité des systèmes cyber-physiques par analyse des canaux auxiliaires
- PHD proposal: Data Mining Dynamic Behaviors using Signal Temporal Logic
- Post-Doc and/or Research Engineer positions on Software Security
- STMicroelectronics
- [M2 internship] Self-Stabilization in TVG
