In the domain of security, verification is generally declined as robustness criteria and must be led against attacker models. We propose tools and technics dedicated to the evaluation of secure devices (smartcard or secured dongle) against fault attacks (such as laser or electromagnetic attacks). We are also interested for modeling and verifying other security requirements (confidentiality, integrity, isolation...) in particular in the context of Common Criteria certification.
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News
- Conferences
- 13 July 2018 ADSL 2018
- 26-28 september 2018 VECoS 2018
- 10-13 November 2018 RV 2018
Seminars
New publications
- Recent Publications
- Jonthan Salwan, Sebastien Bardin, Marie-Laure Potet: Binary Deobfuscation and Dynamic Symbolic Execution
- Victor Magron, George A. Constantinides, Alastair F. Donaldson: Certified Roundoff Error Bounds Using Semidefinite Programming
- Mohammad Al Khatib, Antoine Girard, Thao Dang: Scheduling of Embedded Controllers Under Timing Contracts
- Moustapha Lo, Nicolas Valot, Florence Maraninchi, Pascal Raymond: Real-time on-Board Manycore Implementation of a Health Monitoring System: Lessons Learnt
- Karine Altisen, Olivier Alphand, Rodolphe Bertolini, Stéphane Devismes, Ali Fahs, Franck Rousseau: Collision Prevention in Distributed 6TiSCH Networks
- Stéphane Devismes, David Ilcinkas, Colette Johnen: Self-Stabilizing Disconnected Components Detection and Rooted Shortest-Path Tree Maintenance in Polynomial Steps
Jobs and internships
- Jobs and internships
- Phd Position: Vulnerability search in Industrial Control Systems
- Phd Proposal : Inférence de modèles de faute pour simulation d’attaques sur composants sécurisés
- Phd proposal : Optimisation de l’évaluation et des tests de sécurité des systèmes cyber-physiques par analyse des canaux auxiliaires
- PHD proposal: Data Mining Dynamic Behaviors using Signal Temporal Logic
- Post-Doc and/or Research Engineer positions on Software Security
- [M1 internship] Modeling of Graph Topologies Using Coq
