Verimag

ATHOLE

Minalogic, 2007-2010

 Introduction

The ATHOLE project is part of the French initiative "competitivity poles" intended to create centers of specilized competitivity in various parts of France. The pole Minatec (micro-nano technologies) at Grenble aims at benefitting from the expertise in material sciences in general and semi-conductors in particular to facilitate the development of the future generation embedded systems. (links) The main focus of Athole is on next generation mobile platforms that need to satisfy the following, somewhat conflicting, requirements:

  1. Provide high computational throughput and process large amounts of data.
  2. Minimize power consumption to the minimum to prolonge battery life
  3. Be easy to design, validate and modify in order to meet time-to-market constraints

 Objectives

The project attacks these goals by exploring novel techniques and technologies that include:

  • Multi-core architectures with network-on-a-chip
  • Various means to control power consumption of these architectures
  • New techniques to map and schedule applications to these execution platforms to meet power and performance constraints
  • New methods for analyzing and estimating power consumtion at low-level as well as system level
  • Programming methodologies for stream processing applications, most notably video decoding and software-defined radio.

 Partners

 VERIMAG People involved

  • Oded Maler

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