BEGIN:VCALENDAR
CALSCALE:GREGORIAN
METHOD:PUBLISH
PRODID:-//129.88.40.24//NONSGML iCalcreator 2.6//
VERSION:2.0
SUMMARY:Evènements Verimag
X-WR-CALNAME:Evènements Verimag
X-WR-CALDESC:Liste des évènements (séminaires\, thèses\, ...) au labora
 toire Verimag.
X-WR-TIMEZONE:Europe/Paris
BEGIN:VEVENT
UID:20260426T171800CEST-2997EdPwTs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 July 2026 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nLéo Colisson Palais\, UGA (LJK - CASC)\nhttps://leo.colisson.me/\n\n
 « PROVISOIRE: Preuves formelles en Crypto » \n\nRésumé :\n\nTBA\n\n\n
 \n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semina
 rs\,62.html?lang=en\nLocation/Vision: Room 206 (2nd floor\, badged access)
  - https://batiment.imag.fr/fr/contact-adresses-plan-dacces\nTo unsubscrib
 e\, reply to this mail with UNSUBSCRIBE in the subject\n= = = = = = = = = 
 = = = = = = = = = = = = =...
DTSTART:20260702T140000
DTEND:20260702T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Léo Colisson Palais - PROVISOIRE: Preuves formelles en Crypto
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3000tl5vGC@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 May 2026 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nClara Bourgeais\, Univ. Grenoble Alpes Grenoble INP\, LCIS\nhttps://clar
 face.github.io/\n\n« Modification du back-end d'un compilateur pour la s
 écurité : étude de cas sur une contre-mesure contre les attaqs par cana
 ux auxiliaires (Compiler Back-end Modification for Security : a SCA Counte
 rmeasure Case Study) » \n\nRésumé :\n\nLa compilation sécurisante devi
 ent un élément essentiel dans la sécurité.\nCependant\, les contributi
 ons dans ce domaine concernent principalement des applications de contreme
 sures dans le...
DTSTART:20260521T140000
DTEND:20260521T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Clara Bourgeais - Modification du back-end d'un compilateur pour la
  sécurité : étude de cas sur une contre-mesure contre les attaqs par ca
 naux auxiliaires (Compiler Back-end Modification for Security : a SCA Coun
 termeasure Case Study)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3003uJkD22@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 April 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMarek BUCKI\, Twinsight Medical et UGA\nhttps://twinsight-medical.com/
 services-fr/\n\n« Conception de logiciels critiques -- retour d’expéri
 ence du domaine médical\, et questionnement sur la pratique et l'enseigne
 ment de méthodes de design des logiciels » \n\nRésumé :\n\nJe vous pro
 pose de partager avec vous mon expérience en tant que consultant auprès 
 des entreprises dans le domaine du logiciel médical. Je vous présenterai
  également une méthode très simple que je mets en place depuis 20 ans e
 t qui permet...
DTSTART:20260430T140000
DTEND:20260430T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Marek BUCKI - Conception de logiciels critiques -- retour d’exp
 érience du domaine médical\, et questionnement sur la pratique et l'ense
 ignement de méthodes de design des logiciels
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-300747wCdV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 April 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMohamed Graiet\, directeur de l'ISIM Monastir\, Tunisie\nhttps://schol
 ar.google.com/citations?user=21cLtOsAAAAJ\n\n« Approche formelle Généri
 que de Transfert Learning (GTL) dans le continuum CEI » \n\nRésumé :\n
 \nL'une des technologies qui devient incontournable dans le continuum CEI 
 (Cloud\, Edge\, Iot) est l'apprentissage automatique (Machine Learning). E
 n raison de l'avancement de la recherche dans ce domaine\, les algorithmes
  Machine Learning nécessitent une capacité de calcul considérable\, ce 
 qui est...
DTSTART:20260402T140000
DTEND:20260402T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mohamed Graiet - Approche formelle Générique de Transfert Learnin
 g (GTL) dans le continuum CEI
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3010fMrtod@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 March 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nYoussouf Oualhadj\, Univ. Paris-Est Creteil Val de Marne (LACL)\nhttps
 ://www.lacl.fr/~youalhadj/\n\n« Rational Synthesis in Resource-Constraine
 d Multi-Agent Systems » \n\nAbstract:\n\nRational synthesis studies the a
 utomatic construction of controllers that interact with rational agents pu
 rsuing their own objectives. Rather than assuming a hostile environment\, 
 this framework accounts for strategic behavior and equilibrium reasoning i
 n multi-agent systems. In this talk\, we consider rational synthesis in th
 e presence of...
DTSTART:20260319T140000
DTEND:20260319T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Youssouf Oualhadj - Rational Synthesis in Resource-Constrained Mult
 i-Agent Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3012d1nE67@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 January 2026 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nJoseph Sifakis\, Verimag\nhttps://sifakis.net/\n\n« Bringing AI to 
 Autonomous Systems » \n\nAbstract:\n\nAutonomous systems are distributed 
 systems composed of agents\, each pursuing its own goals\, but which must 
 coordinate to satisfy the overall goals of the system. \n\nMain points cov
 ered:\n\n1. We analyze the characteristics of autonomous systems\, explain
 ing that they underlie a multifaceted concept of intelligence that cannot 
 be characterized by conversational behavioral tests such as the Turing tes
 t.\n\n2. We...
DTSTART:20260122T140000
DTEND:20260122T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - Bringing AI to Autonomous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3015MpXX9U@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 19 January 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nAlban Reynaud\, Verimag\nhttps://github.com/AeneasVerif/mechanized-llb
 c/tree/jfla-2026\n\n« Formal Verification of Borrow-Checking by Local Com
 mutation Diagrams » \n\nAbstract:\n\nThe Rust programming language provid
 es a safe alternative to C and C++ for system programming. In particular\,
  it achieves memory safety with an ownership-based typing discipline\, pro
 viding a notion of borrows as a restriction on aliasable pointers. The dis
 cipline of borrows is statically enforced by a component of the compiler c
 alled the...
DTSTART:20260119T140000
DTEND:20260119T143000
DURATION:PT0H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alban Reynaud - Formal Verification of Borrow-Checking by Local Com
 mutation Diagrams
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3017DtJLIz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 December 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJérémie Decouchant\, TU Delft (Pays-Bas)\nhttps://sites.google.co
 m/view/jdecouchant/accueil\n\n« Defending TEE-aided Blockchain Consensus 
 against Rollback Attacks » \n\nAbstract:\n\nIn this talk\, I will first p
 rovide some background on Damysus (EuroSys'21)\, an efficient Byzantine Fa
 ult-Tolerant (BFT) consensus protocol that uses Trusted Execution Environm
 ents (TEEs) to achieve resilience with fewer replicas and reduced communic
 ation rounds compared to protocols like HotStuff.\n\nWe will then see how 
 rollback...
DTSTART:20251218T140000
DTEND:20251218T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jérémie Decouchant - Defending TEE-aided Blockchain Consensus aga
 inst Rollback Attacks
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3020vZ4nsA@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 December 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nThaïs Baudon\, University of Kent (UK)\nhttps://perso.ens-lyon.fr/
 thais.baudon/\n\n« Compiling types and other high-level language features
  for performance or security » \n\nAbstract:\n\nThe first part of this ta
 lk will present the Ribbit language and compiler\, which aim to combine th
 e convenience and safety of Algebraic Data Types (ADTs) with the fine cont
 rol over memory representation required in high-performance applications. 
 ADTs provide nice data abstractions and an elegant way to express function
 s through...
DTSTART:20251211T140000
DTEND:20251211T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thaïs Baudon - Compiling types and other high-level language featu
 res for performance or security
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3023gVp7dU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 December 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJannik LAVAL\, DISP - IUT Lumière de Lyon2 \nhttp://jannik-laval.e
 u/\n\n« Jumeaux Numériques : Les sciences du logiciel au cœur de la tra
 nsformation industrielle (Digital Twins: software engineering at the heart
  of industrial transformation) » \n\nRésumé :\n\nUn jumeau numérique e
 st défini comme une représentation virtuelle (modèle) d'un objet\, d'un
  processus ou d'un système avec lequel il est synchronisé. Le concept a 
 émergé pour répondre au besoin de contrôler\, maitriser\, prévoir des
 ...
DTSTART:20251204T140000
DTEND:20251204T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jannik LAVAL - Jumeaux Numériques : Les sciences du logiciel au c
 œur de la transformation industrielle (Digital Twins: software engineerin
 g at the heart of industrial transformation)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3025NvPJcW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  1 December 2025 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nSylvain BOULME\, Verimag\nhttps://www-verimag.imag.fr/~boulme/\n\n« 
 Introduction à la programmation orientée objet en Crystal » \n\nRésum
 é :\n\nAu second semestre 2025-2026\, un nouveau cours optionnel en Ensim
 ag 1A sur les 'paradigmes de programmation' va proposer 10h de cours/TP po
 ur découvrir le paradigme 'orienté objet' à travers le langage Crystal.
  Ce séminaire correspond au cours d'introduction de 1h pour présenter Cr
 ystal et des aspects sémantiques de la programmation orientée objet.\n\n
 Crystal est...
DTSTART:20251201T140000
DTEND:20251201T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain BOULME - Introduction à la programmation orientée objet e
 n Crystal
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3028b3zEMa@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 25 November 2025 - Room 106 (1st f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 106 (1st floor\, badged acces
 s)\n\nVéronique Cortier\, CNRS - LORIA\nhttps://members.loria.fr/VCortier
 /\n\n« Electronic voting: design\, attack\, and formal verification » \n
 \nAbstract:\n\nElectronic voting aims at guaranteeing apparently conflicti
 ng\nproperties: no one should know how I voted and yet\, I should be able 
 to\ncheck that my vote has been properly counted. Electronic voting belong
 s\nto the large family of security protocols\, that aim at securing\ncommu
 nications against powerful adversaries that may read\, block\, and\nmodify
  messages.\nIn...
DTSTART:20251125T140000
DTEND:20251125T150000
DURATION:PT01H0M0S
LOCATION:Room 106 (1st floor\, badged access)
SUMMARY:Véronique Cortier - Electronic voting: design\, attack\, and forma
 l verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3030A3PDDl@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 21 November 2025 - Amphithéâtre - 
 Maison du doctorat Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = = =\n14:00 - Salle : Amphithéâtre - Maiso
 n du doctorat Jean Kuntzmann\n\nOussama Oulkaid\, Verimag - LIP (Lyon) - A
 niah\nhttps://oulkaid.github.io/\n\n« Formal models of integrated circuit
 s for transistor level electrical verification » \n\nAbstract:\n\nChip de
 sign is a highly complex task. It involves large teams of engineers with a
  wide range of skills. Their collective goal is to build chips that confor
 m to their respective specifications\, and that are bug-free. Despite the 
 efforts made\, it is not uncommon for manufactured chips to contain design
  errors...
DTSTART:20251121T140000
DTEND:20251121T170000
DURATION:PT03H0M0S
LOCATION:Amphithéâtre - Maison du doctorat Jean Kuntzmann
SUMMARY:Oussama Oulkaid - Formal models of integrated circuits for transist
 or level electrical verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3033Z0Skjc@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 November 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n15:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nYann Herklotz\, VCA lab at EPFL (CH)\nhttps://yannherklotz.com/\n\n
 « Towards scalable verification and efficient hardware generation using v
 erified high-level synthesis tools » \n\nRésumé :\n\nLes entreprises de
  design hardware passent plus de 60% de leur temps uniquement à vérifier
  que les puces qu'elles conçoivent fonctionnent comme prévu. Face à la 
 montée en complexité et en besoins des accélérateurs hardware personna
 lisés\, les designers travaillent sur le hardware à différents niveaux.
 ..
DTSTART:20251113T150000
DTEND:20251113T170000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yann Herklotz - Towards scalable verification and efficient hardwar
 e generation using verified high-level synthesis tools
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3035unxxu7@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 October 2025 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:30 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nNicolas Chappe\, Verimag\nhttps://www-verimag.imag.fr/~chappen/\n\n
 « Representing and reasoning about nondeterministic programs » \n\nAbstr
 act:\n\nNondeterminism plays a key role in various aspects of the semantic
 s of programming languages: concurrency\, undefined behaviors\, weak memor
 y models\, etc. However\, the formalization of nondeterministic semantics 
 can be subtle. I will talk about several contributions I have made over th
 e past few years to help reasoning about such nondeterministic programs.\n
 \nFirst\, I am a...
DTSTART:20251016T143000
DTEND:20251016T163000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicolas Chappe - Representing and reasoning about nondeterministic 
 programs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3037Vdwxrh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 October 2025 - BBB\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : BBB\n\nTiago Cogumbreiro\, University of Massachusetts\, Boston\nht
 tps://cogumbreiro.github.io/\n\n« Verifying GPU programs with Memory Acce
 ss Protocols » \n\nAbstract:\n\n*** Tiago is likely to applying to DR CNR
 S ***\n\nGPUs offer parallelism as a commodity\, but they are difficult to
  program correctly.Static analyzers that guarantee data-race freedom (DRF)
  are essential to help programmers establish the correctness of their prog
 rams (kernels).However\, existing approaches produce too many false alarms
  and struggle to handle larger programs.\n\nTo address these limitations w
 e introduce...
DTSTART:20251009T140000
DTEND:20251009T150000
DURATION:PT01H0M0S
LOCATION:BBB
SUMMARY:Tiago Cogumbreiro - Verifying GPU programs with Memory Access Proto
 cols
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3040Dhn0Hx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 October 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nEduardo Camponogara\, Federal University of Santa Catarina\n\n\n« For
 mal Analysis of Optimization-based Controllers Approximated by ReLU Neural
  Nets » \n\nAbstract:\n\nAbstract: This talk presents a novel reachabilit
 y analysis method for closed-loop systems in which an optimization-based c
 ontroller is approximated by a ReLU neural network. The algorithm performs
  exact reachability analysis for discrete-time LTI systems controlled by R
 eLU neural networks\, as well as for systems both described and controlled
  by such...
DTSTART:20251003T100000
DTEND:20251003T120000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Eduardo Camponogara - Formal Analysis of Optimization-based Control
 lers Approximated by ReLU Neural Nets
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3043U6eUtN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nNikolaus Huber\, Uppsala University\nhttps://www.n-huber.eu\n\n« Mimo
 sa: A Language Design for Modern Embedded Systems » \n\nAbstract:\n\n Emb
 edded systems have evolved beyond simple\, single microcontroller applicat
 ions and are nowadays deployed on increasingly complex platforms\, often i
 ncluding multi- and many-core processors and even custom accelerators. Whi
 le the synchronous paradigm is frequently used to ensure real-time behavio
 ur in simpler systems\, it becomes difficult to maintain this abstraction 
 as hardware...
DTSTART:20250626T140000
DTEND:20250626T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nikolaus Huber - Mimosa: A Language Design for Modern Embedded Syst
 ems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3045TSxS64@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 13 June 2025 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSelma Saidi\, TU Braunschweig\nhttps://www.ida.ing.tu-bs.de/team/saidi#c
 4984\n\n« Connected Minds: Leveraging Collective Reasoning for Autonomous
  Systems » \n\nRésumé :\n\nAbstract: \n In this talk we will explore ho
 w collective intelligence\, a concept long studied in social sciences\, is
  becoming essential for enhancing reliability and safety of distributed au
 tonomous systems in fields like automated driving and robotics. The talk w
 ill in particular focus on the need for developing novel computing paradig
 ms for...
DTSTART:20250613T100000
DTEND:20250613T110000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Selma Saidi - Connected Minds: Leveraging Collective Reasoning for 
 Autonomous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3049gEAkdr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMaher Mallem\, INRIA Lyon\nhttps://www.lip6.fr/actualite/personnes-fic
 he.php?ident=D2525\n\n« Parameterized complexity of scheduling problems w
 ith precedence delays » \n\nAbstract:\n\nIn scheduling problems it is com
 monplace to have a precedence graph\, which asks that some tasks must be c
 ompleted before starting some other task. Time constraints which relate a 
 task to its predecessors - like a latency\, a setup time or a countdown ti
 mer - can be modeled by precedence delays. Given a precedence constraint f
 rom task i to...
DTSTART:20250612T140000
DTEND:20250612T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Maher Mallem - Parameterized complexity of scheduling problems with
  precedence delays
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3051CJFWmU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSébastien Michelland\, Grenoble INP\, LCIS\nhttps://silent-tower.net/
 research/\n\n« Secure compilation—with the compiler\, not against: firs
 t experiments on 'Tracing LLVM' » \n\nAbstract:\n\nCountermeasures agains
 t fault injection or side-channels attacks that have software components a
 ll face the same tension: on one hand\, defeating accurate\, micro-archite
 ctural attack models requires precise control of assembler code\; on the o
 ther hand\, security requirements are application-specific and originate i
 n the source code...
DTSTART:20250605T140000
DTEND:20250605T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien Michelland - Secure compilation—with the compiler\, no
 t against: first experiments on 'Tracing LLVM'
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3054vsl2vS@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 April 2025 - Zoom UGA 959 9591
  1882 -- Passcode: 063113\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n14:00 - Salle : Zoom UGA 959 9591 1882 -- Pass
 code: 063113\n\nRiadh ROBBANA\, INSAT  - Université de Carthage\n\n\n« L
 e Vote Électronique Sécurisé à l’Ère de la Blockchain : Contexte\, 
 Défis et Solutions Innovantes » \n\nRésumé :\n\nDans un contexte où l
 a confiance et la transparence dans les processus électoraux deviennent e
 ssentielles\, la blockchain ouvre la voie à des systèmes de vote en lign
 e plus fiables. Cette présentation explore deux protocoles novateurs de v
 ote en ligne\, co-proposés avec Marwa CHAIEB\, Pascal LAFOURCADE et Souhe
 ib YOUSFI\,...
DTSTART:20250417T140000
DTEND:20250417T150000
DURATION:PT01H0M0S
LOCATION:Zoom UGA 959 9591 1882 -- Passcode: 063113
SUMMARY:Riadh ROBBANA - Le Vote Électronique Sécurisé à l’Ère de la 
 Blockchain : Contexte\, Défis et Solutions Innovantes
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-305777OVBO@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 11 April 2025 - Auditorium (Building
  IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n15:00 - Salle : Auditorium (Building IMAG)\n\nHadi Dayekh\, VERIM
 AG\n\n\n« L'apprentissage passif et actif des systèmes dynamiques non li
 néaires commutés (Passive and Active Learning of Switched Nonlinear Dyna
 mical Systems) » \n\nRésumé :\n\nLes systèmes cyber-physiques\, qui co
 mbinent des processus physiques avec des éléments computationnels\, pr
 ésentent souvent une dynamique hybride\, avec des comportements continus 
 et discrets en interaction. De telles dynamiques hybrides apparaissent dan
 s de nombreuses applications\, de la robotique aux systèmes biologiques..
 ..
DTSTART:20250411T150000
DTEND:20250411T190000
DURATION:PT04H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hadi Dayekh - L'apprentissage passif et actif des systèmes dynamiq
 ues non linéaires commutés (Passive and Active Learning of Switched Nonl
 inear Dynamical Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3059LgwunV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 March 2025 - Zoom (Meeting ID:
  986 9236 8072\; Passcode: 923483)\n= = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = =\n14:00 - Salle : Zoom (Meeting ID: 986
  9236 8072\; Passcode: 923483)\n\nYoussouf Oualhadj\, Université Paris-Es
 t Créteil Val de Marne (LACL)\nhttps://www.lacl.fr/~youalhadj/\n\n« Robu
 st timed synthesis » \n\nAbstract:\n\nSolving games played on timed autom
 ata is a well-known problem and has led to tools and industrial case studi
 es. In these games\, the first player (Controller) chooses delays and acti
 ons and the second player (Environment) resolves the non-determinism of ac
 tions. However\, the model of timed automata suffers from mathematical ide
 alizations...
DTSTART:20250327T140000
DTEND:20250327T160000
DURATION:PT02H0M0S
LOCATION:Zoom (Meeting ID: 986 9236 8072\; Passcode: 923483)
SUMMARY:Youssouf Oualhadj - Robust timed synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3062vCzJks@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 March 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nThomas Carle\, IRIT\, Toulouse Univ.\n\n\n« MINOTAuR: a timing-predic
 table RiscV (CVA6) core » \n\nAbstract:\n\nReal-time systems stand out fr
 om conventional computer systems by the existence of temporal constraints 
 that must absolutely be respected. They are generally specified in the for
 m of tasks with associated deadlines. When designing a real-time system\, 
 an upper bound for the the worst-case execution time for each task must be
  determined\, which is then which is then used to guarantee compliance wit
 h deadlines in...
DTSTART:20250313T140000
DTEND:20250313T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thomas Carle - MINOTAuR: a timing-predictable RiscV (CVA6) core
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3064rMvdku@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 March 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nYannick Chevalier\, Univ. Toulouse 3\, IRIT\nhttps://www.irit.fr/~Yann
 ick.Chevalier/\n\n« Logique et Cybersécurité » \n\nRésumé :\n\nLe do
 maine de la cybersécurité offre un vaste champ d'applications au logicie
 n\, car la complexité des systèmes informatiques modernes et le besoin d
 e garantie de propriétés de sécurité nécessite l'utilisation et le d
 éveloppement de techniques de preuve automatique adaptées. Si ces techni
 ques sont adaptées pour l'analyse locale de la sécurité (d'un protocole
 \, d'un...
DTSTART:20250306T140000
DTEND:20250306T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Chevalier - Logique et Cybersécurité
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3067livvHs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2025 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nNiklas Kochdumper\, IRIF\, Université Paris Cité\n\n\n« Reachabil
 ity Analysis and its Application to Verification and Control of Cyber-Phys
 ical Systems » \n\nAbstract:\n\nModern cyber-physical systems\, such as a
 utonomous cars\, surgical robots\, or power systems\, often exhibit highly
  nonlinear dynamics\, making them hard to analyze\, verify\, and control. 
 In addition\, with the current trend towards artificial intelligence\, cyb
 er-physical systems are often combined with neural network components\, wh
 ich increases their...
DTSTART:20250123T140000
DTEND:20250123T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Niklas Kochdumper - Reachability Analysis and its Application to Ve
 rification and Control of Cyber-Physical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3069mu5Rfr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 December 2024 - GIPSA-Lab \, Sa
 lle JM Chassery\, 11 rue des Maths \n= = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = = = =\n14:00 - Salle : GIPSA-Lab \, Salle J
 M Chassery\, 11 rue des Maths \n\nBob AUBOUIN-PAIRAULT\, Université Greno
 ble Alpes\, VERIMAG\, GIPSA-Lab\n\n\n« Data-based anesthesia process mode
 lling for online monitoring and prediction » \n\nAbstract:\n\nThis thesis
  explores computational methods to enhance the safety and effectiveness of
  anesthesia management\, a critical yet complex aspect of modern surgery. 
 By leveraging control theory and machine learning\, the work focuses on im
 proving the use of intravenous drugs like propofol and remifentanil to reg
 ulate the depth...
DTSTART:20241212T140000
DTEND:20241212T160000
DURATION:PT02H0M0S
LOCATION:GIPSA-Lab \, Salle JM Chassery\, 11 rue des Maths
SUMMARY:Bob AUBOUIN-PAIRAULT - Data-based anesthesia process modelling for 
 online monitoring and prediction
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3072zbp6Ot@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 December 2024 - Amphi C002 - B
 âtiment Ampère de l'Ensimag\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n15:00 - Salle : Amphi C002 - Bâtiment Amp
 ère de l'Ensimag\n\nLucas Bueri\, Verimag\n\n\n« Logics for Reasoning ab
 out the Correctness of Reconfigurable Distributed Systems » \n\nAbstract:
 \n\nDistributed computing is increasingly used\, and requires regular modi
 fications to remain efficient. However it can be penalizing or impossible 
 to stop such systems\, hence the use of dynamic reconfiguration. As this i
 s a major source of errors\, the need for modelling and verification is es
 sential\, and this is what we aim to contribute with our logical framework
 .\nThis thesis...
DTSTART:20241212T150000
DTEND:20241212T190000
DURATION:PT04H0M0S
LOCATION:Amphi C002 - Bâtiment Ampère de l'Ensimag
SUMMARY:Lucas Bueri - Logics for Reasoning about the Correctness of Reconfi
 gurable Distributed Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3074Xw0D4L@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  2 December 2024 - Amphitéatre MJK
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Amphitéatre MJK\n\nThomas Vigouroux\, Verimag\n\n\n« 
 Analyses quantitatives pour les attaquants adaptatifs (Quantitative analys
 is for adaptive attackers) » \n\nAbstract:\n\nEvaluating the security of 
 a program is a notoriously difficult task\, but of paramount importance co
 nsidering the prevalence of computer systems in today’s world.\n\nA poss
 ible path towards security evaluation proceeds in steps: first search for 
 vulnerabilities or bugs within the program\, then evaluate how to turn sai
 d bugs into profit\, whether it be information or capabilities with respec
 t to the...
DTSTART:20241202T140000
DTEND:20241202T160000
DURATION:PT02H0M0S
LOCATION:Amphitéatre MJK
SUMMARY:Thomas Vigouroux - Analyses quantitatives pour les attaquants adapt
 atifs (Quantitative analysis for adaptive attackers)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3077Vh6gJF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 November 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nGrégoire BUSSONE\, ENS\, équipe Parkas (Inria-ENS)\n\n\n« Rédui
 re les copies et l'utilisation mémoire dans les langages synchrones (Redu
 cing copies and memory consumption in synchronous languages) » \n\nRésum
 é :\n\nLes systèmes réactifs embarqués sont des systèmes interagissan
 t périodiquement avec leur environnement\, par la lecture de capteurs et 
 l'activation d'actionneurs. Les ingénieurs modélisent ces systèmes sous
  forme de schémas blocs\, qui sont transcrits par le logiciel de modélis
 ation dans un...
DTSTART:20241128T140000
DTEND:20241128T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Grégoire BUSSONE - Réduire les copies et l'utilisation mémoire d
 ans les langages synchrones (Reducing copies and memory consumption in syn
 chronous languages)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3079IECwWu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 20 November 2024 - Room 206 (2nd
  floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acc
 ess)\n\nChao Huang\, University of Southampton\, UK\nhttps://chaohuang2018
 .github.io/\n\n« Safe Reinforcement Learning with Verification in the Los
 s » \n\nRésumé :\n\n \n\nAbstract:\n\nAbstract: Reinforcement learning 
 (RL) is one of the main areas in machine learning\, of which the basic ide
 a is that an agent will interact with the environment and use the feedback
  to update its control policy. Compared with the classical control algorit
 hms\, RL can be used in a complex or even unknown environment. However\, d
 ue to the...
DTSTART:20241120T140000
DTEND:20241120T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Chao Huang - Safe Reinforcement Learning with Verification in the L
 oss
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3082VaEM8V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 November 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nLisa Maile\, TU Braunschweig (Germany)\nhttps://www.ida.ing.tu-bs.d
 e/team/lisa-maile\n\n« Real-Time Communication with Dynamic Network Traff
 ic using Time-Sensitive Networking  » \n\nAbstract:\n\nSafety-critical ta
 sks in today's world depend on networks that must avoid information loss o
 r unexpected delays. The growing demand for robust and responsive networks
  has led to the emergence of Time-Sensitive Networking (TSN)\, which provi
 des deterministic data transmission for real-time communications. However\
 , TSN lacks...
DTSTART:20241114T140000
DTEND:20241114T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lisa Maile - Real-Time Communication with Dynamic Network Traffic u
 sing Time-Sensitive Networking
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3084Nl8vz8@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 November 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nAurèle Barrière\, EPFL\nhttps://people.epfl.ch/aurele.barriere\n
 \n« Formal Verification Beyond Traditional Compilation » \n\nAbstract:\n
 \nModern dynamic programming language implementations often use compilatio
 n\, but do so in atypical ways.  In this talk\, I focus on two concrete ex
 amples from dynamic languages implementations.\n\nFirst\, many dynamic lan
 guage implementations use Just-in-Time (JIT) compilation for performance. 
 JITs interleave the execution of a program\, its optimizations\, and nativ
 e compilation. ...
DTSTART:20241107T140000
DTEND:20241107T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Aurèle Barrière - Formal Verification Beyond Traditional Compilat
 ion
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3086zmBccz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 June 2024 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nNicolas Chappe\, ENS-Lyon\, LIP\, CASH\n\n\n« Executable semantics ba
 sed on Choice Trees for a concurrent subset of LLVM IR » \n\nAbstract:\n
 \nMonadic interpreters have gained increasing attention as a powerful tool
  for modeling and reasoning about first order languages. In the Coq ecosys
 tem\, our Choice Trees (CTrees) library provides generic tools to craft su
 ch monadic interpreters while supporting concurrency with nodes encoding n
 on-deterministic choice. This monadic approach allows the definition of pr
 ogramming...
DTSTART:20240627T140000
DTEND:20240627T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicolas Chappe - Executable semantics based on Choice Trees for a c
 oncurrent subset of LLVM IR
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3089E4XCbu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 19 June 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n09:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nJean-François MONIN\, Verimag\, Polytech Grenoble.\nhttps://www-verim
 ag.imag.fr/~monin/\n\n« Recent advances on the Braga method » \n\nAbstra
 ct:\n\nThe Braga method\, designed by D. Larchey-Wendling and J-F. Monin\,
  allows us to define in Coq recursive programs without a priori knowledge 
 on their termination domain\, to be be extracted 'as expected' in\, say\, 
 OCaml. More precisely\, it is enough to know in advance *how* termination 
 is ensured\, but not *why*\, and this 'how' is syntactically derived from 
 the intended code to...
DTSTART:20240619T093000
DTEND:20240619T113000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jean-François MONIN - Recent advances on the Braga method
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-30925otIFb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 18 June 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n09:30 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMatthieu Sozeau\, Inria (Galinette)\, Université de Nantes\nhttps://soz
 eau.gitlabpages.inria.fr/www/\n\n« Verified Extraction from Coq to OCaml 
 » \n\nAbstract:\n\nJoint work of Yannick Forster\, Matthieu Sozeau and Ni
 colas Tabareau.\n\nOne of the central original features of the Coq proof a
 ssistant is extraction\, i.e.\, the ability to obtain efficient programs i
 n industrial programming languages such as OCaml\, Haskell\, or Scheme fro
 m programs written in Coq's expressive  dependent type theory. Extraction 
 is of great...
DTSTART:20240618T093000
DTEND:20240618T113000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Sozeau - Verified Extraction from Coq to OCaml
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3094T2JUT0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 17 June 2024 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n16:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nBasile GROS\, Verimag\, UGA\n\n\n« Small Inversions in Coq  » \n\nAbst
 ract:\n\nThe inversion tactic is one of the most powerful reasoning techni
 que in the Coq proof assistant.\nHowever\, it produces proof terms that ar
 e clunky and unpredictable.\n\nJ-F Monin has proposed a lightweight approa
 ch to inversion by defining intermediate data structures and using the des
 truct tactic. This new technique is more transparent and produces readable
  proof terms.\n\nWe propose a mechanized version of the technique by lever
 aging the...
DTSTART:20240617T160000
DTEND:20240617T180000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Basile GROS - Small Inversions in Coq
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3097huXPcW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 17 June 2024 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSylvain BOULME\, Verimag\, Grenoble-INP Ensimag\nhttp://www-verimag.imag
 .fr/~boulme/\n\n« Toward a FFI (Foreign Function Interface) for embedding
  untrusted imperative OCaml into Coq-verified computations. » \n\nAbstrac
 t:\n\nThe naive embedding of imperative OCaml functions as Coq functions w
 ith linking at extraction is unsound. A famous example of such an unsound 
 embedding is the register allocator of CompCert. In the case of CompCert\,
  we can reasonably argue that this unsoundness should not produce a bug\, 
 but this is...
DTSTART:20240617T140000
DTEND:20240617T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain BOULME - Toward a FFI (Foreign Function Interface) for embe
 dding untrusted imperative OCaml into Coq-verified computations.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3099cTdUdj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 May 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMohamed Maghenem\, CNRS\, GIPSA-lab\, Grenoble\n\n\n« A Hybrid-Systems 
 Framework for Distributed Gradient-Based Estimation » \n\nAbstract:\n\nWe
  address the classical problem of estimating the constant unknown paramete
 rs of a given linear input/output relationship.\nMotivated by large-scale 
 estimation problems and concurrent learning\, the proposed method uses a n
 etwork of gradient-descent-based estimators\, each of which explores only 
 a subset of (local) input-output data.\nA key feature of the method is tha
 t the...
DTSTART:20240530T140000
DTEND:20240530T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mohamed Maghenem - A Hybrid-Systems Framework for Distributed Gradi
 ent-Based Estimation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3102j5Rjv6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 May 2024 - BBB\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle
  : BBB\n\nGaiyun Liu\, GREAH\nhttps://web.xidian.edu.cn/gyliu/en/index.htm
 l\n\n« Modeling\, analysis\, and supervisory control of networked discret
 e event systems » \n\nAbstract:\n\nThis talk centers around the modeling\
 , analysis\, and supervisory control of networked discrete event systems (
 DESs). The first part of the talk provides a succinct introduction to Petr
 i nets. We will illustrate the application of Petri nets in the modeling a
 nd analysis of DESs\, using an automated manufacturing system as a demonst
 rative example. Also\, we will show the process of designing supervisors f
 or DESs using...
DTSTART:20240516T140000
DTEND:20240516T150000
DURATION:PT01H0M0S
LOCATION:BBB
SUMMARY:Gaiyun Liu - Modeling\, analysis\, and supervisory control of netwo
 rked discrete event systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-31049gHBVp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 May 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n13:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMatthieu Moy\, Univ. Lyon 1 - LIP (CASH)\nhttps://matthieu-moy.fr/spip/
 \n\n« How to Build a Broken System?  » \n\nAbstract:\n\nThe talk summari
 zes my research activities since the beginning of my carreer\, at Verimag 
 and then at LIP (Lyon). I will present some of my work on embedded system 
 design and verification\, and on high-performance computing. I present sev
 eral categories of mistakes that can be made designing these systems (func
 tional errors\, performance issues\, etc.)\, and solutions I worked on. Th
 e talk concludes...
DTSTART:20240502T130000
DTEND:20240502T150000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Moy - How to Build a Broken System?
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3107hNfonh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 April 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nAkram Idani\, LIG (Vasco)\, Ensimag\nhttps://lig-membres.imag.fr/idani
 /\n\n« Formal Model-Driven Engineering » \n\nAbstract:\n\nMy research wo
 rks are dedicated to the integration of two well known paradigms: Formal M
 ethods (FM) and Model-Driven Engineering (MDE). I call this integration Fo
 rmal MDE (FMDE). In fact\, several works have been already done in order t
 o strengthen the MDE paradigm with formal reasoning\, and therefore make i
 t more viable as far as safety and security concerns have to be addressed.
  When taken...
DTSTART:20240418T140000
DTEND:20240418T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Akram Idani - Formal Model-Driven Engineering
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3109JvoRgE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 15 April 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSubhajit Roy\, Indian Institute of Technology Kanpur\nhttps://www.cse.ii
 tk.ac.in/users/subhajit/\n\n« Satisfiability modulo fuzzing: a synergisti
 c combination of SMT solving and fuzzing » \n\nAbstract:\n\nProgramming l
 anguages and software engineering tools routinely encounter components tha
 t are difficult to reason on via formal techniques or whose formal semanti
 cs are not even available—third-party libraries\, inline assembly code\,
  SIMD instructions\, system calls\, calls to machine learning models\, etc
 . However\, often...
DTSTART:20240415T140000
DTEND:20240415T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Subhajit Roy - Satisfiability modulo fuzzing: a synergistic combina
 tion of SMT solving and fuzzing
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3111HurohR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 April 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nAndrei Paskevich\, Univ. Paris-Saclay (LMF) - Inria Saclay (Toccata)\n
 http://tertium.org/\n\n« Coma: an intermediate verification language with
  explicit abstraction barriers » \n\nAbstract:\n\nComa is a minimalistic 
 algorithmic language designed for deductive verification. It adopts the co
 ntinuation-passing style which allows us to express in a natural manner th
 e standard control structures — conditionals\, loops\, subroutine calls\
 , and exception handling — using only three elementary constructions.\n
 \nThe...
DTSTART:20240411T143000
DTEND:20240411T163000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Andrei Paskevich - Coma: an intermediate verification language with
  explicit abstraction barriers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3114Sxc6oJ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 April 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n13:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSébastien Michelland\, LCIS (UGA)\nhttps://silent-tower.net/research/
 \n\n« Abstract Interpreters: a Monadic Approach to Modular Verification 
 » \n\nAbstract:\n\nAbstract interpreters are a versatile type of static a
 nalyzers based on running programs in an “abstract domain” where termi
 nation is guaranteed. They're versatile because they have extensible compo
 nents (like lattices and iteration strategies) that can be switched freely
  to derive varied analyses that are all sound based on meta-theoretical ar
 guments. But...
DTSTART:20240404T133000
DTEND:20240404T153000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien Michelland - Abstract Interpreters: a Monadic Approach t
 o Modular Verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3116MavcBT@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 March 2024 - Room 206 (3rd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n13:15 - Salle : Room 206 (3rd floor\, badged access)
 \n\nAdel NOUREDDINE\, University of Pau\, laboratoire LIUPPA\nhttps://www.
 noureddine.org/\n\n« Observing energy consumption: from hardware to softw
 are source code » \n\nAbstract:\n\nReducing the energy and environmental 
 impacts of ICT is a necessity today for a sustainable computing future.\nO
 ptimizing energy in computing systems\, from IoT objects to data centers\,
  can also be addresses at the software level as software run and control t
 hese devices and systems.\nIn this talk\, we explore our approaches on obs
 erving software...
DTSTART:20240314T131500
DTEND:20240314T151500
DURATION:PT02H0M0S
LOCATION:Room 206 (3rd floor\, badged access)
SUMMARY:Adel NOUREDDINE - Observing energy consumption: from hardware to so
 ftware source code
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3119p0E5OF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 13 March 2024 - Room 306 (3rd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n10:30 - Salle : Room 306 (3rd floor\, badged access
 )\n\nInigo Incer\, CalTech and UC Berkley\n\n\n« Towards Provably Safe an
 d Secure Systems with Contract-Based Design » \n\nAbstract:\n\nThe task o
 f system design is shared by all engineering disciplines\, each coming wit
 h its own techniques. In spite of their differences in tools\, there is la
 rge intersection in their conceptual approach to design. In this talk\, we
  exploit this commonality to take an abstract view of systems and their co
 mposition. We understand systems and subsystems in terms of their assume-g
 uarantee...
DTSTART:20240313T103000
DTEND:20240313T123000
DURATION:PT02H0M0S
LOCATION:Room 306 (3rd floor\, badged access)
SUMMARY:Inigo Incer - Towards Provably Safe and Secure Systems with Contrac
 t-Based Design
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3121MIdEKU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 March 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSylvain Boulmé\, Verimag\, Grenoble-INP Ensimag\nhttp://www-verimag.i
 mag.fr/~boulme/\n\n« Développement logiciel formellement vérifié: pour
 quoi et comment ? » \n\nRésumé :\n\nDans le cadre de ma candidature au 
 poste de professeur Polytech/Verimag\, je tracerai un panorama de mes trav
 aux sur le développement logiciel formellement vérifié\, depuis que j'a
 i commencé (il y a presque 30 ans). Je situerai ces travaux dans les prob
 lématiques du génie logiciel: comment limiter l'impact des bugs dans les
  logiciels\;...
DTSTART:20240307T143000
DTEND:20240307T163000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain Boulmé - Développement logiciel formellement vérifié: p
 ourquoi et comment ?
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3123LwBsCW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 February 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nPaolo Ballarini\, CentraleSupélec - MCIS\nhttps://sites.google.com
 /site/pballarini/\n\n« Hybrid-Automata Specification Language: from expre
 ssive stochastic model checking to parametric stochastic model checking 
 » \n\nAbstract:\n\nProbabilistic model checking is concerned with providi
 ng modellers with an effective means for automatically assessing with what
  probability a model exhibits a given behaviour formally expressed by a te
 mporal logic specification. The ability to capture relevant behaviours dep
 ends on the...
DTSTART:20240222T140000
DTEND:20240222T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Ballarini - Hybrid-Automata Specification Language: from expr
 essive stochastic model checking to parametric stochastic model checking
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3126vAM1T0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 12 February 2024 - Auditorium (Build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n10:00 - Salle : Auditorium (Building IMAG)\n\nAina Rasoldier\,
  Inria\nhttps://ainar.as\n\n« Comment évaluer le potentiel d'une solutio
 n numérique face à l'urgence écologique ? Application aux plateformes d
 e covoiturage régulier à l'échelle locale » \n\nRésumé :\n\nAu vu de
  l'urgence écologique actuelle\, il est légitime de se demander quel est
  le potentiel des solutions numériques pour faire face à cette situation
 . Actuellement\, nous manquons de fondements scientifiques permettant de d
 écider si une solution numérique devrait être développée ou mise en p
 lace en...
DTSTART:20240212T100000
DTEND:20240212T130000
DURATION:PT03H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Aina Rasoldier - Comment évaluer le potentiel d'une solution num
 érique face à l'urgence écologique ? Application aux plateformes de cov
 oiturage régulier à l'échelle locale
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3129uT5elu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 February 2024 - Ensimag\, Amph
 i E\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Ensimag\, Amphi E\n\nSophie Morel\, CNRS - ENS-Lyon
 \nhttp://perso.ens-lyon.fr/sophie.morel\n\n« Formalisation d'un objet geo
 metrique dans l'assistant de preuve Lean: le cas des grassmanniennes. » 
 \n\nRésumé :\n\nLean (https://lean-lang.org) est un logiciel pour formal
 iser et vérifier des théories mathématiques. L'exposé s'adressera à d
 es néophytes de Lean et des assistants de preuve. Si r est un entier posi
 tif et V est un espace vectoriel (par exemple $\mathbb{R}^n$)\, la r-grass
 mannienne de V est l'ensemble des sous-espaces de dimension r de V\, qu'on
  peut aussi...
DTSTART:20240208T140000
DTEND:20240208T160000
DURATION:PT02H0M0S
LOCATION:Ensimag\, Amphi E
SUMMARY:Sophie Morel - Formalisation d'un objet geometrique dans l'assistan
 t de preuve Lean: le cas des grassmanniennes.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3131tWREO1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 December 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nAlessandro De Palma\, INRIA\nhttps://scholar.google.com/citations?u
 ser=IIx6YsQAAAAJ&hl=en\n\n« From Neural Network Verification to Efficient
  Robust Training » \n\nAbstract:\n\nFundamental concerns exist on the tru
 stworthiness of deep learning systems\, with examples including robustness
 \, fairness\, privacy and explainability. Phenomena like adversarial examp
 les prompt the need to train robust networks and to provide formal guarant
 ees on their behaviour. In this talk\, we will first introduce the neural 
 network...
DTSTART:20231214T140000
DTEND:20231214T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alessandro De Palma - From Neural Network Verification to Efficient
  Robust Training
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3134Sv5nvV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 12 December 2023 - Seminar Room 2\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n09:30 - Salle : Seminar Room 2\, ground fl
 oor (Building IMAG)\n\nLeo Gourdin\, VERIMAG\nhttps://lgourd.in/defense.ht
 ml\n\n« Validation Formelle de Transformations Intra-Procédurales par Si
 mulation Symbolique Défensive (Formal Validation of Intra-Procedural Tran
 sformations by Defensive Symbolic Simulation) » \n\nRésumé :\n\nLes com
 pilateurs sont des systèmes logiciels très complexes et peuvent donc con
 tenir des bogues. Ces bogues peuvent se traduire par des erreurs au cours 
 du processus de compilation ou\, plus ennuyeusement encore\, par la gén
 ération d’un...
DTSTART:20231212T093000
DTEND:20231212T113000
DURATION:PT02H0M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:Leo Gourdin - Validation Formelle de Transformations Intra-Procédu
 rales par Simulation Symbolique Défensive (Formal Validation of Intra-Pro
 cedural Transformations by Defensive Symbolic Simulation)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3136XcZx1v@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 November 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nYutaka Nagashima\, Huawei Technologies R&D (UK)\nhttps://unitedreas
 oning.com/\n\n« AI-Enhanced Theorem Proving: Tactical Approaches for Indu
 ction Problems » \n\nAbstract:\n\nThe realm of formal verification\, part
 icularly when engaging with proof assistants built on expressive logics\, 
 has consistently grappled with limited automation in proof search. This li
 mitation becomes even more pronounced when addressing inductive problems\,
  which are integral to the verification of both software and hardware syst
 ems. \n\nTo...
DTSTART:20231130T140000
DTEND:20231130T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yutaka Nagashima - AI-Enhanced Theorem Proving: Tactical Approaches
  for Induction Problems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3138fOUiix@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 17 November 2023 - Maison du doctora
 t Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:30 - Salle : Maison du doctorat Jean Kuntzmann\n\nTh
 omas Mari\, VERIMAG (MOHYTOS)\, INRIA (SPADES)\n\n\n« Explications causal
 es pour les systèmes temps réel réactifs (Causal explanations for react
 ive real-time systems) » \n\nRésumé :\n\nAvec la complexité croissante
  des systèmes embarqués\, expliquer de manière concise les défaillance
 s des systèmes est crucial pour comprendre ce qu'il s'est passé. Dans ce
 tte thèse\, nous construisons des explications causales dont la formalisa
 tion est basée sur le l'analyse contrefactuelle. Pour cela\, nous avons b
 esoin d'un...
DTSTART:20231117T143000
DTEND:20231117T163000
DURATION:PT02H0M0S
LOCATION:Maison du doctorat Jean Kuntzmann
SUMMARY:Thomas Mari - Explications causales pour les systèmes temps réel 
 réactifs (Causal explanations for reactive real-time systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3141abznmW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 November 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nGidon Ernst\, Ludwig-Maximilians-University of Munich\nhttps://www.
 gidonernst.de/\n\n« Automating software verification with respect to stro
 ng specifications » \n\nAbstract:\n\nProving functional correctness of so
 ftware with respect to specifications of application-specific requirements
  requires one to define these specifications in the first place\, to come 
 up with coupling relations that connect the concrete state space of the im
 plementation to its abstract counterpart\, and to prove that this correspo
 ndence is...
DTSTART:20231109T140000
DTEND:20231109T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Gidon Ernst - Automating software verification with respect to stro
 ng specifications
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3143ptgiou@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 October 2023 - zoom\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : zoom\n\nMichael Foster\, University of Sheffield\nhttps://staffwww
 .dcs.shef.ac.uk/people/M.Foster/\n\n« Active Inference of Extended Finite
  State Machines Without Reset » \n\nAbstract:\n\nExtended finite state ma
 chines (EFSMs) model stateful systems with internal data variables\, and h
 ave many software engineering applications\, including system analysis and
  test case generation. Where such models are not available\, it is desirab
 le to reverse engineer them by observing system behaviour\, but existing a
 pproaches are either limited to classical FSM models with no internal data
  state\, or...
DTSTART:20231019T140000
DTEND:20231019T160000
DURATION:PT02H0M0S
LOCATION:zoom
SUMMARY:Michael Foster - Active Inference of Extended Finite State Machines
  Without Reset
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3146DnhuAe@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 October 2023 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nNicola Gigante\, Free University of Bozen-Bolzano\, Italy\nhttps://w
 ww.inf.unibz.it/~gigante/\n\n« Temporal Logics Modulo Theories for Infini
 te-State Verification » \n\nAbstract:\n\nLinear Temporal Logic (LTL) is o
 ne of the most common formalisms for expressing\nproperties of systems in 
 formal verification and other fields. However\, its\npropositional nature 
 limits its applicability to finite-state systems\, whereas\nmany interesti
 ng scenarios often require reasoning in an infinite-state\nsettings. Indee
 d\, many...
DTSTART:20231012T140000
DTEND:20231012T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicola Gigante - Temporal Logics Modulo Theories for Infinite-State
  Verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3148E3CE4b@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 12 July 2023 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nDejan Nickovic\, AIT\, Vienna\n\n\n« Attribute Repair for Threat Prev
 ention    » \n\nAbstract:\n\nWe propose a model-based procedure for preve
 nting security threats using formal models. We encode system models and th
 reats as satisfiability modulo theory (SMT) formulas. This model allows us
  to ask security questions as satisfiability queries. We formulate threat 
 prevention as an optimization problem over the same formulas. The outcome 
 of our threat prevention procedure is a suggestion of model attribute repa
 ir that...
DTSTART:20230712T140000
DTEND:20230712T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Dejan Nickovic - Attribute Repair for Threat Prevention
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-31508ivnNI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  7 July 2023 - Room 206 (2nd floor\,
  badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n\n
 Akshay Mambakam\, VERIMAG\, Université Grenoble Alpes\n\n\n« Parametric 
 timed formalisms for specification and monitoring (PhD defense) » \n\nAbs
 tract:\n\nPhD Defense Friday/7th of July 2023/Room 206\, VERIMAG\, IMAG Bu
 ilding\, 700 Av. Centrale\, 38400 Saint-Martin-d'Hères\nTitle: Parametric
  timed formalisms for specification and monitoring (PhD defense)\nBy Aksha
 y Mambakam\, VERIMAG\, Université Grenoble Alpes\nSupervised by Nicolas B
 asset (UGA\, VERIMAG)\, Thao Dang (CNRS\, VERIMAG)\n\nCyber-Physical Syste
 ms (CPS) like smart...
DTSTART:20230707T100000
DTEND:20230707T120000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Akshay Mambakam - Parametric timed formalisms for specification and
  monitoring (PhD defense)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3153CMxpWb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 July 2023 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nNicola Paoletti\, King's College London\nhttps://nicolapaoletti.com/\n
 \n« Causal Temporal Reasoning for Markov Decision Processes » \n\nAbstra
 ct:\n\nAbstract:\nWe introduce PCFTL (Probabilistic CounterFactual Tempora
 l Logic)\, a new probabilistic temporal logic for the verification of Mark
 ov Decision Processes (MDP). PCFTL is the first to include operators for c
 ausal reasoning\, allowing us to express interventional and counterfactual
  queries. Given a path formula phi\, an interventional property is concern
 ed with the...
DTSTART:20230706T140000
DTEND:20230706T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicola Paoletti - Causal Temporal Reasoning for Markov Decision Pro
 cesses
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3155lNwohZ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 30 June 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSayan Mitra\, University of Illinois Urbana-Champaign \n\n\n« Assuring 
 Safety of Learning-Enabled Systems with Perception Contracts.  » \n\nAbst
 ract:\n\nFormal verification of deep learning models remains challenging\,
  and yet they are becoming integral in many safety-critical autonomous sys
 tems. We present framework for certifying end-to-end safety of learning-en
 abled autonomous systems using perception contracts. The method flows from
  the observation that learning-based perception is often used for state es
 timation\, and...
DTSTART:20230630T140000
DTEND:20230630T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sayan Mitra - Assuring Safety of Learning-Enabled Systems with Perc
 eption Contracts.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3157cSfPTc@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Friday  9 June 2023 - Auditorium\, ground floo
 r (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n15:00 - Salle : Auditorium\, ground floor (Building IM
 AG)\n\nclaire maiza\, GrenobleINP/ Ensimag\, Verimag\n\n\n« Analyses mat
 érielles et logicielles pour obtenir une analyse temporelle précise et e
 fficace (Hardware and software analyses for precise and efficient timing a
 nalysis) » \n\nAbstract:\n\n***changement de salle: auditorium***\n\nJ'ai
  le plaisir de vous inviter à ma soutenance d'HDR qui aura lieu le 9 juin
  2023 dans **l'auditorium** au rez-de-chaussée du bâtiment IMAG:\n\n'Har
 dware and software analyses for precise and efficient timing analysis'\n\n
 Abstract:...
DTSTART:20230609T150000
DTEND:20230609T170000
DURATION:PT02H0M0S
LOCATION:Auditorium\, ground floor (Building IMAG)
SUMMARY:claire maiza - Analyses matérielles et logicielles pour obtenir un
 e analyse temporelle précise et efficace (Hardware and software analyses 
 for precise and efficient timing analysis)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3160V1IbHH@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  9 June 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nJean-Luc Scharbarg\, IRIT\n\n\n« Trends in real-time embedded networks:
  towards TSN » \n\nAbstract:\n\nReal-time Ethernet has been used to deal 
 with the always increasing communication needs of embedded systems and fun
 ctions in different contexts\, e.g. automotive\, aeronautic or space. It c
 an offer a deterministic networking service to a large amount of control a
 nd command flows. The determinism guarantee relies on a mathematical proof
  that leads to a lightly loaded network. Therefore a significant amount of
  work has been...
DTSTART:20230609T100000
DTEND:20230609T110000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jean-Luc Scharbarg - Trends in real-time embedded networks: towards
  TSN
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3162LvAeIU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 June 2023 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nBasile Pesin\, Inria PARKAS - ENS-Ulm\nhttps://vertmo.org/\n\n« Verif
 ying a compiler for a synchronous dataflow language with state machines in
  Coq » \n\nAbstract:\n\nThe Velus project is a formalization of a synchro
 nous block-diagram language\, based on elements from Lustre and Scade 6\, 
 in the Coq interactive theorem prover. \n\nIt includes a relational formal
 ization of the dataflow semantics of the language\, a compiler that uses t
 he CompCert C compiler as a backend to produce assembly code\, and an end-
 to-end proof...
DTSTART:20230608T140000
DTEND:20230608T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Basile Pesin - Verifying a compiler for a synchronous dataflow lang
 uage with state machines in Coq
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-31648z85rj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 May 2023 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nHenri-Pierre Charles\, CEA\, Grenoble\n\n\n« Spécialisation de code bi
 naire au run-time : pour gagner du temps et de l'énergie\, il faut rouler
  à l'HybroGen » \n\nRésumé :\n\nLa spécialisation de code permet de s
 implifier un code exécutable.\n\nRéaliser la spécialisation au run-time
  permet de profiter des valeurs connues uniquement à l'exécution.\n\nQue
 ls outils sont nécessaires pour le réaliser ?\n\n\n\n\n= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther seminars a
 t VERIMAG -...
DTSTART:20230525T140000
DTEND:20230525T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Henri-Pierre Charles - Spécialisation de code binaire au run-time 
 : pour gagner du temps et de l'énergie\, il faut rouler à l'HybroGen
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3167vnBApU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 May 2023 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nJoseph Sifakis\, VERIMAG\nhttp://www-verimag.imag.fr/~sifakis/\n\n« Art
 ificial Intelligence and autonomous systems  » \n\nAbstract:\n\nWe discus
 s the adequacy of the criteria for assessing the intelligent behavior of a
 gents. We argue that the Turing test fails to capture the many facets of h
 uman intelligence and propose a 'replacement test' that relativizes the co
 ncept of intelligence based on the ability of an agent to replace successf
 ully another agent in performing a task. \nAutonomous systems incorporate 
 the...
DTSTART:20230504T140000
DTEND:20230504T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - Artificial Intelligence and autonomous systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-31696cP5E6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 28 April 2023 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n11:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nThomas Jensen\, INRIA\nhttps://www.irisa.fr/lande/jensen/\n\n« An infor
 mation flow logic based on partial equivalence relations » \n\nAbstract:
 \n\nInformation flow control (IFC) is a key element for ensuring that prog
 rams do not leak confidential data\, and a number of enforcement mechanism
 s (based on static analysis\, run-time monitoring\, or combinations thereo
 f) have been proposed. In this talk we will present a logic for reasoning 
 about information flow properties formalised in an assertion language base
 d on partial...
DTSTART:20230428T110000
DTEND:20230428T120000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thomas Jensen - An information flow logic based on partial equivale
 nce relations
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3172sVxczh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 April 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nEtienne Boespflug\, Vérimag\n\n\n« Outils pour l’analyse de code et 
 de contre-mesures pour l'injection de fautes multiples » \n\nRésumé :\n
 \nLes attaquants actifs sont capables d'intervenir sur le comportement du 
 programme pendant son exécution. En particulier\, les attaques par inject
 ion de fautes\, qui ont émergé à l'origine en tant que méthode de test
  contre les fautes matérielles accidentelles\, sont un vecteur d'attaque 
 puissant dans lequel l'attaquant peut injecter des fautes pendant l'exécu
 tion à l'aide...
DTSTART:20230428T140000
DTEND:20230428T170000
DURATION:PT03H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Etienne Boespflug - Outils pour l’analyse de code et de contre-me
 sures pour l'injection de fautes multiples
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3174w2AUCp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 March 2023 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nClementine Gritti\, University of Canterbury -- New Zealand\nhttps://r
 esearchprofile.canterbury.ac.nz/Researcher.aspx?Researcherid=5365673\n\n
 « Internet of Things: From modern cryptography to post-quantum cryptograp
 hy » \n\nAbstract:\n\nIn this presentation\, I will focus on security and
  privacy in the Internet of Things (IoT)\, using modern asymmetric cryptog
 raphy (e.g. RSA\, Diffie-Hellman) and post-quantum cryptography (e.g.\, ba
 sed on lattices).\n\nIoT is an environment with its challenges and limitat
 ions. Application...
DTSTART:20230309T140000
DTEND:20230309T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Clementine Gritti - Internet of Things: From modern cryptography to
  post-quantum cryptography
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3177vTAVKd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  6 March 2023 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nFrederic Fort\, IRT Saint Exupery\n\n\n« Programing adaptive real-time 
 systems » \n\nAbstract:\n\nA real-time system is a system whose correctne
 ss depends not only on the correctness of the values it produces\, but als
 o on the time when it produces those values. The rate at which it must pro
 duce values is defined by the environment it operates in.\n\nWhen programm
 ing such a system\, it is important that the programming language allows t
 o reason about the constraints introduced by this context. Synchronous lan
 guages are...
DTSTART:20230306T100000
DTEND:20230306T110000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Frederic Fort - Programing adaptive real-time systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3179Ei0f0G@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 March 2023 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nArthur Perais\, TIMA\nhttp://aperais.fr/\n\n« Exploring Instruction F
 usion Opportunities in General Purpose Processors » \n\nAbstract:\n\nThe 
 Complex Instruction Set Computer (CISC) paradigm has led to the introducti
 on of instruction cracking in which an architectural instruction is divide
 d into multiple microarchitectural instructions (µ-ops). However\, the du
 al concept\, instruction fusion is also prevalent in modern microarchitect
 ures to maximize resource utilization. In essence\, some architectural ins
 tructions are...
DTSTART:20230302T140000
DTEND:20230302T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Arthur Perais - Exploring Instruction Fusion Opportunities in Gener
 al Purpose Processors
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3182zasgGG@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 February 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n11:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nLéo Robert\, LIMOS (Université Clermont Auvergne)\nhttps://perso.
 limos.fr/~leorober\n\n« How fast do you heal? A taxonomy for post-comprom
 ise security in secure-channel establishment. » \n\nAbstract:\n\n* WARNIN
 G: rescheduled because of strikes with unusual time (11h) *\nPost-Compromi
 se Security (PCS) is a property of secure-channel establishment schemes\, 
 which limits the security breach of an adversary that has compromised one 
 of the endpoint to a certain number of messages\, after which the channel 
 heals. An...
DTSTART:20230223T110000
DTEND:20230223T130000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Léo Robert - How fast do you heal? A taxonomy for post-compromise 
 security in secure-channel establishment.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-31844TKlHU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 February 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n15:30 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nImen Sayar\, IRIT-SM@RT\nhttps://hal.science/search/index?q=imen+sa
 yar\n\n« Collaborative development of safe and secure cyber-physical syst
 ems » \n\nAbstract:\n\nOver the last decades\, the complexity of systems 
 has significantly increased\, leading to a rise in the need for improving 
 the methodology and tools for developing such systems. The quality of cybe
 r-physical systems (CPS) depends not only on their ability to meet custome
 r needs but also on their security against software attacks. In this prese
 ntation\, I...
DTSTART:20230223T153000
DTEND:20230223T173000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Imen Sayar - Collaborative development of safe and secure cyber-phy
 sical systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3187emGVl8@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 20 February 2023 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nanais durand\, univ. clermont auvergne\n\n\n« Exploration of 3D envi
 ronments by swarms of luminous autonomous robots.  » \n\nAbstract:\n\nCoo
 rdinating swarms of luminous autonomous robots is an active branch of dist
 ributed computing. These robots are equipped with motion actuators\, visib
 ility sensors\, and a few lights of different colors. Despite their weak c
 apabilities (short-range visibility sensors\, limited memory\, no GPS\, ..
 .)\, these robots can cooperate\, without any central control\, to achieve
  complex tasks. In...
DTSTART:20230220T140000
DTEND:20230220T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:anais durand - Exploration of 3D environments by swarms of luminous
  autonomous robots.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3189KGvCe7@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  6 February 2023 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nBruno FERRES\, LIP (equipe CASH)\n\n\n«  Using Model Checking for El
 ectrical Rule Checking of Integrated Circuits at Transistor Level » \n\nA
 bstract:\n\nThis seminar introduces my research thematics\, which focus on
  high level\nmethodologies for design and verification of electronic circu
 its.\nAfter a small summary of my past activities\, first as an engineerin
 g\nstudent and then as a PhD student\, this talk with present my current\n
 work at LIP (Lyon).\n\nThis work is done within a collaboration with Verim
 ag (with...
DTSTART:20230206T140000
DTEND:20230206T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Bruno FERRES -  Using Model Checking for Electrical Rule Checking o
 f Integrated Circuits at Transistor Level
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3192B7TVdh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 February 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nCharlie Jacomme\, Team Prosecco of Inria Paris\nhttps://charlie.jac
 omme.fr/\n\n« A comprehensive\, formal and automated analysis of the EDHO
 C protocol.  » \n\nAbstract:\n\nWe believe that formal methods in securit
 y should be leveraged in all the standardisation's of security protocols i
 n order to strengthen their guarantees. To be effective\, such analyses sh
 ould be:\n* maintainable: the security analysis should be performed on eve
 ry step of the way\, i.e. each iteration of the draft\;\n* pessimistic: al
 l possible...
DTSTART:20230202T140000
DTEND:20230202T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Charlie Jacomme - A comprehensive\, formal and automated analysis o
 f the EDHOC protocol.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3194whsUt6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 January 2023 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nSon Ho\, Team Prosecco of Inria Paris\nhttps://www.sonho.fr/\n\n« A
 eneas: Rust Verification by Functional Translation » \n\nAbstract:\n\nWe 
 present Aeneas\, a new verification toolchain for Rust programs based on a
  lightweight functional translation. We leverage Rust's rich region-based 
 type system to eliminate memory reasoning for a large class of Rust progra
 ms by translating them to a pure lambda-calculus\, as long as they do not 
 rely on interior mutability or unsafe code.\n\nDoing so\, we relieve the p
 roof engineer...
DTSTART:20230126T140000
DTEND:20230126T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Son Ho - Aeneas: Rust Verification by Functional Translation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3196U9v1oM@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 16 December 2022 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nVincent  Morice\, STMicroelectronics \n\n\n« Modèle haut niveau de m
 icrocontrôleurs basé sur les dépendances pour le développement de logi
 ciel embarqué » \n\nRésumé :\n\nCette thèse s'intéresse au développ
 ement de logiciel embarqué sur microcontrôleurs. La complexité croissan
 te de ces circuits rend le développement plus difficile\, de nombreuses t
 âches devant désormais être pilotées par le logiciel\, comme la gestio
 n des horloges et de l'alimentation électrique des différentes parties d
 u circuit....
DTSTART:20221216T100000
DTEND:20221216T123000
DURATION:PT02H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Vincent  Morice - Modèle haut niveau de microcontrôleurs basé su
 r les dépendances pour le développement de logiciel embarqué
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3199u3hp45@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 13 December 2022 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nEzio Bertocci\, TU Wien\n\n\n« Automatic Invariant Generations for 
 Probabilistic Loops (Automatic Invariant Generations for Probabilistic Loo
 ps) » \n\nRésumé :\n\nProbabilistic programs (PPs)\, originally employe
 d in cryptographic/privacy protocols and randomized algorithms\, are now g
 aining momentum due to the several emerging applications in the areas of m
 achine learning and AI. Probabilistic programming languages include native
  constructs for sampling distributions allowing to freely mix deterministi
 c and...
DTSTART:20221213T140000
DTEND:20221213T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Ezio Bertocci - Automatic Invariant Generations for Probabilistic L
 oops (Automatic Invariant Generations for Probabilistic Loops)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3201A6zlgr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 December 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nKohei SUENAGA\, Kyoto University\nhttp://www.fos.kuis.kyoto-u.ac.jp
 /~ksuenaga/\n\n« Oblivious Online Monitoring for Safety LTL Specification
  via Fully Homomorphic Encryption » \n\nAbstract:\n\nIn many Internet of 
 Things (IoT) applications\, data sensed by an IoT\ndevice are continuously
  sent to the server and monitored against a\nspecification. Since the data
  often contain sensitive information\, and\nthe monitored specification is
  usually proprietary\, both must be kept\nprivate from the other end. We p
 ropose a...
DTSTART:20221208T140000
DTEND:20221208T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Kohei SUENAGA - Oblivious Online Monitoring for Safety LTL Specific
 ation via Fully Homomorphic Encryption
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3204IrsIN1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nXavier Denis\, LRI\nhttps://www.lri.fr/~xldenis/\n\n« Deductive Ve
 rification of Higher-Order Rust Programs » \n\nAbstract:\n\nThe Rust lang
 uage aims to empower systems software programmers by offering them safe\, 
 and powerful linguistic abstractions to solve their problems. One of the m
 ost important are iterators which provide a composable mechanism to expres
 s traversal and modification of structures. However when verifying code it
 erators pose many problems\, they can be non-deterministic\, infinite\, hi
 gher-order\, and...
DTSTART:20221124T140000
DTEND:20221124T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Xavier Denis - Deductive Verification of Higher-Order Rust Programs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3206Pauax7@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 November 2022 - Room 285 (badg
 ed access\, limited occupancy)\n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n10:00 - Salle : Room 285 (badged access\,
  limited occupancy)\n\nJean-François Monin\, VERIMAG\nhttps://www-verimag
 .imag.fr/~monin/\n\n« Programmation récursive en Coq et intensionalité 
 : oh le beau cas ! (Recursive Programming in Coq and Intensionality : oh h
 appy case !) » \n\nRésumé :\n\nL'exposé porte sur une solution d'un ex
 ercice issu d'une discussion\nrécente avec David : donner un programme it
 ératif (récursif terminal)\npour l'aplatissement d'un arbre à embranche
 ments non bornés et en\ndémontrer la correction.\n\nÉcrire un tel progr
 amme en...
DTSTART:20221124T100000
DTEND:20221124T113000
DURATION:PT01H30M0S
LOCATION:Room 285 (badged access\, limited occupancy)
SUMMARY:Jean-François Monin - Programmation récursive en Coq et intension
 alité : oh le beau cas ! (Recursive Programming in Coq and Intensionality
  : oh happy case !)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3209DUkCgU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nArnaud Sangnier\, IRIF\n\n\n« Parameterized verification of Networ
 ks with selective broadcast » \n\nAbstract:\n\nWe study decision problems
  for parameterized verification of a formal model of networks with broadca
 st communication in which the number of participants as the communication 
 topoloby are paramters. The configuration of such a model can be represent
 ed thanks to graphs where nodes are labelled with states of individual pro
 cesses. Adjacent nodes represent single-hop neighbors. Processes are finit
 e state...
DTSTART:20221117T140000
DTEND:20221117T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Arnaud Sangnier - Parameterized verification of Networks with selec
 tive broadcast
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3212O0R39v@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nStephan Plassart\, LCA2 EPFL\nhttps://plassart.github.io/\n\n« Equ
 ivalent Versions of Total Flow Analysis » \n\nAbstract:\n\nTotal Flow Ana
 lysis (TFA) is a method for conducting the worst-case analysis of time sen
 sitive networks without cyclic dependencies. In networks with cyclic depen
 dencies\, Fixed-Point TFA introduces artificial cuts\, analyses the result
 ing cycle-free network with TFA\, and iterates. If it converges\, it does 
 provide valid performance bounds. We show that the choice of the specific 
 cuts used by...
DTSTART:20221110T140000
DTEND:20221110T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Stephan Plassart - Equivalent Versions of Total Flow Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3214JTCGKI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 October 2022 - Auditorium (Bui
 lding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nHugo Gimbert\,
  CNRS (LaBRI)\nhttps://www.labri.fr/perso/gimbert/\n\n« Les algorithmes d
 e ParcourSup » \n\nRésumé :\n\n'Parcoursup' est la plateforme nationale
  d’admission en première année de l’enseignement supérieur\, mise e
 n place en 2018 suite au vote de la loi ORE.\nCette plateforme assure la m
 ise en relation des formations du supérieur avec les candidats à ces for
 mations\, plus de 900.000 en 2022.\nDes algorithmes envoient automatiqueme
 nt et quotidiennement des propositions aux candidats\, \nsur la base des v
 oeux...
DTSTART:20221027T140000
DTEND:20221027T150000
DURATION:PT01H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hugo Gimbert - Les algorithmes de ParcourSup
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3216GtuOZV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2022 - Seminar Room\
 , ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground flo
 or (Building IMAG)\n\nMerigoux Denis\, INRIA Prosecco\nhttps://merigoux.ov
 h/\n\n« Rules\, Computation and Politics: Scrutinizing Unnoticed Programm
 ing Choices in French Housing Benefits » \n\nAbstract:\n\nSocial benefits
  and taxes are computed by machines in almost all developed countries. The
  size and complexity of the programs implementing these computations is bi
 g enough that serious questions can be raised about their safety\, correct
 ness and faithfulness to the law. In this presentation\, we will share our
  experience...
DTSTART:20220929T140000
DTEND:20220929T150000
DURATION:PT01H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Merigoux Denis - Rules\, Computation and Politics: Scrutinizing Unn
 oticed Programming Choices in French Housing Benefits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3219ChjuBX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  9 September 2022 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nLucas Bueri\, Verimag\n\n\n« On an Invariance Problem for Parameter
 ized Concurrent Systems » \n\nAbstract:\n\nWe consider concurrent systems
  consisting of replicated finite-state\n  processes that synchronize via j
 oint interactions in a network with\n  user-defined topology. The system i
 s specified using a resource\n  logic with a multiplicative connective and
  inductively defined\n  predicates\, reminiscent of Separation Logic \cite
 {Reynolds02}. The\n  problem we consider is if a given formula in this log
 ic defines...
DTSTART:20220909T140000
DTEND:20220909T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lucas Bueri - On an Invariance Problem for Parameterized Concurrent
  Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3221Sh9JJn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 12 July 2022 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nDejan Nickovic\, AIT Vienna\n\n\n« Information-flow Interfaces » \n\nA
 bstract:\n\nContract-based design is a promising methodology for taming th
 e complexity of developing sophisticated systems. A formal contract distin
 guishes between assumptions\, which are constraints that the designer of a
  component puts on the environments in which the component can be used saf
 ely\, and guarantees\, which are promises that the designer asks from the 
 team that implements the component. A theory of formal contracts can be fo
 rmalized as an...
DTSTART:20220712T140000
DTEND:20220712T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Dejan Nickovic - Information-flow Interfaces
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3223bsHurO@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 July 2022 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nFranz Meyer\, Universidad ORT Uruguay\n\n\n« Towards Efficient Active
  Learning of PDFA » \n\nAbstract:\n\nWe propose a new active learning alg
 orithm for PDFA based on three main aspects: a congruence over states whic
 h takes into account next-symbol probability distributions\, a quantizatio
 n that copes with differences in distributions\, and an efficient tree-bas
 ed data structure. Experiments showed significant performance gains with r
 espect to reference implementations.\n\n\n= = = = = = = = = = = = = = = = 
 = = = = = = = = =...
DTSTART:20220707T140000
DTEND:20220707T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Franz Meyer - Towards Efficient Active Learning of PDFA
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-32263o8TdR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 21 June 2022 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nJoel Goossens\, ULB\, Brussels\nhttps://be.linkedin.com/in/joelygoossens
 \n\n« Real-Time Computing\, Multiprocessor scheduling problems » \n\nAbs
 tract:\n\nTutorial on real-time computing: second seminar\n\nMultiprocesso
 r scheduling problems \n\n- Partitioned vs. Global scheduling\n- First Fit
  Decreasing Utilization algorithm\n- Negative results:\n    - No online op
 timal scheduler exists\n    - Scheduling anomalies\n- Positive results:\n 
    - PFAIR Scheduling\n    - Global EDF and EDF^K schedulers\n\n\n= = = = 
 = = = = = = = =...
DTSTART:20220621T140000
DTEND:20220621T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Real-Time Computing\, Multiprocessor scheduling pro
 blems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3228U1f2mh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 June 2022 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nJoel Goossens\, ULB\, Brussels\nhttps://be.linkedin.com/in/joelygoosse
 ns\n\n« Periodicity of real-time priority driven schedulers with preempti
 on delay on uniprocessor » \n\nAbstract:\n\nIn this seminar\, we study a 
 problem related to the schedulability of systems with *preemptive* tasks f
 or single-core architectures.\nWe consider the notion of simulation interv
 al for real-time priority driven schedulers upon uniprocessor. Our study f
 ocuses on a model where *preemption costs* are explicitly considered\, i.e
 .\, the time...
DTSTART:20220616T140000
DTEND:20220616T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Periodicity of real-time priority driven schedulers
  with preemption delay on uniprocessor
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3230L6AGmV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 14 June 2022 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nJoel Goossens\, ULB\, Brussels\nhttps://be.linkedin.com/in/joelygoossens
 \n\n« Real-Time Computing\, foundation » \n\nAbstract:\n\nThis seminar i
 s the first part of a tutorial on real-time computing.\n\nFoundations (1\,
 5 hours)\n\n- Introduction to embedded real-time computing and scheduling 
 problems\n- Model of computation (periodic and sporadic tasks)\n- Fixed Ta
 sk Priority: Rate Monotonic & Deadline Monotonic\n- Fixed Job Priority: Ea
 rliest Deadline First (EDF)\n- Schedulability tests & main results\n\n\n= 
 = = = = = = = = =...
DTSTART:20220614T140000
DTEND:20220614T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Real-Time Computing\, foundation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3233hIFVV0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 June 2022 - Auditorium (Building
  IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n09:00 - Salle : Auditorium (Building IMAG)\n\nCAPITAL Workshop \,
  sCalable And PrecIse Timing AnaLysis for multicore\nhttps://www-verimag.i
 mag.fr/Workshop-CAPITAL-2022-sCalable-And.html?lang=fr\n\n« Workshop CAPI
 TAL 2022 : sCalable And PrecIse Timing AnaLysis for multicore platforms (W
 orkshop CAPITAL 2022 : sCalable And PrecIse Timing AnaLysis for multicore 
 platforms) » \n\nRésumé :\n\nFree attendance but mandatory registration
  by May 1st\, 2022.\n\nFriday\, June 3th\, 2022. Grenoble and possible rem
 ote attendance\n\nwith a keynote of Renato Mancuso\,  Boston University 'F
 rom Memory...
DTSTART:20220603T090000
DTEND:20220603T150000
DURATION:PT06H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:CAPITAL Workshop  - Workshop CAPITAL 2022 : sCalable And PrecIse Ti
 ming AnaLysis for multicore platforms (Workshop CAPITAL 2022 : sCalable An
 d PrecIse Timing AnaLysis for multicore platforms)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3235IMDmRU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 31 May 2022 - Seminar Room\, ground
  floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n09:30 - Salle : Seminar Room\, ground floor (Buil
 ding IMAG)\n\nMatheus Schuh\, Verimag / Kalray\nhttp://www-verimag.imag.fr
 /~schuhm/\n\n« Safe Implementation of Hard Real-Time Applications on Many
 -Core Platforms » \n\nAbstract:\n\nHard real-time systems are designed to
  be functionally correct\, but also require\nthe guarantee of timing const
 raints. Completing the task at hand within a given\ndeadline is part of th
 e specification and failing to accomplish this can lead to\nserious conseq
 uences. Some examples of such systems are the central command of\nan airpl
 ane\,...
DTSTART:20220531T093000
DTEND:20220531T113000
DURATION:PT02H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Matheus Schuh - Safe Implementation of Hard Real-Time Applications 
 on Many-Core Platforms
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3238xr4Czb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 May 2022 - https://bans.imag.f
 r/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:00 - Salle : https://bans.imag.fr/b/rad-ofn-9t8-r
 qc\n\nNathalie Bertrand\, INRIA Rennes\nhttp://people.rennes.inria.fr/Nath
 alie.Bertrand/\n\n« Reconfigurable Parameterized Broadcast Networks: Mini
 mal Size and Execution Length for Coverability » \n\nAbstract:\n\nBroadca
 st networks allow one to model networks of identical nodes communicating\n
 through message broadcasts. Their parameterized verification aims at provi
 ng a\nproperty holds for any number of nodes\, under any communication top
 ology\, and on\nall possible executions. We focus on the coverability prob
 lem which...
DTSTART:20220505T100000
DTEND:20220505T120000
DURATION:PT02H0M0S
LOCATION:https://bans.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Nathalie Bertrand - Reconfigurable Parameterized Broadcast Networks
 : Minimal Size and Execution Length for Coverability
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3240jfJxvA@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 April 2022 - https://bans.imag
 .fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n10:00 - Salle : https://bans.imag.fr/b/rad-ofn-9t8
 -rqc\n\nBenedikt Bollig\, LSV\, ENS Saclay\nhttps://www.benedikt-bollig.or
 g/\n\n« Identifiers in Registers - Describing Network Algorithms with Log
 ic » \n\nAbstract:\n\nWe propose a formal model of distributed computing 
 based on register automata that captures a broad class of synchronous netw
 ork algorithms. The local memory of each process is represented by a finit
 e-state controller and a fixed number of registers\, each of which can sto
 re the unique identifier of some process in the network. To underline the 
 naturalness...
DTSTART:20220407T100000
DTEND:20220407T120000
DURATION:PT02H0M0S
LOCATION:https://bans.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Benedikt Bollig - Identifiers in Registers - Describing Network Alg
 orithms with Logic
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3243M2Mawo@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 March 2022 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nDavid Monniaux\, VERIMAG\nhttps://www-verimag.imag.fr/~monniaux/\n\n
 « The trusted computing base of the CompCert verified compiler » \n\nAbs
 tract:\n\n(ESOP 2022 talk)\n\nCompCert is the first realistic formally ver
 ified compiler: it provides a machine-checked mathematical proof that the 
 code it generates matches the source code.\n\nBut what do these impressive
  claims mean exactly?\n\nWe comprehensively analyze aspects of CompCert wh
 ere errors could lead to incorrect code being generated.\nPossible issues 
 range from...
DTSTART:20220324T140000
DTEND:20220324T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:David Monniaux - The trusted computing base of the CompCert verifie
 d compiler
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3245GR8LEr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 March 2022 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nPaolo Torrini\, Inria Sardes\n\n\n« A CompCert Backend with Symbolic 
 Encryption » \n\nAbstract:\n\nIntrinSec is a secure cryptoprocessor\, des
 igned by Oliver Savry's team of CEA-LETI\, that extends RISC-V with hardwa
 re support to monitor control-flow hijacks. We present our CompCert formal
  model of its assembly language\, the control-flow protections inserted by
  our CompCert backend\, and their associated formal proofs of correctness.
 \n\n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\nOther...
DTSTART:20220310T140000
DTEND:20220310T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Torrini - A CompCert Backend with Symbolic Encryption
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3248J8UVNM@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 March 2022 - Zoom link\n= = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:30
  - Salle : Zoom link\n\nXiaowei Huang\, University of Liverpool\nhttps://c
 gi.csc.liv.ac.uk/~xiaowei/\n\n« Machine Learning Safety » \n\nAbstract:
 \n\nMachine learning has been proven practical in solving complex problems
  that cannot be solved before\, but was also found to be not without any s
 hortfall. This talk will address the safety and security risks of applying
  machine learning to safety critical systems. We will provide an overview 
 of the known risks in the machine learning development cycle\, discussing 
 a number of properties such as generalisation\, uncertainty\, robustness\,
  poisoning\,...
DTSTART:20220303T143000
DTEND:20220303T163000
DURATION:PT02H0M0S
LOCATION:Zoom link
SUMMARY:Xiaowei Huang - Machine Learning Safety
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3250tOLcJv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 January 2022 - Room 206\n= = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:0
 0 - Salle : Room 206\n\nBenjamin BLANC\, Prover Tech\nhttps://www.prover.c
 om/\n\n« Formal Methods in Practice: Model Checking in the Railway Indust
 ry » \n\nAbstract:\n\nThe railway industry is a long term user of formal 
 methods\, especially in France. For more than 30 years\, both infrastructu
 re managers and industrial suppliers are intensively using formal tools to
  increase confidence in the critical parts of railway systems. This is str
 ongly encouraged by the certification authorities\, since the standard in 
 the area highly recommends such application. Most famous success stories i
 n this...
DTSTART:20220113T140000
DTEND:20220113T160000
DURATION:PT02H0M0S
LOCATION:Room 206
SUMMARY:Benjamin BLANC - Formal Methods in Practice: Model Checking in the 
 Railway Industry
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3253jn1kkP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 13 December 2021 - https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/b/ra
 d-ofn-9t8-rqc\n\nJoseph Sifakis\, VERIMAG\nhttps://www-verimag.imag.fr/PEO
 PLE/Joseph.Sifakis/\n\n« Specification and Validation of Autonomous Drivi
 ng Systems: A Multilevel Semantic Framework » \n\nAbstract:\n\nAutonomous
  Driving Systems (ADS) are critical dynamic reconfigurable agent systems w
 hose specification and validation raises extremely challenging problems. T
 he paper presents a multilevel semantic framework for the specification of
  ADS and discusses associated validation problems. The framework relies on
  a formal...
DTSTART:20211213T140000
DTEND:20211213T160000
DURATION:PT02H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Joseph Sifakis - Specification and Validation of Autonomous Driving
  Systems: A Multilevel Semantic Framework
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3255IVAntz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  7 December 2021 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nAlessio Mansutti\, University of Oxford\nhttps://alessiomansutti.git
 hub.io/\n\n« Efficient complementation of semilinear sets and the VC dime
 nsion of Presburger arithmetic » \n\nAbstract:\n\nWe discuss the issue of
  deciding the first-order theory of integer linear arithmetic\, also known
  as Presburger arithmetic.\nWhereas optimal decision procedures based on e
 ither quantifier-elimination or automata constructions are known for this 
 theory\,\nthe current procedures based on manipulating semilinear sets (i.
 e. sets that...
DTSTART:20211207T140000
DTEND:20211207T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alessio Mansutti - Efficient complementation of semilinear sets and
  the VC dimension of Presburger arithmetic
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3257ZCK5DC@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 December 2021 - https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n10:00 - Salle : https://veri-bbb.imag.fr/b/ra
 d-ofn-9t8-rqc\n\nMiriam  Garci­a\, Institute of Science and Technology (I
 ST) of Austr\nhttps://pub.ist.ac.at/~mgarcias/\n\n« Design\, Verification
  and Synthesis of Hybrid Systems. » \n\nAbstract:\n\nWe have witnessed an
  increasing interest and investment in safe autonomous systems such as sel
 f-driving vehicles\, robots and medical devices. Critical aspects to be co
 nsidered in the design of these complex systems are security\, reliability
  and safety. For instance\, a single design bug can wreak havoc across tho
 usand of...
DTSTART:20211203T100000
DTEND:20211203T120000
DURATION:PT02H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Miriam  Garci­a - Design\, Verification and Synthesis of Hybrid Sy
 stems.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-32607ACaJo@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 December 2021 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nLeo Exibard\, Reykjavik University\nhttp://www.icetcs.ru.is/leoe/\n
 \n« Reactive Synthesis over Infinite Data Domains with Machines with Regi
 sters » \n\nAbstract:\n\nIn reactive synthesis\, the goal is to automatic
 ally generate an implementation from a specification of the reactive and n
 on-terminating input/output behaviours of a system. Specifications are usu
 ally modelled as logical formulas or automata over infinite sequences of s
 ignals (omega‑words)\, while implementations are represented as transduc
 ers. In the...
DTSTART:20211202T140000
DTEND:20211202T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Leo Exibard - Reactive Synthesis over Infinite Data Domains with Ma
 chines with Registers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3262LdIVvu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 29 November 2021 - Vidéo\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : Vidéo\n\nNicolas Basset\, VERIMAG\n\n\n« Uniform Sampling for N
 etworks of Automata » \n\nAbstract:\n\nWe call network of automata a fami
 ly of partially synchronised automata\, i.e. a family of deterministic aut
 omata which are synchronised via shared letters\, and evolve independently
  otherwise. We address the problem of uniform random sampling of words rec
 ognised by a network of automata. To that purpose\, we define the reduced 
 automaton of the model\, which involves only the product of the synchronis
 ed part of the component automata. We provide uniform sampling algorithms 
 which are...
DTSTART:20211129T140000
DTEND:20211129T160000
DURATION:PT02H0M0S
LOCATION:Vidéo
SUMMARY:Nicolas Basset - Uniform Sampling for Networks of Automata
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3265WVSd3G@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 23 November 2021 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nPIERRE-LEO BEGAY\, Orange Labs & Verimag\n\n\n« Conception\, dévelo
 ppement et certification dans Coq/MathComp d'optimisations Datalog pour la
  vérification réseau (Design\, Development and certification in Coq/Math
 Comp of Datalog optimizations for network verification) » \n\nRésumé :
 \n\nNous introduisons une analyse statique et deux transformations de prog
 rammes pour Datalog dans le but de résoudre des problèmes de performance
  liés à l'implémentation de certaines primitives\, notamment dans le ca
 dre de la...
DTSTART:20211123T140000
DTEND:20211123T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:PIERRE-LEO BEGAY - Conception\, développement et certification dan
 s Coq/MathComp d'optimisations Datalog pour la vérification réseau (Desi
 gn\, Development and certification in Coq/MathComp of Datalog optimization
 s for network verification)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3267BO9UlB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  4 October 2021 -  https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc \n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n14:00 - Salle :  https://veri-bbb.imag.fr/b/
 rad-ofn-9t8-rqc \n\nHadi DAYEKH\, VERIMAG\, UGA\n\n\n« Learning Automata 
 over Large Alphabets as an Alternative to Recurrent Neural Networks » \n
 \nAbstract:\n\nWe present an attempt toward learning automata and Moore ma
 chines to model Recurrent Neural Networks with real input and output. Our 
 algorithm is based on a combination of the Angluin's L*-variant algorithm 
 of learning Mealy machines\, as well as an improved version of Irini Mens'
  and Oded Maler's algorithm for learning symbolic automata defined over a 
 large input...
DTSTART:20211004T140000
DTEND:20211004T160000
DURATION:PT02H0M0S
LOCATION: https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Hadi DAYEKH - Learning Automata over Large Alphabets as an Alternat
 ive to Recurrent Neural Networks
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3269G8uHvW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Monday 27 September 2021 - Video\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : Video\n\nSylvain Boulmé\, Verimag\nhttp://www-verimag.imag.fr/~boulm
 e/\n\n« Formally Verified Defensive Programming (efficient Coq-verified c
 omputations from untrusted ML oracles)  » \n\nAbstract:\n\nSee abstract\,
  jury details\, and pdf on http://www-verimag.imag.fr/~boulme/hdr.html\n\n
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars
 \,62.html?lang=en\nLocation/Vision: Video - http://www-verimag.imag.fr/~bo
 ulme/boulme_hdr_rehearsal.webm\nTo unsubscribe\, reply to this mail with U
 NSUBSCRIBE in the...
DTSTART:20210927T150000
DTEND:20210927T170000
DURATION:PT02H0M0S
LOCATION:Video
SUMMARY:Sylvain Boulmé - Formally Verified Defensive Programming (efficien
 t Coq-verified computations from untrusted ML oracles)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-32729An87U@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 20 September 2021 - https://veri-bb
 b.imag.fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/b/r
 ad-ofn-9t8-rqc\n\nLucas Bueri\, VERIMAG\n\n\n« Décidabilité de la ratio
 nalité des VAS » \n\nRésumé :\n\nObtenir la rationalité d'un système
  d'addition de vecteurs (VAS) permet de simplifier les problèmes associ
 és en utilisant les résultats des automates finis. Ce travail vise donc 
 à approfondir l'identification des VAS rationnels en se tournant vers les
  configurations de départ.\nAprès avoir corrigé une preuve de décidabi
 lité de la rationalité des VAS\, proposé en 1980 par Ginzburg et Yoeli\
 , nous...
DTSTART:20210920T140000
DTEND:20210920T160000
DURATION:PT02H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Lucas Bueri - Décidabilité de la rationalité des VAS
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3275C9Tmnz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 30 August 2021 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nYannick Zakowski\, LIP\nhttps://perso.ens-lyon.fr/yannick.zakowski/\n
 \n« Sémantique de Vellvm (Vellvm semantics) » \n\nRésumé :\n\nFormali
 sation de la sémantique de LLVM.\nNouvelle sémantique de Vellvm (ICFP 20
 21) via les interaction trees.\n\nAbstract:\n\nFormalization of VellVM sem
 antics using interaction trees\n\n\n= = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = =\nOther seminars at VERIMAG - http://ww
 w-verimag.imag.fr/Verimag-Seminars\,62.html?lang=en\nLocation/Vision: Room
  206 (2nd floor\, badged...
DTSTART:20210830T140000
DTEND:20210830T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Zakowski - Sémantique de Vellvm (Vellvm semantics)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3277xnMg6O@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 13 July 2021 - Auditorium (Building
  IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n15:00 - Salle : Auditorium (Building IMAG)\n\nCyril Six\, Kalray 
 & Verimag\n\n\n« Compilation optimisante et formellement prouvée p
 our un processeur VLIW (Optimized and formally-verified compilation for a 
 VLIW processor) » \n\nAbstract:\n\nSoftware programs are used for many cr
 itical roles. A bug in those can\nhave a devastating cost\, possibly leadi
 ng to the loss of human lives.\nSuch bugs are usually found at a source le
 vel (which can be ruled out\nwith source-level verification methods)\, but
  they can also be inserted\nby the compiler unknowingly. CompCert is the f
 irst...
DTSTART:20210713T150000
DTEND:20210713T170000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Cyril Six - Compilation optimisante et formellement prouvée 
 pour un processeur VLIW (Optimized and formally-verified compilation for a
  VLIW processor)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3280p4Teib@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 June 2021 - bbb\, code d'acc
 ès 394787\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : bbb\, code d'accès 394787\n\nPierre Courtieu
 \, CNAM-CEDRIC\nhttp://cedric.cnam.fr/~courtiep/\n\n« [FormalProofs] Gest
 ion d'un environment de preuve 'moche' ([FormalProofs] Dealing with ugly p
 roof environment.) » \n\nRésumé :\n\nPrésentation informelle\, princip
 alement une démo\, de quelques petites améliorations de Coq et proofgene
 ral dédiées à la gestion des environnements de preuve 'moche'.  Ces am
 éliorations se basent en grande partie sur un petit tactical '\;\;' qui p
 ermet d'appliquer une tactique à chacune des hypothèses créées par une
  autre tactique....
DTSTART:20210617T140000
DTEND:20210617T160000
DURATION:PT02H0M0S
LOCATION:bbb\, code d'accès 394787
SUMMARY:Pierre Courtieu - [FormalProofs] Gestion d'un environment de preuve
  'moche' ([FormalProofs] Dealing with ugly proof environment.)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-32824UTjPu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 June 2021 - Room 206 et BBB (c
 ode d'accès 506793)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n15:00 - Salle : Room 206 et BBB (code d'accès 5067
 93)\n\nJean-François Monin\, Verimag\nhttp://www-verimag.imag.fr/~monin/
 \n\n« [FormalProofs] Petites inversion et récursion débridée en Coq\, 
 la méthode de Braga ([FormalProofs] Small inversions and unleashed recurs
 ion in Coq\, the Braga method) » \n\nRésumé :\n\nComment raisonner en C
 oq sur des fonctions récursives dont la terminaison n'est pas gagnée d'a
 vance ? Voire sont manifestement partielles\, avec un domaine de définiti
 on complexe ou même inconnu ? Comment les écrire sous forme de fonctions
  Coq qui à...
DTSTART:20210610T150000
DTEND:20210610T170000
DURATION:PT02H0M0S
LOCATION:Room 206 et BBB (code d'accès 506793)
SUMMARY:Jean-François Monin - [FormalProofs] Petites inversion et récursi
 on débridée en Coq\, la méthode de Braga ([FormalProofs] Small inversio
 ns and unleashed recursion in Coq\, the Braga method)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3284DiX6Sf@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 23 April 2021 - Zoom\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n09:00 - Sall
 e : Zoom\n\nSchoitsch Erwin \, AIT Austrian Institute of Technology\n\n\n
 « Ethical aspects and recommendations for trustworthy highly automated/au
 tonomous systems » \n\nAbstract:\n\nThe FOCETA project (Foundations for C
 ontinuous Engineering Trustworthy Autonomy) was requested to appoint an Et
 hical Advisor. This activity should particularly address not only the invo
 lvement of human subjects in the research activities\, but also how to avo
 id negative social\, cognitive and ethical bias throughout the project pha
 ses\, from design\, development\, verification and validation\, maintenanc
 e and dismissal...
DTSTART:20210423T090000
DTEND:20210423T110000
DURATION:PT02H0M0S
LOCATION:Zoom
SUMMARY:Schoitsch Erwin  - Ethical aspects and recommendations for trustwor
 thy highly automated/autonomous systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3287dKhvV0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 April 2021 - BBB room access c
 ode 349356\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : BBB room access code 349356\n\nLionel Rieg\, 
 VERIMAG / IIM Grenoble INP\nhttp://www-verimag.imag.fr/~riegl/\n\n« [Form
 alProofs] A formally-verified compiler from Esterel to circuits » \n\nAbs
 tract:\n\nEsterel is a synchronous programming language (like Lustre or Si
 gnal) which can be compiled down to digital circuits\, as described for in
 stance in G. Berry's draft book: 'The Constructive Semantics of Pure Ester
 el'. The goal of this work is to provide a mechanized proof of the correct
 ness of this compilation scheme.\nIn this talk\, after a brief description
  of the...
DTSTART:20210401T140000
DTEND:20210401T160000
DURATION:PT02H0M0S
LOCATION:BBB room access code 349356
SUMMARY:Lionel Rieg - [FormalProofs] A formally-verified compiler from Este
 rel to circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3290vEBzOr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 March 2021 - https://barbarate
 .imag.fr/b/dav-ygp-g07-gi0\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : https://barbarate.imag.fr/b/d
 av-ygp-g07-gi0\n\nDavid Monniaux\, Verimag\nhttp://www-verimag.imag.fr/~mo
 nniaux/\n\n« [SharedResources] CompCert for Risc-V on FPGA » \n\nAbstrac
 t:\n\nRisc-V is a “new” instruction set architecture that is gaining t
 raction in both the academic and industrial worlds. On the academic side\,
  there are many free designs of CPU that implement that architecture\; the
 y may be simulated or implemented into FPGAs for fast execution. On the in
 dustrial side\, many consider Risc-V as an alternative to licensed designs
  such as...
DTSTART:20210311T140000
DTEND:20210311T150000
DURATION:PT01H0M0S
LOCATION:https://barbarate.imag.fr/b/dav-ygp-g07-gi0
SUMMARY:David Monniaux - [SharedResources] CompCert for Risc-V on FPGA
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3293D9bJon@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 26 February 2021 - Visioconference
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:00 - Salle : Visioconference\n\nEmma AHRENS\, Verimag\, Mohytos\n\n
 \n« Local Reasoning for Reconfigurable Distributed Systems » \n\nAbstrac
 t:\n\nThis work investigates the use of separation logic for reasoning abo
 ut dynamically reconfigurable behavior\, interaction\, priority (DR-BIP) s
 ystems and allows the verification of reconfiguration programs on certain 
 distributed systems. Separation logic extends Hoare logic to enable the ve
 rification of programs on resources. It makes use of local reasoning and p
 rovides a frame rule. Static BIP systems represent component-based systems
 \, where a...
DTSTART:20210226T100000
DTEND:20210226T110000
DURATION:PT01H0M0S
LOCATION:Visioconference
SUMMARY:Emma AHRENS - Local Reasoning for Reconfigurable Distributed System
 s
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3295IXpBmH@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 February 2021 - BBB : Room acc
 ess code 756979\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =\n14:00 - Salle : BBB : Room access code 756979\n\nCyril S
 IX\, Kalray / Verimag\n\n\n« Certified Superblock Scheduling for the Comp
 Cert Compiler » \n\nAbstract:\n\nCompCert is a C to assembly compiler\, w
 ith a formal proof of semantic preservation written in Coq.\nIt already fe
 atures a number of simple optimizations such as constant propagation or co
 mmon subexpression elimination\, however to this day it lacks more advance
 d optimizations such as instruction scheduling\, loop invariant code motio
 n or strength reduction.\nWe previously introduced postpass list schedulin
 g in...
DTSTART:20210225T140000
DTEND:20210225T160000
DURATION:PT02H0M0S
LOCATION:BBB : Room access code 756979
SUMMARY:Cyril SIX - Certified Superblock Scheduling for the CompCert Compil
 er
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-32986D9WI0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 February 2021 - https://barbar
 ate.imag.fr/b/jac-ehy-mnq-4cf\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n14:00 - Salle : https://barbarate.imag.fr/
 b/jac-ehy-mnq-4cf\n\nFranck POMMEREAU\, University of Évry\nhttps://www.i
 bisc.univ-evry.fr/~fpommereau/\n\n« Formal Modelling and Symbolic Analysi
 s of Ecosystems » \n\nAbstract:\n\nJoint work with : Cédric Gaucherel\, 
 Colin Thomas\, Stefan Haar\, Giann Karlo Aguirre Samboni\n\nAbstract : Sev
 eral concepts have recently been proposed to understand long-term ecosyste
 m dynamics. These include basins of attraction expressing resilience and t
 ipping points expressing sharp changes in ecosystem’s behavior\, wh
 ich are...
DTSTART:20210211T140000
DTEND:20210211T160000
DURATION:PT02H0M0S
LOCATION:https://barbarate.imag.fr/b/jac-ehy-mnq-4cf
SUMMARY:Franck POMMEREAU - Formal Modelling and Symbolic Analysis of Ecosys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-33010RN7TX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 January 2021 - https://veri-bb
 b.imag.fr/b/rad-ofn-9t8-rqc   \n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/
 b/rad-ofn-9t8-rqc   \n\nEtienne André\, Université de Lorraine\n\n\n« S
 ymbolic Monitoring against Specifications Parametric in Time and Data  » 
 \n\nAbstract:\n\nhttps://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc\nAccess Code: 
 031456\n\nMonitoring consists in deciding whether a log meets a given spec
 ification. In this work\, we propose an automata-based formalism to monito
 r logs in the form of actions associated with time stamps and arbitrarily 
 data values over infinite domains. Our formalism uses both timing paramete
 rs and...
DTSTART:20210128T140000
DTEND:20210128T160000
DURATION:PT02H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Etienne André - Symbolic Monitoring against Specifications Paramet
 ric in Time and Data
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-330461glW3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 January 2021 - https://univ-gr
 enoble-alpes-fr.zoom.us/j/932168111\n= = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = = = =\n14:00 - Salle : https://univ-grenobl
 e-alpes-fr.zoom.us/j/932168111\n\nEtienne Andre\, Universit
 é de Lorraine\n\n\n« Symbolic Monitoring against Specifi
 cations Parametric in Time and Data » \n\nAbstract:\n\nJoin Zoom Meeting
 \nhttps://univ-grenoble-alpes-fr.zoom.us/j/93216811123?pwd=MFVjWDlQblRncEU
 3T2dLblNEV01Cdz09\n\nMeeting ID: 932 1681 1123\nPasscode: 985719\n\nAbstra
 ct: Monitoring consists in deciding whether a log meets a given specificat
 ion. In this work\, we propose an automata-based formalism to monitor logs
  in the form of actions...
DTSTART:20210121T140000
DTEND:20210121T160000
DURATION:PT02H0M0S
LOCATION:https://univ-grenoble-alpes-fr.zoom.us/j/932168111
SUMMARY:Etienne Andre - Symbolic Monitoring against Specifications Parametr
 ic in Time and Data
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3307WAIsZs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 January 2021 - https://veri-bb
 b.imag.fr/b/mic-1x2-b8m-ama\n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/b/m
 ic-1x2-b8m-ama\n\nOlivier RIDOUX\, IRISA\, Université de Rennes I\nhttp:/
 /www.irisa.fr/lande/ridoux/\n\n« Limite de Landauer et calcul réversible
  : une introduction (Landauer limit and reversible calculus: an introducti
 on) » \n\nRésumé :\n\nLe calcul réversible est une idée développée 
 d’abord sur un plan physique par des chercheurs comme Landauer\, Bennet\
 , et Feynman\, puis sur un plan informatique par des chercheurs comme Lutz
 \, Baker\, Yokoyama et Glück\, puis plus récemment Demaine. Dans le mêm
 e temps\,...
DTSTART:20210114T140000
DTEND:20210114T160000
DURATION:PT02H0M0S
LOCATION:https://veri-bbb.imag.fr/b/mic-1x2-b8m-ama
SUMMARY:Olivier RIDOUX - Limite de Landauer et calcul réversible : une int
 roduction (Landauer limit and reversible calculus: an introduction)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3310xBEift@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 December 2020 - By zoom (details 
 below)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n10:00 - Salle : By zoom (details below)\n\nGuo Xiaojie\, INRIA/VE
 RIMAG\n\n\n« Certified Tools for Schedulability Analyses » \n\nRésumé 
 :\n\nL'analyse d'ordonnançabilité vise à garantir le respect des éch
 éances dans les systèmes temps réel durs. Cette propriété est crucial
 e pour les systèmes utilisés dans les domaines critiques tels que l'avio
 nique\, car une échéance manquée peut avoir des conséquences catastrop
 hiques. Dans cette thèse\, nous utilisons l'assistant de preuves Coq afin
  d'assurer la correction des analyses d'ordonnançabilité des systèmes t
 emps réel...
DTSTART:20201218T100000
DTEND:20201218T120000
DURATION:PT02H0M0S
LOCATION:By zoom (details below)
SUMMARY:Guo Xiaojie - Certified Tools for Schedulability Analyses
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3313uvIlhF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 17 December 2020 - Amphithéâtre de 
 la Maison Jean Kuntzmann \n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n13:00 - Salle : Amphithéâtre de la Maison Je
 an Kuntzmann \n\nStéphane Devismes\, UGA/VERIMAG\nhttp://www-verimag.imag
 .fr/~devismes\n\n« Versatility and Efficiency in Self-Stabilizing Distrib
 uted Systems » \n\nAbstract:\n\nIn this defense\, I will summarize the re
 search activities I have led over the last seventeen years. My research fo
 cuses on self-stabilization and its variants. Self-stabilization is a gene
 ral property enabling a distributed system to tolerate transient faults. I
 n most of my works on self-stabilization I have tried to conciliate two a 
 priori...
DTSTART:20201217T130000
DTEND:20201217T150000
DURATION:PT02H0M0S
LOCATION:Amphithéâtre de la Maison Jean Kuntzmann
SUMMARY:Stéphane Devismes - Versatility and Efficiency in Self-Stabilizing
  Distributed Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3315fZgTjK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 11 December 2020 - virtual seminar 
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:30 - Salle : virtual seminar \n\nMarius Bozga\, VERIMAG\n\n\n« Comp
 ositional Generation of Invariants for Timed Systems » \n\nAbstract:\n\nz
 oom link\nhttps://univ-grenoble-alpes-fr.zoom.us/j/99529870648?pwd=b04vSUp
 yRmJDL2k3OUZxWHRSc3R0dz09\nMeeting ID: 995 2987 0648\nPasscode: 932215\n(N
 ote that this seminar was previously announced for Friday Dec 4. It is now
  rescheduled for Friday Dec 11)\n\n\nThis presentation recalls our composi
 tional method developed to address the state space explosion inherent in v
 erification of timed systems with a large number of components. The main c
 hallenge...
DTSTART:20201211T103000
DTEND:20201211T123000
DURATION:PT02H0M0S
LOCATION:virtual seminar
SUMMARY:Marius Bozga - Compositional Generation of Invariants for Timed Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3318hX85hi@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 December 2020 - Séminaire vir
 tuel via BigBlueButton\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n15:15 - Salle : Séminaire virtuel via BigBlueBut
 ton\n\nJacques Combaz\, CNRS / VERIMAG / ETiCS\n\n\n« Introduction aux ef
 fets rebond [lien visio: https://veri-bbb.imag.fr/b/jac-lxa-inn-hnq] » \n
 \nRésumé :\n\nFace à la crise climatique et écologique en cours\, les 
 nouvelles technologies de l'information et de la communication (NTIC) sont
  souvent présentées comme ayant un fort potentiel pour réduire nos impa
 cts environnementaux\, de par leur capacité à optimiser et dématériali
 ser les autres secteurs (transport\, bâtiment\, agriculture\, énergie\, 
 industrie\,...
DTSTART:20201203T151500
DTEND:20201203T164500
DURATION:PT01H30M0S
LOCATION:Séminaire virtuel via BigBlueButton
SUMMARY:Jacques Combaz - Introduction aux effets rebond [lien visio: https:
 //veri-bbb.imag.fr/b/jac-lxa-inn-hnq]
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3321ZBBCln@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 20 November 2020 - virtual seminar 
 on zoom (see below) \n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n10:30 - Salle : virtual seminar on zoom (see below)
  \n\nRadu Iosif\, VERIMAG/CNRS\n\n\n« Structural Invariants for the Verif
 ication of Systems with (Recursively Defined) Parameterized Architectures 
 » \n\nAbstract:\n\nMOHYTOS Seminar\n\nZoom link https://us04web.zoom.us/j
 /76351337050?pwd=Z3JibVkw\nPasscode: 7kFz1i \n\n\n\n\nJoint work with Mari
 us Bozga\, Joseph Sifakis (VERIMAG)\, Javier Esparza  and Christoph Welzel
  (TU Munich)\n\nWe consider parameterized concurrent systems consisting of
  a finite but unknown number of components\, obtained by replicating a giv
 en set of...
DTSTART:20201120T103000
DTEND:20201120T123000
DURATION:PT02H0M0S
LOCATION:virtual seminar on zoom (see below)
SUMMARY:Radu Iosif - Structural Invariants for the Verification of Systems 
 with (Recursively Defined) Parameterized Architectures
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-33244xZDTP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2020 - Séminaire vir
 tuel via BigBlueButton\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n16:00 - Salle : Séminaire virtuel via BigBlueBut
 ton\n\nAina Rasoldier\, INRIA / Spades - VERIMAG / ETiCS\n\n\n« Les méth
 odologies d'évaluation des impacts environnementaux des technologies de l
 'information et de la communication (TIC) à l'échelle mondiale » \n\nR
 ésumé :\n\nLes solutions numériques sont souvent présentées comme ind
 ispensables pour répondre à l'évolution des besoins individuels et coll
 ectifs\, et des impacts environnementaux associés. Des rapports récents 
 comme ceux de The Shift Project ou de GreenIt ont suscité l'intérêt du 
 grand...
DTSTART:20201119T160000
DTEND:20201119T171500
DURATION:PT01H15M0S
LOCATION:Séminaire virtuel via BigBlueButton
SUMMARY:Aina Rasoldier - Les méthodologies d'évaluation des impacts envir
 onnementaux des technologies de l'information et de la communication (TIC)
  à l'échelle mondiale
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3326NfXvMX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 17 November 2020 - zoom\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : zoom\n\nSchuh Matheus\, Kalray/Verimag\n\n\n« A study of predicta
 ble execution models implementation for industrial data-flow applicationso
 n a multi-core platform with shared banked memory » \n\nAbstract:\n\n-- t
 o appear in RTSS 2020 ---\nWe study the implementation of data-flow applic
 ations on multi-core processor with on-chip shared multi-banked memory. Sp
 ecifically\, we consider the Kalray MPPA2 processor and three applications
  coded using the industrial toolchain SCADE Suite.We focus on the runtime 
 environment assuming global static scheduling\, time-triggered and non-pre
 emptive...
DTSTART:20201117T140000
DTEND:20201117T160000
DURATION:PT02H0M0S
LOCATION:zoom
SUMMARY:Schuh Matheus - A study of predictable execution models implementat
 ion for industrial data-flow applicationson a multi-core platform with sha
 red banked memory
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3330wti8Tb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  6 November 2020 - Virtual seminar 
 (the link will be sent later) \n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n10:30 - Salle : Virtual seminar (the link
  will be sent later) \n\nAkshay Mambakam\, VERIMAG\n\n\n« Learning Specif
 ications for Labelled Patterns » \n\nAbstract:\n\nWe present a supervised
  learning framework for inferring temporal logic specifications from label
 led patterns in signals\, so that the formulae can then be used to correct
 ly detect the same patterns in unlabelled samples. The input patterns that
  are fed to the training process are labelled by a Boolean signal that cap
 tures their occurrences. To express the patterns with quantitative feature
 s\, we use...
DTSTART:20201106T103000
DTEND:20201106T120000
DURATION:PT01H30M0S
LOCATION:Virtual seminar (the link will be sent later)
SUMMARY:Akshay Mambakam - Learning Specifications for Labelled Patterns
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3333Dx7Ub0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 October 2020 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:15 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nCyril Six\, Kalray - Verimag\nhttps://hal.archives-ouvertes.fr/hal-0
 2185883\n\n« Certified and Efficient Instruction Scheduling. Application 
 to Interlocked VLIW Processors.  » \n\nAbstract:\n\nCompCert is a moderat
 ely optimizing C compiler with a formal\, machine-checked\, proof of corre
 ctness: after successful compilation\, the assembly code has a behavior fa
 ithful to the source code. Previously\, it only supported target instructi
 on sets with sequential semantics\, and did not attempt reordering instruc
 tions for...
DTSTART:20201022T141500
DTEND:20201022T151500
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Cyril Six - Certified and Efficient Instruction Scheduling. Applica
 tion to Interlocked VLIW Processors.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-33363Ln9Mo@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 30 June 2020 - Online : https://ve
 ri-bbb.imag.fr/b/pie-zc2-ji9\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Online : https://veri-bbb.i
 mag.fr/b/pie-zc2-ji9\n\nSébastien Michelland\, ENS de Lyon\nhttps://veri-
 bbb.imag.fr/b/pie-zc2-ji9\n\n« Une Procédure de Décision pour les Relat
 ions d'Équivalence (A Decision Procedure for Equivalence Relations) » \n
 \nAbstract:\n\nEquality or equivalence between objects is a typical kind o
 f Coq goal that regularly appears in theories. When it is a consequence of
  the context\, one can simply rewrite their way through\, but it is more c
 onvenient to handle it with a tactic. The congruence tactic by Pierre Corb
 ineau is a...
DTSTART:20200630T140000
DTEND:20200630T150000
DURATION:PT01H0M0S
LOCATION:Online : https://veri-bbb.imag.fr/b/pie-zc2-ji9
SUMMARY:Sébastien Michelland - Une Procédure de Décision pour les Relati
 ons d'Équivalence (A Decision Procedure for Equivalence Relations)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-333916r02h@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 March 2020 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMathias  RAMPARISON\, University of Luxemburg\n\n\n« Updatable Parame
 tric Timed Automata: Decidability\, Algorithms\, and Application to Securi
 ty (Updatable Parametric Timed Automata: Decidability\, Algorithms\, and A
 pplication to Security) » \n\nAbstract:\n\nAs cyber-physical systems beco
 me more and more complex\, human debugging\nis not sufficient anymore to c
 over the huge range of possible\nbehaviours. For costly critical systems w
 here human lives can be\nendangered\, formally proving the safety of a sys
 tem is even...
DTSTART:20200312T140000
DTEND:20200312T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mathias  RAMPARISON - Updatable Parametric Timed Automata: Decidabi
 lity\, Algorithms\, and Application to Security (Updatable Parametric Time
 d Automata: Decidability\, Algorithms\, and Application to Security)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3342BnVGPw@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  9 March 2020 - Auditorium (Building
  IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n15:30 - Salle : Auditorium (Building IMAG)\n\nRémy Boutonnet\, V
 ERIMAG\nhttp://www-verimag.imag.fr/~boutonne/\n\n« Modular Analysis of Nu
 merical Properties by Abstract Interpretation » \n\nAbstract:\n\nJury\n\n
 - Andreas Podelski     Professeur\, Université de Freiburg       Rapporte
 ur\n- Antoine Miné         Professeur\, Sorbonne Université          Rap
 porteur\n- Cesare Tinelli       Professeur\, University of Iowa           
 Examinateur\n- Corinne Ancourt      Maître de recherche\, Mines ParisTech
      Examinatrice\n- Olivier Bouissou     Ingénieur\, Mathworks          
           ...
DTSTART:20200309T153000
DTEND:20200309T173000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Rémy Boutonnet - Modular Analysis of Numerical Properties by Abstr
 act Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3345Ssug14@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 21 February 2020 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n10:30 - Salle : Room 206 (2nd floor\, badged access
 )\n\nMichael Marcozzi\, Imperial College (London)\nhttps://sites.google.co
 m/view/michaelmarcozzi\n\n« Compiler Fuzzing: How Much Does It Matter? 
 » \n\nAbstract:\n\nDespite much recent interest in randomised testing (fu
 zzing) of compilers\, the practical impact of fuzzer-found compiler bugs o
 n real-world applications has barely been assessed. We present the first q
 uantitative and qualitative study of the tangible impact of miscompilation
  bugs in a mature compiler. We follow a rigorous methodology where the bug
  impact over...
DTSTART:20200221T103000
DTEND:20200221T113000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michael Marcozzi - Compiler Fuzzing: How Much Does It Matter?
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3347OBHRXX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 13 February 2020 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n10:30 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nJonathan Salwan\, Quarkslab\n\n\n« L'exécution symbolique pour l'a
 ide à la rétro-ingénierie dans un  cadre industriel » \n\nRésumé :\n
 \nCette thèse a été faite dans un cadre industriel où les activités p
 rincipales sont la rétro-ingénierie pour la recherche de vulnérabilit
 és et la vérification de certaines propriétés de sécurité sur des pr
 ogrammes déjà compilés. La première partie de cette thèse porte sur l
 a\ncollecte et le partage des problématiques industrielles lors de l’an
 alyse de...
DTSTART:20200213T103000
DTEND:20200213T123000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jonathan Salwan - L'exécution symbolique pour l'aide à la rétro-
 ingénierie dans un  cadre industriel
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3350CZvGeE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 12 February 2020 - Room 206 (2nd
  floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acc
 ess)\n\nSébastien  Bardin\, CEA-LIST\nhttp://sebastien.bardin.free.fr/\n
 \n« From Safety to Security: The Case of Binary-level Code Analysis » \n
 \nAbstract:\n\nSeveral major classes of security analysis have to be perfo
 rmed on raw executable files\, such as vulnerability analysis of mobile co
 de or commercial off-the-shelf\, deobfuscation or malware\ninspection. The
 se analysis are highly challenging\, due to the very low-level and intrica
 te nature of binary code\, and there is a clear need for more sophisticate
 d and automated...
DTSTART:20200212T140000
DTEND:20200212T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien  Bardin - From Safety to Security: The Case of Binary-le
 vel Code Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-33531ng5gb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 February 2020 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJules Chouquet\, IRIF \n\n\n« Lower bounds for probabilistic k-set
  agreement through combinatorial topology » \n\nAbstract:\n\nHerlihy and 
 Shavit (1999) introduced a powerful method for the analysis of distributed
  algorithms (in a shared memory with immediate snapshot model) that uses t
 opological properties of simplicial complexes. This methods allows to prov
 e impossibility results of some problems in distributed computing\, like c
 onsensus\, or k-set agreement (which is a generalization of consensus).\n
 \nBeyond the...
DTSTART:20200206T140000
DTEND:20200206T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jules Chouquet - Lower bounds for probabilistic k-set agreement thr
 ough combinatorial topology
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3356NVUnf6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  3 February 2020 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n11:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nMatthieu Jan and Asavoae Mihail\, CEA\n\n\n« Towards Automatic Extra
 ction of Timing models from HDL designs (Mihail Asavoae) - Tracking timing
  anomalies (Matthieu Jan) » \n\nAbstract:\n\nMihail Asavoae and Matthieu 
 Jan present their work on the topic of timing models and timing anomalies.
 \n\n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semi
 nars\,62.html?lang=en\nLocation/Vision: Room 206 (2nd floor\, badged acces
 s) -...
DTSTART:20200203T110000
DTEND:20200203T120000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Jan and Asavoae Mihail - Towards Automatic Extraction of T
 iming models from HDL designs (Mihail Asavoae) - Tracking timing anomalies
  (Matthieu Jan)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3359o7u89V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 27 January 2020 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMargus Veanes\, Microsoft Research Lab\nhttps://www.microsoft.com/en-u
 s/research/people/margus/\n\n« Symbolic Regexes & Matching » \n\nAbstrac
 t:\n\nSymbolic regex based matching and use of symbolic derivatives is a n
 ew topic with interesting theoretical and practical challenges driven by c
 oncrete applications. I will discuss some of the recent research and some 
 of the applications in Azure. I will also discuss some future and ongoing 
 work and other potential applications in related domains.\n \nThere is a n
 ew open...
DTSTART:20200127T103000
DTEND:20200127T113000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Margus Veanes - Symbolic Regexes & Matching
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3362WRFpkx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 27 January 2020 - Auditorium (Buildi
 ng IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nXiao XU\, VERIMAG
 \n\n\n« Thesis Defence - Xiao XU - Generalisation of Alternating Automata
  over Infinite Alphabets » \n\nAbstract:\n\nThe language inclusion proble
 m is recognised as being central to verification in different domains\, su
 ch as hardware\, communication protocols\, software systems\, etc. There w
 e might face two challenges: non-determinism and infinite alphabets.\n\nWe
  propose two models of alternating automata over infinite alphabets: (i) a
 lternating data automata (ADA) and (ii) first-order alternating data autom
 ata (FOADA)....
DTSTART:20200127T140000
DTEND:20200127T180000
DURATION:PT04H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Xiao XU - Thesis Defence - Xiao XU - Generalisation of Alternating 
 Automata over Infinite Alphabets
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3366oUGBuN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 19 December 2019 - Seminar Room\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n10:00 - Salle : Seminar Room\, ground floor
  (Building IMAG)\n\nHang Yu\, VERIMAG\n\n\n« Towards an Efficient Paralle
 l Parametric Linear Programming Solver » \n\nAbstract:\n\nVPL (Verified P
 olyhedra Library) is an abstract polyhedra domain using constraint-only de
 scription. Allmain operators boiled down to polyhedral projection\, which 
 can be computed using Fourier-Motzkinelimination [20].  This method genera
 tes many redundant constraints which must be eliminated at ahigh cost. A n
 ovel algorithm was implemented in VPL for computing the polyhedral project
 ion...
DTSTART:20191219T100000
DTEND:20191219T130000
DURATION:PT03H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Hang Yu - Towards an Efficient Parallel Parametric Linear Programmi
 ng Solver
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3371uUvXg9@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 December 2019 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nYannick Zakowski\, University of Pennsylvania\nhttps://www.seas.upe
 nn.edu/~zakowski/\n\n« From representing recursive and impure programs in
  Coq to a modular formal semantics of LLVM IR » \n\nAbstract:\n\nThe Deep
 Spec research project is a cross institution\, cross project investigation
  to push further the science of specification and verification of software
  artifacts. Its ambition is crystallized into four qualities that specific
 ations should have: they should be rich\, live\, two-sided and formal.\n\n
 In this talk\,...
DTSTART:20191219T140000
DTEND:20191219T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Zakowski - From representing recursive and impure programs 
 in Coq to a modular formal semantics of LLVM IR
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3375H9ibfE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 25 November 2019 - Auditorium (Buil
 ding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMoshe Vardi\, R
 ice University\nhttps://www.cs.rice.edu/~vardi/\n\n« Technology is Drivin
 g the Future\, But Who Is Steering?  » \n\nAbstract:\n\n\nThe benefits of
  computing are intuitive. Computing yields tremendous\nsocietal benefits\;
  for example\, the life-saving potential of\ndriverless cars is enormous. 
 But computing is not a game--it is\nreal--and it brings with it not only s
 ocietal benefits\, but also\nsignificant societal costs\, such as labor po
 larization\,\ndisinformation\, and smart-phone addiction. The common react
 ion to\nthis...
DTSTART:20191125T140000
DTEND:20191125T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Moshe Vardi - Technology is Driving the Future\, But Who Is Steerin
 g?
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3379vkcrnr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 November 2019 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nSophie Tourret\, Max-Planck-Institut für Informatik\, Saarbrücken
 \nhttps://www.mpi-inf.mpg.de/departments/automation-of-logic/people/sophie
 -tourret/\n\n« Stronger Higher-order Automation » \n\nAbstract:\n\nAutom
 ated reasoning in first-order logic (FOL) is becoming a mature research do
 main. It has led to the development of powerful tools such as superpositio
 n-based theorem provers and SMT solvers (Satisfiability Modulo Theory solv
 ers)\, that have found and continue to find many applications in industry 
 and...
DTSTART:20191121T140000
DTEND:20191121T153000
DURATION:PT01H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sophie Tourret - Stronger Higher-order Automation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3383uXAmGt@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 October 2019 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n15:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nJan Reineke\, Universität des Saarlandes\nhttp://embedded.cs.uni-sa
 arland.de/reineke.php\n\n« Spectector: Principled detection of speculativ
 e information flows » \n\nAbstract:\n\nSince the advent of SPECTRE\, a nu
 mber of countermeasures have been proposed and deployed. Rigorously reason
 ing about their effectiveness\, however\, requires a well-defined notion o
 f security against speculative execution attacks\, which has been missing 
 until now. In this paper (1) we put forward speculative non-interference\,
  the first...
DTSTART:20191010T150000
DTEND:20191010T160000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jan Reineke - Spectector: Principled detection of speculative infor
 mation flows
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3386mriMfP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  8 October 2019 - Seminar Room\, gr
 ound floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n16:00 - Salle : Seminar Room\, ground floor (
 Building IMAG)\n\nValentin TOUZEAU\, Verimag\n\n\n« Static Analysis of Le
 ast Recently Used Caches: Complexity\, Optimal Analysis\, and Applications
  to Worst-Case Execution Time and Security » \n\nAbstract:\n\nThe certifi
 cation of real-time safety critical programs requires bounding their execu
 tion time. Due to the high impact of cache memories on memory access laten
 cy\, modern Worst-Case Execution Time estimation tools include a cache ana
 lysis. The aim of this analysis is to statically predict if memory accesse
 s result in a...
DTSTART:20191008T160000
DTEND:20191008T180000
DURATION:PT02H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Valentin TOUZEAU - Static Analysis of Least Recently Used Caches: C
 omplexity\, Optimal Analysis\, and Applications to Worst-Case Execution Ti
 me and Security
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3390Hfvud6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 September 2019 - Room 206 (2nd
  floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acc
 ess)\n\nPierre-Jean Meyer\, University of California\, Berkeley\nhttp://ch
 apal.eu/pierre-jean_meyer/\n\n« Reachability analysis and decompositions 
 for abstraction-based control synthesis » \n\nAbstract:\n\nThis talk give
 s an overview of three recent results in the field of abstraction-based co
 ntrol synthesis\, where we create a finite abstraction of a continuous dyn
 amical system to synthesize a high-level controller with respect to some t
 emporal logic specification. First\, we introduce new results on reachabil
 ity analysis...
DTSTART:20190926T140000
DTEND:20190926T153000
DURATION:PT01H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Pierre-Jean Meyer - Reachability analysis and decompositions for ab
 straction-based control synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3394LLKgkD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 20 September 2019 - Auditorium (Bui
 lding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n09:00 - Salle : Auditorium (Building IMAG)\n\n-- Oded Maler 
 Memorial Day\, Organized by VERIMAG\n\n\n« Oded Maler Memorial Day » \n
 \nAbstract:\n\nThe laboratory VERIMAG is organizing a one-day workshop on 
 20 September 2019 in Grenoble to celebrate the life and scientific legacy 
 of Oded Maler\, who sadly left us last year. \n\nInformation on this event
  is available at\n\nhttps://odedmalerday.sciencesconf.org/\n\n\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther sem
 inars at VERIMAG -...
DTSTART:20190920T090000
DTEND:20190920T110000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:-- Oded Maler Memorial Day - Oded Maler Memorial Day
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3398PfAvlr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 September 2019 - Auditorium (B
 uilding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMartin Franz
 le\, Carl von Ossietzky Universitat Oldenburg\, Germany\nhttps://uol.de//h
 s/mitarbeiterinnen-und-mitarbeiter/prof-dr-martin-fraenzle\n\n« What’s 
 to Come is Still Unsure: Automatically Synthesizing and Verifying Controll
 ers Resilient to Delayed Interaction » \n\nAbstract:\n\nThe advent of sys
 tems of cooperative cyber-physical systems draws\nattention to a central p
 roblem of networked and distributed control\nsystems: the ubiquity of dela
 y in feedback loops between logically or\nspatially distributed components
 \, which is...
DTSTART:20190919T140000
DTEND:20190919T153000
DURATION:PT01H30M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Martin Franzle - What’s to Come is Still Unsure: Automatically Sy
 nthesizing and Verifying Controllers Resilient to Delayed Interaction
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3402vvXrOs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 July 2019 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nEric Gascard\, SCOP\, Polytech Grenoble\n\n\n«  Quantitative Analysis
  of Dynamic Fault Trees by means of Monte Carlo Simulations: Event-Driven 
 Simulation Approach ( Quantitative Analysis of Dynamic Fault Trees by mean
 s of Monte Carlo Simulations: Event-Driven Simulation Approach) » \n\nR
 ésumé :\n\nThe reliability analysis of complex and dynamic systems is of
 ten achieved by a quantitative analysis of dynamic\nfault trees (DFT)\, wh
 ich model the system failure\, i.e. a specific undesired event called top 
 event\, in terms...
DTSTART:20190711T140000
DTEND:20190711T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Eric Gascard -  Quantitative Analysis of Dynamic Fault Trees by mea
 ns of Monte Carlo Simulations: Event-Driven Simulation Approach ( Quantita
 tive Analysis of Dynamic Fault Trees by means of Monte Carlo Simulations: 
 Event-Driven Simulation Approach)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3406udXfzV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  9 July 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nLionel Rieg\, VERIMAG\n\n\n« Integrating Formal Schedulability Analysis
  into a Verifed OS Kernel » \n\nAbstract:\n\nFormal verification of real-
 time systems is attractive because these systems often perform critical op
 erations. Unlike non real-time systems\, latency and response time guarant
 ees are of critical importance in this setting\, as much as functional cor
 rectness. Nevertheless\, formal verification of real-time OSes usually sto
 ps the scheduling analysis at the policy level: they only prove that the s
 cheduler (or...
DTSTART:20190709T140000
DTEND:20190709T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lionel Rieg - Integrating Formal Schedulability Analysis into a Ver
 ifed OS Kernel
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3410d1GBeF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 July 2019 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nRadu IOSIF\, VERIMAG\nhttp://nts.imag.fr/index.php/Radu_Iosif\n\n« Al
 ternating Automata Modulo First Order Theories » \n\nAbstract:\n\nWe intr
 oduce first order alternating automata\, a generalization of\nboolean alte
 rnating automata\, in which transition rules are described\nby multisorted
  first order formulae\, with states and internal\nvariables given by unint
 erpreted predicate terms. The model is closed\nunder union\, intersection 
 and complement\, and its emptiness problem is\nundecidable\, even for the 
 simplest data...
DTSTART:20190704T140000
DTEND:20190704T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - Alternating Automata Modulo First Order Theories
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3414ZkWoO6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  2 July 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nIndranil Saha \, IIT Kanpur\, India\n\n\n« Developing Autonomous Multi-
 Robot Systems for Complex Missions » \n\nAbstract:\n\n Autonomous multi-r
 obot systems have tremendous potential to be useful in various application
 s\, including search and rescue\, surveillance\, law enforcement\, precisi
 on agriculture\, and warehouse management. Given a high-level mission spec
 ification for a multi-robot system\, it is technically challenging to dete
 rmine the responsibilities of the individual robots and a plan for them to
  execute their...
DTSTART:20190702T140000
DTEND:20190702T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Indranil Saha  - Developing Autonomous Multi-Robot Systems for Comp
 lex Missions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3418uNmAoo@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 June 2019 - Seminar Room\, ground
  floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (Buil
 ding IMAG)\n\nBraham Lotfi Mediouni\, Verimag (RSD)\n\n\n« Modeling and A
 nalysis of Stochastic Real-Time Systems » \n\nAbstract:\n\nIn this thesis
 \, we address the problem of modeling and verification of complex systems 
 exhibiting both probabilistic and timed behaviors. Designing such systems 
 has become increasingly complex due to the heterogeneity of the involved c
 omponents\, the uncertainty resulting from open environment and the real-t
 ime constraints inherent to their application domains. Handling both softw
 are and...
DTSTART:20190628T140000
DTEND:20190628T180000
DURATION:PT04H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Braham Lotfi Mediouni - Modeling and Analysis of Stochastic Real-Ti
 me Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3422i21MGA@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 26 June 2019 - Seminar Room Part 
 1\, ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room Part 1\, g
 round floor (Building IMAG)\n\nRany Kahil\, Verimag\, Université Grenoble
  Alpes\nhttps://www.linkedin.com/in/rany-kahil/\n\n« Schedulability in Mi
 xed- criticality Systems » \n\nRésumé :\n\nLes systèmes temps-réel cr
 itiques doivent exécuter  leurs tâches dans les délais impartis. En cas
  de défaillance\, des événements peuvent  avoir des catastrophes écono
 miques. Dans certain cas une atteinte à des vies humaines. Des classifica
 tions des défaillances par rapport aux niveaux des risques encourus ont 
 été...
DTSTART:20190626T140000
DTEND:20190626T160000
DURATION:PT02H0M0S
LOCATION:Seminar Room Part 1\, ground floor (Building IMAG)
SUMMARY:Rany Kahil - Schedulability in Mixed- criticality Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3426TUxoLg@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 25 June 2019 - Auditorium (Buildin
 g IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nHernan Ponce de Le
 on \, Fortiss\, Munich\, Germany\nhttps://www.fortiss.org/en/about-us/peop
 le/hernan-ponce-de-leon/\n\n« BMC with Weak Memory Models » \n\nAbstract
 :\n\nIn this talk I'll report progress in verification tool engineering fo
 r\nweak memory models. I will present Dartagnan\, a bounded model checking
 \ntools for concurrent programs. Its distinguishing feature is the memory
 \nmodel as part of the input. Dartagnan reads CAT\, the standard language
 \nfor memory models which allows to define x86/TSO\, ARMv7\, ARMv8\, Power
 \,\nC/C++\, and...
DTSTART:20190625T140000
DTEND:20190625T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hernan Ponce de Leon  - BMC with Weak Memory Models
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3430ULVM9x@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 14 June 2019 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nBenoit Barbot\, LACL\, Universite Paris Est\, Creteil\n\n\n« Cosmos a q
 uantitative verification tool for large stochastic systems » \n\nAbstract
 :\n\nLarge family of systems can be modeled with stochastic processes\, fo
 r example: waiting queue for network infrastructure\, biological systems\,
  road traffic flow\, ...\nDue to combinatorial explosion\, analysis using 
 exhaustive methods of such systems is intractable. More over it is often n
 ecessary to answer both\; qualitative question like 'Does an unsafe state 
 is reachable is the...
DTSTART:20190614T140000
DTEND:20190614T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Benoit Barbot - Cosmos a quantitative verification tool for large s
 tochastic systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3433kcu8j2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 June 2019 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSimon IOSTI\, Verimag\n\n\n« Using neural networks to improve perform
 ances of correct-by-construction controllers » \n\nAbstract:\n\nThe use o
 f neural networks is usually considered as antinomic with correct-by-const
 ruction paradigms. This situation can be thought of as illustrating the tr
 ade-off between performance and accuracy. Recent researches and ideas have
  nevertheless been put forth to investigate mixed approaches allowing for 
 the use of deep learning methods in correct-by-construction controller syn
 thesis (see\,...
DTSTART:20190613T140000
DTEND:20190613T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Simon IOSTI - Using neural networks to improve performances of corr
 ect-by-construction controllers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3437jjNVTx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 May 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSaddek  Bensalem\, Verimag \nhttps://www-verimag.imag.fr/~bensalem/\n\n
 «  Engineering Trustworthy Learning-Enabled Autonomous Systems » \n\nAbs
 tract:\n\nETLAS is a new H2020 project submitted last March.  \nThe ETLAS 
 proposal gathers prominent academic \nresearch groups and leading industri
 al partners  (12 partners from 6 European and 2 associated countries).\n\n
 The targeted breakthrough is to achieve cost-effectively higher Safety\, S
 ecurity and \nPerformance by developing a novel mixed design approach comb
 ining the...
DTSTART:20190509T140000
DTEND:20190509T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Saddek  Bensalem -  Engineering Trustworthy Learning-Enabled Autono
 mous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3441WAnoAd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 May 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMichael PERIN\, Verimag / UGA\nhttp://www-verimag.imag.fr/~perin/\n\n« 
 Découvrir AMC en 45 Questions a Choix Multiples » \n\nRésumé :\n\nLe l
 ogiciel AMC (Auto-Multiple-Choice) permet de générer et de corriger auto
 matiquement des QCM (Questionnaires à Choix Multiples).\nIl accepte des f
 ormats texte et LaTeX\, et produit en sortie une feuille de calcul de tabl
 eur qui associe une note à un numéro d'étudiant.\n\nAMC est fonctionnel
  et d'une utilisation relativement aisée à l'exception du réglage des 8
  paramètres...
DTSTART:20190502T140000
DTEND:20190502T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michael PERIN - Découvrir AMC en 45 Questions a Choix Multiples
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-34452jBmz1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 29 April 2019 - Seminar Room\, grou
 nd floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = =\n09:45 - Salle : Seminar Room\, ground floor (Bu
 ilding IMAG)\n\nInvited Speakers\, Onera\, Kalray\, INRIA\, Verimag ...\n
 \n\n« Journée thématique Verimag : Many-core Kalray MPPA\, implementati
 on and verification » \n\nAbstract:\n\nProgram :\n\n9.45: welcome\n10.00:
 \n    - Nicolas Tollenaere\, INRIA: 'KaNN (Kalray Neural Network)'\n    - 
 Cyril Six\, Verimag/Kalray 'Certified and modular postpass-scheduling for 
 VLIW processors in Compcert'\n    - Dumitru Potop\, INRIA 'Implementation 
 of parallel real-time application on MPPA'\n    - Guillaume Iooss\, INRIA\
 , 'Front End for the...
DTSTART:20190429T094500
DTEND:20190429T154500
DURATION:PT06H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Invited Speakers - Journée thématique Verimag : Many-core Kalray 
 MPPA\, implementation and verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-344991CAXX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  5 April 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nRadu IOSIF\, VERIMAG\n\n\n« On the Expressive Completeness and Complexi
 ty of Prenex Separation Logic » \n\nAbstract:\n\nThis talk investigates t
 he satisfiability problem for Separation Logic\, with unrestricted nesting
  of separating conjunctions and implications\, for prenex formulae\, in th
 e cases where the universe of possible locations is either countably infin
 ite or finite. If the quantifier prefix is in the language \exists*\forall
 *\, we call this fragment Bernays-Schönfinkel-Ramsey Separation Logic [
 BSR(SLk)]....
DTSTART:20190405T140000
DTEND:20190405T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - On the Expressive Completeness and Complexity of Prene
 x Separation Logic
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3453rVU3Pg@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 April 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nRadu IOSIF\, VERIMAG\n\n\n« Checking Deadlock-Freedom of Parametric C
 omponent-Based Systems » \n\nAbstract:\n\nWe consider concurrent systems 
 consisting of a finite but unknown number of components\, that are replica
 ted instances of a given set of finite state automata. The components comm
 unicate by executing interactions which are simultaneous atomic state chan
 ges of a set of components. We specify both the type of interactions (e.g.
 \ rendez-vous\, broadcast) and the topology (i.e.\ architecture) of the sy
 stem (e.g.\...
DTSTART:20190404T140000
DTEND:20190404T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - Checking Deadlock-Freedom of Parametric Component-Base
 d Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3457DUb3CR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  1 April 2019 - Auditorium (Buildin
 g IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n10:00 - Salle : Auditorium (Building IMAG)\n\nEdward A. Lee\, UC
  Berkeley\nhttps://ptolemy.berkeley.edu/~eal/\n\n« Living Digital Beings 
 » \n\nAbstract:\n\nRichard Dawkins famously said that a chicken is an egg
 's way of making\nanother egg.  Is a human a computer's way of making anot
 her computer?\nQuite possibly\, the digital devices and services that are 
 taking over so\nmany aspects of our lives should themselves be viewed as l
 iving beings\,\npart of the natural evolutionary process of life. I call t
 hese beings\n'eldebees\,' short for living digital beings. They are creatu
 res...
DTSTART:20190401T100000
DTEND:20190401T120000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Edward A. Lee - Living Digital Beings
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3460FJ7HbU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 March 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nOlivier VIDAL\, ISTerre\, Universite Grenoble-Alpes\n\n\n« Matières 
 premières et énergie à l’échelle mondiale dans le contexte de la tra
 nsition énergétique » \n\nRésumé :\n\nLes accords de Paris (COP21) pr
 évoient d’atteindre la neutralité carbone au niveau mondial en 2050. P
 our ce faire\, nous devons bâtir de nouvelles infrastructures de producti
 on\, stockage\, transport et utilisation d’énergie qui consomment de no
 mbreuses matières premières « de base » et des substances plus rares
 . Ces matières...
DTSTART:20190328T140000
DTEND:20190328T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Olivier VIDAL - Matières premières et énergie à l’échelle mo
 ndiale dans le contexte de la transition énergétique
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-34630EsZ2m@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 20 March 2019 - Rim El Ballouli\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n14:00 - Salle : Rim El Ballouli\n\nRim El Ballouli\, Universite Grenoble
  Alpes\n\n\n« Modeling Self-configuration in Architecture-based Self-adap
 tive systems » \n\nAbstract:\n\nModern systems are pressured to adapt in 
 response to their constantly changing environment to remain useful. Tradit
 ionally\, this adaptation has been handled at down times of the system. th
 ere is an increased demand to automate this process and achieve it whilst 
 the system is running. Self-adaptive systems were introduced as a realizat
 ion of continuously adapting systems. Self-adaptive systems are able to mo
 dify at...
DTSTART:20190320T140000
DTEND:20190320T160000
DURATION:PT02H0M0S
LOCATION:Rim El Ballouli
SUMMARY:Rim El Ballouli - Modeling Self-configuration in Architecture-based
  Self-adaptive systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3466IgPf6i@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  8 March 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMathias Bourgoin\, Nomadic Labs\nhttps://tezos.com/\n\n« An overview of
  the Tezos blockchain » \n\nAbstract:\n\nBlockchains\, such as Bitcoin or
  Ethereum\, are distributed and decentralized ledgers. Bitcoin was\, in 20
 09\,  the first blockchain\, allowing financial transactions using a crypt
 ocurrency. Then new blockchains such as Ethereum introduced smart contract
 s\, small computer programs running in the blockchain and Dapps\, distribu
 ted applications running on the blockchain (through smart contracts). Thes
 e blockchains are...
DTSTART:20190308T100000
DTEND:20190308T110000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mathias Bourgoin - An overview of the Tezos blockchain
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3469E5Ifo6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 22 February 2019 - Auditorium (Build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n13:30 - Salle : Auditorium (Building IMAG)\n\nMoustapha Lo\, V
 erimag\n\n\n« Implementing a Real-time Avionic application on a Manycore 
 Processor » \n\nAbstract:\n\nTraditional  single-cores are no longer suff
 icient to meet the growing needs of performance in avionics domain. Multi-
 core and many-core processors have emerged in the recent years in order to
  integrate several functions thanks to the resource sharing. In contrast\,
  all multi-core and many-core processors do not necessarily satisfy the av
 ionic constraints. We prefer to have more determinism than computing power
  because...
DTSTART:20190222T133000
DTEND:20190222T163000
DURATION:PT03H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Moustapha Lo - Implementing a Real-time Avionic application on a Ma
 nycore Processor
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3472imXiKG@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 February 2019 - IMAG Auditorium
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : IMAG Auditorium\n\nGuillaume Baudart\, IBM T. J. Watson
  Research Center\, Yorktown Heights\nhttps://researcher.watson.ibm.com/res
 earcher/view.php?person=ibm-Guillaume.Baudart\n\n« Probabilistic Reactive
  Programming (Probabilistic Reactive Programming) » \n\nAbstract:\n\nMode
 ling reactive systems with uncertainty is challenging because\nreactive sy
 stems typically run without terminating\, interact with an\nexternal envir
 onment\, and evolve during execution. To facilitate the\nmodeling of such 
 systems\, we propose a programming language that mixes\nfeatures from both
  probabilistic...
DTSTART:20190218T140000
DTEND:20190218T160000
DURATION:PT02H0M0S
LOCATION:IMAG Auditorium
SUMMARY:Guillaume Baudart - Probabilistic Reactive Programming (Probabilist
 ic Reactive Programming)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3475VD3p2r@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 February 2019 - Auditorium (gr
 ound floor)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n14:00 - Salle : Auditorium (ground floor)\n\nNikos Gorogiann
 is\, Facebook\nhttps://ngorogiannis.bitbucket.io/\n\n« Concurrency bug de
 tection at scale with Infer » \n\nAbstract:\n\nConcurrency bugs are notor
 iously difficult to reason about in program verification. \nI will present
  two static analyses deployed at Facebook for detecting (a) data races and
  (b) deadlocks\, both for Java code. These analyses have low-FP rates as a
  core design goal\, and are implemented in the open-source Infer analyser.
  I will discuss the design trade-offs of these analyses\, our experience f
 rom...
DTSTART:20190214T140000
DTEND:20190214T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (ground floor)
SUMMARY:Nikos Gorogiannis - Concurrency bug detection at scale with Infer
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3479ou03dr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 February 2019 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJacques COMBAZ\, CNRS\, Verimag\n\n\n« L'assemblage des composants
  en BIP (Assembling Components in BIP) » \n\nRésumé :\n\nL'infrastructu
 re BIP (Behavior\, Interactions\, Priorities) a pour objectif la conceptio
 n et l'analyse d'applications embarquées complexes et hétérogènes. Ell
 e permet la construction de modèles structurés en coordonnant les compos
 ants à l'aide d'opérateurs d'assemblage très expressifs (les connecteur
 s/interactions et les priorités).\nDans cet exposé nous revisitons d'abo
 rd la notion...
DTSTART:20190207T140000
DTEND:20190207T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jacques COMBAZ - L'assemblage des composants en BIP (Assembling Com
 ponents in BIP)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3482NRnLKM@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 25 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nTom Yamaguchi\, TOYOTA  \n\n\n« Application of Abstract Interpretatio
 n to the Automotive Electronic Control System » \n\nAbstract:\n\nApplicat
 ion of Abstract Interpretation to the Automotive Electronic Control System
 \n\n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semi
 nars\,62.html?lang=en\nLocation/Vision: Room 206 (2nd floor\, badged acces
 s) - https://batiment.imag.fr/fr/contact-adresses-plan-dacces\nTo unsubscr
 ibe\, reply to this...
DTSTART:20190125T140000
DTEND:20190125T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Tom Yamaguchi - Application of Abstract Interpretation to the Autom
 otive Electronic Control System
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3486uR7t56@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 January 2019 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nMaiza Claire\, VERIMAG\nhttp://www-verimag.imag.fr/~maiza\n\n« WCET
   and  interference  analysis  for  multicore systems » \n\nAbstract:\n\n
 In this talk\, we present a survey on multi-core timing analyses including
  delays due to\ninterferences (shared memory\, shared bus).\nWe show that 
 interference analysis is possible (scalability and precision).\nWe illustr
 ate this point with our interference analysis where the delay is integrate
 d into schedulability analysis.\nWe show that applying this analysis to a 
 real platform...
DTSTART:20190124T140000
DTEND:20190124T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Maiza Claire - WCET  and  interference  analysis  for  multicore sy
 stems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3490b2UlH3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 22 January 2019 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nGeorg Struth\, University of Sheffield\n\n\n« Verifying Hybrid Syste
 ms with Modal Kleene Algebra » \n\nAbstract:\n\nHybrid Systems integrate 
 continuous dynamics and discrete control. Their verification\, in domains 
 like the control of chemical plants\, finance and traffic systems\, the co
 ordination of autonomous vehicles or robots\, and the optimisation of mech
 anical systems or bio systems engineering\, is increasingly important. A p
 rominent approach is differential dynamic logic (dL)\, a modal logic for r
 easoning about...
DTSTART:20190122T140000
DTEND:20190122T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Georg Struth - Verifying Hybrid Systems with Modal Kleene Algebra
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3493H251h8@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 21 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSergio  Yovine\, Universidad ORT Uruguay\n\n\n« Formal specification 
 and implementation of an automated pattern-based parallel-code generation 
 framework » \n\nAbstract:\n\nFormal specification and implementation of a
 n automated pattern-based parallel-code generation framework\nGervasio P
 érez and Sergio Yovine\n\nAbstract \nProgramming correct parallel softw
 are in a cost-effective way is a\nchallenging task requiring a high degree
  of expertise. As an attempt to\novercoming the pitfalls undermining paral
 lel...
DTSTART:20190121T140000
DTEND:20190121T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sergio  Yovine - Formal specification and implementation of an auto
 mated pattern-based parallel-code generation framework
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3496KV1n0S@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 18 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nChi-Hong Cheng\, Fortiss\nhttps://www.fortiss.org/ueber-uns/mitarbeite
 r/chih-hong-cheng/\n\n« When neural networks meet dependability » \n\nAb
 stract:\n\nNeural networks are instrumental in developing automated drivin
 g components such as perception or intention prediction. The safety-critic
 al aspect of such a domain makes dependability of neural networks a centra
 l concern. In this talk\, I highlight our initial steps towards engineerin
 g dependable neural networks by considering approaches such as testing\, c
 onstraint...
DTSTART:20190118T140000
DTEND:20190118T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Chi-Hong Cheng - When neural networks meet dependability
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3499CNG5rJ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 January 2019 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nPaolo Torrini\, Verimag / PACSS\n\n\n« Reifying and translating a m
 onadic fragment of Gallina » \n\nAbstract:\n\nWe present ongoing work on 
 verified compilation of imperative\nfunctional code in Coq\, relying on th
 e CompCert C compiler and using a\nreflective approach. Here we focus on t
 he reflection of a monadic\nfragment of Gallina\, corresponding to a first
 -order imperative\nlanguage with primitive recursion\, in a deeply embedde
 d extensible\nlanguage that we call DEC2 and which can be translated to th
 e CompCert\nC...
DTSTART:20190117T140000
DTEND:20190117T153000
DURATION:PT01H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Torrini - Reifying and translating a monadic fragment of Gall
 ina
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3502C1NVvK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  8 January 2019 - Auditorium (Buil
 ding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMichal Valko\, 
 SequeL\, Inria Lille - Nord Europe\nhttp://researchers.lille.inria.fr/~val
 ko/hp/\n\n« The power of graphs in speeding up online learning and decisi
 on making » \n\nAbstract:\n\n I will describe adaptive solutions of using
  graphs for efficiently encoding\, discovering\, and using the (extra) inf
 ormation that is either explicitly or implicitly present in a given enviro
 nment. This information can be\, smoothness\, side observations\, state-sp
 aces similarities\, or a favorable reward structure which makes the learni
 ng faster or...
DTSTART:20190108T140000
DTEND:20190108T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Michal Valko - The power of graphs in speeding up online learning a
 nd decision making
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3506l5RMpB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  7 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMichal Valko\,  SequeL\, Inria Lille - Nord Europe\n\n\n« A simple pa
 rameter-free and adaptive approach to optimization under a minimal local s
 moothness assumption » \n\nAbstract:\n\nWe will describe the history and 
 the most recent results in the bandit approach black-box optimization with
  provable global guarantees. In particular\,  we will study the problem of
  optimizing a function under a budgeted number of evaluations. We only ass
 ume that the function is locally smooth around one of its global optima. T
 he difficulty...
DTSTART:20190107T140000
DTEND:20190107T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michal Valko - A simple parameter-free and adaptive approach to opt
 imization under a minimal local smoothness assumption
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3509iNFMHu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 19 December 2018 - Room 248\, IM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Room 248\, IMAG\n\nKhalil Ghorbal\, INRIA\nhttp://kha
 lilghorbal.info/\n\n« Simulating and Verifying Cyber-Physical Systems: Cu
 rrent Challenges and Novel Research Directions » \n\nAbstract:\n\nModelin
 g real-life applications require the ability to combine continuous and dis
 crete behaviors at once. The behavior of physical components\, governed by
  electrical and kinetic laws\, are naturally represented as continuous sol
 utions of differential equations. It contrasts with several inherently dis
 crete phenomenon such as...
DTSTART:20181219T140000
DTEND:20181219T160000
DURATION:PT02H0M0S
LOCATION:Room 248\, IMAG
SUMMARY:Khalil Ghorbal - Simulating and Verifying Cyber-Physical Systems: C
 urrent Challenges and Novel Research Directions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3512XiEh65@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 17 December 2018 - Seminar Room 2\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room 2\, ground flo
 or (Building IMAG)\n\nNIKOLAOS KEKATOS\, Verimag Laboratory\, University o
 f Grenoble Alpes\n\n\n« Vérification formelle des systèmes cyber-physiq
 ues dans le processus industriel de la conception basée sur modèle (Form
 al Verification of Cyber-Physical Systems in the Industrial Model-Based De
 sign Process) » \n\nRésumé :\n\nLes systèmes cyber-physiques sont une 
 classe de systèmes complexes\, de grande échelle\, souvent critiques enl
 ever de sûreté\, qui apparaissent dans des applications industrielles va
 riées. Des...
DTSTART:20181217T140000
DTEND:20181217T160000
DURATION:PT02H0M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:NIKOLAOS KEKATOS - Vérification formelle des systèmes cyber-physi
 ques dans le processus industriel de la conception basée sur modèle (For
 mal Verification of Cyber-Physical Systems in the Industrial Model-Based D
 esign Process)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3515zaUnXT@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 11 December 2018 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nBibek Kabi\, LIX \nhttp://www.lix.polytechnique.fr/Labo/Bibek.Kabi/
 \n\n« Combining Zonotope Abstraction and Constraint Programming for Synth
 esizing Inductive Invariants » \n\nAbstract:\n\nWe propose to extend an e
 xisting framework combining ab-\nstract interpretation and continuous cons
 traint programming for numer-\nical invariant synthesis\, by using more ex
 pressive underlying abstract\ndomains\, such as zonotopes. The original me
 thod\, which relies on itera-\ntive refinement\, splitting and tightening 
 a collection of...
DTSTART:20181211T140000
DTEND:20181211T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Bibek Kabi - Combining Zonotope Abstraction and Constraint Programm
 ing for Synthesizing Inductive Invariants
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3518J4Pu0C@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2018 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJoseph Sifakis\, Verimag\nhttp://www-verimag.imag.fr/PEOPLE/Joseph.
 Sifakis/\n\n« On the Nature of Autonomy: A Rigorous Architectural Charact
 erization  » \n\nAbstract:\n\nThe concept of autonomy is key to the IoT v
 ision promising increasing integration of smart services and systems minim
 izing human intervention. This vision challenges our capability to build c
 omplex open trustworthy autonomous systems. We lack a rigorous common sema
 ntic framework for autonomous systems. There is currently a lot of confusi
 on...
DTSTART:20181206T140000
DTEND:20181206T153000
DURATION:PT01H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - On the Nature of Autonomy: A Rigorous Architectura
 l Characterization
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3521msvodI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 November 2018 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nSylvain Boulmé\, Verimag\nhttps://github.com/boulme/ImpureDemo\n\n
 « Importation d'oracles ML impératifs dans du code Coq vérifié » \n\n
 Résumé :\n\nL'utilisation d'oracles dans du code Coq est une des clés d
 u succès de CompCert (le premier compilateur C formellement vérifié). U
 n tel oracle correspond à du code non vérifié développé en OCaml\, et
  qui produit des résultats qui sont vérifiés par du code prouvé en Coq
 . Cependant\, dans CompCert\, les oracles sont actuellement déclarés à 
 travers une...
DTSTART:20181129T140000
DTEND:20181129T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain Boulmé - Importation d'oracles ML impératifs dans du code
  Coq vérifié
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-352460J1Ku@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 November 2018 - Auditorium (Bu
 ilding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =\n10:00 - Salle : Auditorium (Building IMAG)\n\nanalyse et ve
 rif. legeres Une journee de reflexion\, 5 exposes  10h - 16h30\nhttps://me
 nsuel.framapad.org/p/programme-lightweight-verification\n\n« Techniques d
 'analyse et de verification legeres  (Lightweight analysis and verificatio
 n techniques) » \n\nRésumé :\n\nPROGRAMME : 5 seminaires de 45 min suiv
 i de 10 min de question\n\n* 10h-10h55 : Julia LAWALL\, Directrice de Rech
 erche INRIA/LIP6 (Source-Code Evolution and Bug Finding in OS)\n\n   TITLE
  : Software evolution and bug finding using Coccinelle\n\n   ABSTRACT : Co
 ccinelle...
DTSTART:20181122T100000
DTEND:20181122T163000
DURATION:PT06H30M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:analyse et verif. legeres Une journee de reflexion - Techniques d'a
 nalyse et de verification legeres  (Lightweight analysis and verification 
 techniques)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3528pPved8@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 16 November 2018 - Auditorium (Build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n10:30 - Salle : Auditorium (Building IMAG)\n\nAmaury Graillat\
 , VERIMAG/KALRAY\n\n\n« Parallel Code Generation of Synchronous Programs 
 for a Many-core Architecture » \n\nRésumé :\n\nLa plupart des systèmes
  critiques sont dits temps-réel durs\npuisqu'ils requièrent des garantie
 s temporelle fortes. Ces\nsystèmes sont de plus en plus complexes et les 
 processeurs\nmono-cœurs traditionnels ne sont plus assez puissants. Les\n
 multi-cœurs et les pluri-cœurs sont des alternatives plus\npuissantes\, 
 cependant ils contiennent des ressources partagées.\nLes accès concurren
 ts à ces...
DTSTART:20181116T103000
DTEND:20181116T123000
DURATION:PT02H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Amaury Graillat - Parallel Code Generation of Synchronous Programs 
 for a Many-core Architecture
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3531CuczIV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 31 October 2018 - Auditorium (Bui
 lding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMahieddine DEL
 LABANI\, Verimag\n\n\n« Formal Methods for Distributed Real-Time Systems 
 » \n\nAbstract:\n\nNowadays\, real-time systems are ubiquitous in several
  application domains. Such an emergence led to an increasing need of perfo
 rmance (resources\, availability\, concurrency\, etc.) and initiated a shi
 ft from the use of single processor based hardware platforms\, to large se
 ts of interconnected and distributed computing nodes. This trend introduce
 d the birth of a new family of systems that are intrinsically distributed\
 , namely...
DTSTART:20181031T140000
DTEND:20181031T170000
DURATION:PT03H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Mahieddine DELLABANI - Formal Methods for Distributed Real-Time Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3534a4KdBI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 23 October 2018 - Room 206 (2nd fl
 oor\, restricted access)\n= = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, restricte
 d access)\n\nThusitha Asela Bandara\, Verimag\n\n\n« Un protocole de char
 ge adaptatif pour les batteries Lithium-lon (An Adaptive Charge Protocol f
 or Lithium-lon Batteries) » \n\nRésumé :\n\nLes batteries secondaires a
 u lithium-ion (Li-ion) sont devenues la technologie prédominante pour une
  gamme d'appareils électroniques allant des gadgets de consommation aux l
 ocomotives haut de gamme et aux stockages d'énergie dans les réseaux int
 elligents. La prolifération des appareils mobiles et les développements 
 récents...
DTSTART:20181023T140000
DTEND:20181023T150000
DURATION:PT01H0M0S
LOCATION:Room 206 (2nd floor\, restricted access)
SUMMARY:Thusitha Asela Bandara - Un protocole de charge adaptatif pour les 
 batteries Lithium-lon (An Adaptive Charge Protocol for Lithium-lon Batteri
 es)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-35376HraNV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 October 2018 - Amphi D1\, DLST
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Amphi D1\, DLST\n\nFlorent Chevrou\, IRIT\n\n\n« Forma
 lisation of Asynchronous Interactions » \n\nAbstract:\n\nLarge computing 
 systems are generally built by connecting several distributed subsystems. 
 The way these entities communicate is crucial to the proper functioning of
  the overall composed system. Therefore\, in the context of the formal dev
 elopment and verification of such systems\, an in-depth study of these int
 eractions makes sense\, especially when it comes to decomposition an subst
 itutability. There are two categories: synchronous and asynchronous commun
 ication. In...
DTSTART:20181011T140000
DTEND:20181011T160000
DURATION:PT02H0M0S
LOCATION:Amphi D1\, DLST
SUMMARY:Florent Chevrou - Formalisation of Asynchronous Interactions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3539skuglO@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 October 2018 - Salle Séminair
 e (rez-de-chaussée Bât IMAG)\n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n15:30 - Salle : Salle Séminaire (rez-de-
 chaussée Bât IMAG)\n\nErwan Jahier\, verimag\n\n\n« [Technical Seminar]
  A gentle introduction to Gitlab-CI and docker » \n\nAbstract:\n\nThe fir
 st edition of the 'Verimag Technical Seminars' (we plan to organize around
  4 such seminars per year) deals with gitlab-CI and docker.\n\nThe objecti
 ve is to rough out the subject\, and explain why (and how) those tools can
  help with\n  - the development and the maintenance of research prototypes
 \n  - install/try new software without polluting its .bashrc\n  - distribu
 te...
DTSTART:20181004T153000
DTEND:20181004T173000
DURATION:PT02H0M0S
LOCATION:Salle Séminaire (rez-de-chaussée Bât IMAG)
SUMMARY:Erwan Jahier - [Technical Seminar] A gentle introduction to Gitlab-
 CI and docker
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3542sfOIkR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 20 September 2018 - Salle 206\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Salle 206\n\nCyril Six\, Kalray & Verimag\nhttps://www.kalr
 ayinc.com/\n\n« Compilateur CompCert certifié pour processeur VLIW Kalra
 y (Extending the CompCert certified compiler for a VLIW processor of Kalra
 y) » \n\nRésumé :\n\nLes processeurs VLIW [Fisher\, 1983]\, acronyme de
  « Very Long Instruction Word »\, sont conçus pour donner aux programme
 s assembleurs du contrôle sur la façon de paralléliser les ressources d
 e processeur à chaque instruction. Autrement dit\, une instruction VLIW r
 eprésente un certain agrégat de calculs atomiques à exécuter en parall
 èle sur les...
DTSTART:20180920T140000
DTEND:20180920T153000
DURATION:PT01H30M0S
LOCATION:Salle 206
SUMMARY:Cyril Six - Compilateur CompCert certifié pour processeur VLIW Kal
 ray (Extending the CompCert certified compiler for a VLIW processor of Kal
 ray)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3545dMsXor@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 September 2018 - Salle 206 (sa
 lle Chamois)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =\n14:00 - Salle : Salle 206 (salle Chamois)\n\nFranz Mayr\, U
 niversidad ORT Uruguay\n\n\n« Regular inference on artificial neural netw
 orks » \n\nAbstract:\n\nThis paper explores the general problem of explai
 ning the behavior of artificial neural networks (ANN). The goal is to cons
 truct a representation which enhances human understanding of an ANN as a s
 equence classifier\, with the purpose of providing insight on the rational
 e behind the classification of a sequence as positive or negative\, but al
 so to enable performing further analyses\, such as automata-theoretic form
 al...
DTSTART:20180913T140000
DTEND:20180913T150000
DURATION:PT01H0M0S
LOCATION:Salle 206 (salle Chamois)
SUMMARY:Franz Mayr - Regular inference on artificial neural networks
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3548U59A0g@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 25 June 2018 - Room 206\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - S
 alle : Room 206\n\nStefano Berardi\, University of Torino\nhttp://www.di.u
 nito.it/~stefano/\n\n« Martin-Lof's Inductive Definitions Are Not Equival
 ent to Cyclic Proofs » \n\nAbstract:\n\nCyclic proofs (Brotherston\, Simp
 son) are an alternative formalization of induction on data bases\, suitabl
 e for proof search and for Separation Logic\, it is interesting to know wh
 at tehy are able to prove. Brotherston-Simpson Conjecture (2011) says  tha
 t cyclic proofs are equivalent to LKID\, Martin-Lof's Theory of (finitary)
  Inductive Definitions. Brotherston-Simpson Conjecture is false (Fossacs 2
 017): the...
DTSTART:20180625T100000
DTEND:20180625T120000
DURATION:PT02H0M0S
LOCATION:Room 206
SUMMARY:Stefano Berardi - Martin-Lof's Inductive Definitions Are Not Equiva
 lent to Cyclic Proofs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-35516ZcMU3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 22 June 2018 - Seminar Room\, groun
 d floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n11:00 - Salle : Seminar Room\, ground floor (Bui
 lding IMAG)\n\nPallab Dasgupta\, IIT Kharagpur\nhttp://cse.iitkgp.ac.in/~p
 allab/\n\n« Verification challenges in the Power Management fabric of Int
 egrated Circuits » \n\nAbstract:\n\nPower is one of the primary criteria 
 for design optimization. Modern SOCs have extremely complex power manageme
 nt fabric which is responsible for orchestrating the delivery of power to 
 various power domains inside the integrated circuit. Messing up the power 
 management is not uncommon\, and often the errors are manifested through c
 orruption in...
DTSTART:20180622T110000
DTEND:20180622T120000
DURATION:PT01H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Pallab Dasgupta - Verification challenges in the Power Management f
 abric of Integrated Circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3553kgVxxE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 31 May 2018 - Auditorium (IMAG)\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 14:00 - Salle : Auditorium (IMAG)\n\nCristina Serban\, VERIMAG\, Universit
 é Grenoble Alpes\n\n\n« Raisonnement automatisé pour la Logique de Sép
 aration avec des définitions inductives (Automated Reasoning in Separatio
 n Logic with Inductive Definitions) » \n\nRésumé :\n\nLa contribution p
 rincipale de cette thèse est un système de preuve correct et complet pou
 r les implications entre les prédicats inductifs\, fréquemment rencontr
 ées lors de la vérification des programmes qui utilisent des structures 
 de données récursives allouées dynamiquement. Nous introduisons un syst
 ème de...
DTSTART:20180531T140000
DTEND:20180531T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Cristina Serban - Raisonnement automatisé pour la Logique de Sépa
 ration avec des définitions inductives (Automated Reasoning in Separation
  Logic with Inductive Definitions)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3557bukDXT@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 May 2018 - salle 206\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : salle 206\n\nMichael PERIN\, VERIMAG / Université Grenoble-Alp
 es\nhttp://www-verimag.imag.fr/~perin/\n\n« Automatic Grading: take a CEG
 AR and let the machine do your work » \n\nAbstract:\n\nWorking as an assi
 stant professor is great\, but with one dark side: grading exams is boring
  and takes time. The unavoidable consequence is non-uniform marking due to
  the weariness of a human corrector. Moreover\, it provides few and delaye
 d feedbacks to students.\n\nNowadays almost all students work on their own
  laptops and it thus becomes feasible to use these for digital exams. For 
 teaching...
DTSTART:20180517T140000
DTEND:20180517T150000
DURATION:PT01H0M0S
LOCATION:salle 206
SUMMARY:Michael PERIN - Automatic Grading: take a CEGAR and let the machine
  do your work
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3560TvuVvu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 16 May 2018 - Auditorium (IMAG)\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n14:00 - Salle : Auditorium (IMAG)\n\nArvind Adimoolam\, VERIMAG\nhttps:/
 /sites.google.com/site/arvind23adi/\n\n« A Calculus of Complex Zonotopes 
 for Computing Invariants of Affine Hybrid Systems » \n\nAbstract:\n\nComp
 uting reachable sets is a de facto approach used in many formal verificati
 on methods for hybrid systems. But exact computation of the reachable set 
 is an intractable problem for many kinds of hybrid systems\, either due to
  undecidability or high computational complexity. Alternatively\, quite a 
 lot of research has been focused on using set representations that can be 
 efficiently...
DTSTART:20180516T140000
DTEND:20180516T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Arvind Adimoolam - A Calculus of Complex Zonotopes for Computing In
 variants of Affine Hybrid Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3563x6aplm@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 15 May 2018 - Batiment IMAG\, Sall
 e 206\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Batiment IMAG\, Salle 206\n\nLuc Jaulin\, Lab-STIC
 C\, ENSTA-Bretagne\nhttp://www.ensta-bretagne.fr/jaulin/\n\n« Computing i
 nner and outer approximations of forward reach sets of a nonlinear dynamic
 al system » \n\nAbstract:\n\nGiven a nonlinear continous-time system and 
 an initial set X0\, the forward reach set corresponds to the set of all st
 ates that can be reached for some given time t>0\, assuming that the initi
 al state belongs to X0. In the presentation\, I will show that guaranteed 
 inner and outer approximations of the forward reach set can be computed by
  using a fixed...
DTSTART:20180515T140000
DTEND:20180515T160000
DURATION:PT02H0M0S
LOCATION:Batiment IMAG\, Salle 206
SUMMARY:Luc Jaulin - Computing inner and outer approximations of forward re
 ach sets of a nonlinear dynamical system
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-35664zOtDa@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  7 May 2018 - Auditorium (IMAG)\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13
 :30 - Salle : Auditorium (IMAG)\n\nAlexandre Rocca\, Verimag\n\n\n« Méth
 odes formelles pour la modélisation et la validation de modèles biologiq
 ues (Formal methods for modelling and validation of biological models) » 
 \n\nRésumé :\n\nL'objectif de cette thèse est la modélisation et l'ét
 ude de systèmes biologiques par l'intermédiaire de méthodes formelles. 
 Les systèmes biologiques démontrent des comportements continues mais son
 t aussi susceptibles de montrer des changements abruptes dans  leur dynami
 ques. Les équations différentielles ordinaires\, ainsi que les systèmes
 ...
DTSTART:20180507T133000
DTEND:20180507T170000
DURATION:PT03H30M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Alexandre Rocca - Méthodes formelles pour la modélisation et la v
 alidation de modèles biologiques (Formal methods for modelling and valida
 tion of biological models)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3570ffF9dg@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 17 April 2018 - Meeting room 206 (
 IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n11:00 - Salle : Meeting room 206 (IMAG)\n\nJim Kapinski\, TEMA Toy
 ota\, USA\n\n\n« Verification of Learning-Enabled\, Cyber-Physical System
 s   » \n\nRésumé :\n\n \n\n\nAbstract:\n\nCyber-physical systems (CPSs)
  are used in many mission critical applications\, such as automobiles\, ai
 rcraft\, and medical devices\; therefore\, it is vital to ensure that thes
 e systems behave correctly. Designs for modern CPSs often include learning
 -enabled (LE) components\, such as neural networks and support vector mach
 ines\, whose behaviors emerge as a result of processing training data\; ho
 wever\, verifying...
DTSTART:20180417T110000
DTEND:20180417T120000
DURATION:PT01H0M0S
LOCATION:Meeting room 206 (IMAG)
SUMMARY:Jim Kapinski - Verification of Learning-Enabled\, Cyber-Physical Sy
 stems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3573tvm64v@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 April 2018 - IMAG 206\n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 
 - Salle : IMAG 206\n\nMaria Méndez Real\, ATER IETR Nantes - équipe SYSC
 OM\nhttp://www-labsticc.univ-ubs.fr/~mendez/\n\n« Cache-based attacks and
  spatial isolation countermeasure on multi and many-core architectures » 
 \n\nAbstract:\n\nLogic Side-Channel Attacks (SCA) allow an attacker which 
 has no physical access to the system to perform powerful attacks against s
 ensitive operations including cryptographic implementations. Indeed\, when
  a victim and an attacker processes share physical resources\, the attacke
 r is able to deduce sensitive information about the victim by monitoring i
 ts own...
DTSTART:20180412T140000
DTEND:20180412T150000
DURATION:PT01H0M0S
LOCATION:IMAG 206
SUMMARY:Maria Méndez Real - Cache-based attacks and spatial isolation coun
 termeasure on multi and many-core architectures
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3576UCLEL2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : 206\n\nAnastasia Volkova\, LIP\, ENS de Lyon\nhttps://avolkova.org/\n
 \n« Towards reliable implementation of digital filters. How digital signa
 l processing and computer arithmetic meet (candidate poste MCF) » \n\nAbs
 tract:\n\nThis work focuses on the improvement of numerical algorithms for
  the rigorous design of linear digital filters for signal processing. \nAs
 suming exact real arithmetic\, the theory of these filters has been firmly
  established for a long time.\nHowever\, many problems arise when confront
 ed with the practice: the coefficients of the filters are represented on a
  small...
DTSTART:20180322T150000
DTEND:20180322T160000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Anastasia Volkova - Towards reliable implementation of digital filt
 ers. How digital signal processing and computer arithmetic meet (candidate
  poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3579Wrfnxe@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n16:00 - Sal
 le : 206\n\nGuilhem Jaber\, ENS Lyon/LIP Plume\nhttp://guilhem.jaber.fr/\n
 \n« Model-checking contextual equivalence of higher-order programs with r
 eferences (candidat poste MCF) » \n\nAbstract:\n\nThis talk will present 
 SyTeCi\, the first general automated tool to check contextual equivalence 
 for programs written in an higher-order language with references (i.e. loc
 al mutable states)\, corresponding to a fragment of OCaml.\n\nAfter introd
 ucing the notion of contextual equivalence\, we will see on some examples 
 why it is hard to prove such equivalences (reentrant calls\, private state
 s). As we...
DTSTART:20180322T160000
DTEND:20180322T170000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Guilhem Jaber - Model-checking contextual equivalence of higher-ord
 er programs with references (candidat poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3582aMZ6F3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 19 March 2018 - salle 206\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : salle 206\n\nBenjamin Farinier\, CEA_LIST-SaClay\n\n\n« Model Ge
 neration for Quantified Formulas: A Taint-Based Approach » \n\nAbstract:
 \n\nAbstract : We focus in this paper on generating models of quantified f
 irst-order formulas over built-in theories\, which is paramount in softwar
 e verification and bug finding. While standard methods are either geared t
 oward proving the absence of solution or targeted to specific theories\, w
 e propose a generic approach based on a reduction to the quantifier-free c
 ase. Our technique allows thus to reuse all the efficient machinery develo
 ped for that...
DTSTART:20180319T140000
DTEND:20180319T150000
DURATION:PT01H0M0S
LOCATION:salle 206
SUMMARY:Benjamin Farinier - Model Generation for Quantified Formulas: A Tai
 nt-Based Approach
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3585kEBz1C@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : 206\n\nAyoub  Nouri\, VERIMAG\nhttp://www-verimag.imag.fr/~nouri/\n\n
 « ASTROLABE: A Rigorous Approach for System-Level Performance Modeling  a
 nd Analysis (candidat poste MCF) » \n\nAbstract:\n\nBuilding abstract sys
 tem-level models that faithfully capture performance and functional behavi
 or for embedded systems design is challenging. Unlike functional aspects\,
  performance details are rarely available during the early design phases\,
  and no clear method is known to characterize them. Moreover\, once such m
 odels are built\, they are inherently complex as they mix software models\
 , hardware...
DTSTART:20180315T150000
DTEND:20180315T160000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Ayoub  Nouri - ASTROLABE: A Rigorous Approach for System-Level Perf
 ormance Modeling  and Analysis (candidat poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3588lkV0Nr@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : 206\n\nLionel Rieg\, Yale University \nhttps://cpsc.yale.edu/people/l
 ionel-rieg\n\n« Extending a verified OS kernel for real-time » \n\nAbstr
 act:\n\nThe CertiKOS operating system is a verified OS kernel\, written in
  C and proven in Coq.  Leveraging CompCert\, it provides end-to-end correc
 tness proofs all the way down to the generated assembly code. It is design
 ed into many abstraction layers that isolate the various components of the
  OS and permit to abstract reasoning on the actual code into reasoning on 
 its specification.\nMy current work aims at extending it into a real-time 
 kernel.  In...
DTSTART:20180315T140000
DTEND:20180315T150000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Lionel Rieg - Extending a verified OS kernel for real-time
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3591zUZZNw@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : 206\n\nIvan  Gazeau\, LORIA\, Nancy \nhttps://members.loria.fr/IGazea
 u/\n\n« Automated verification of privacy-type properties for security pr
 otocols (MCF Candidate) » \n\nAbstract:\n\n\n  The applied pi-calculus is
  a powerful framework to model protocols and to\ndefine security propertie
 s. In this symbolic model\, it is possible to\nverify automatically comple
 x security properties such as strong secrecy\,\nanonymity and unlinkabilit
 y properties which are based on equivalence of processes.\n  In this talk\
 , we will see an overview of a verification method used by a\ntool\, Akiss
 . The tool is...
DTSTART:20180308T140000
DTEND:20180308T160000
DURATION:PT02H0M0S
LOCATION:206
SUMMARY:Ivan  Gazeau - Automated verification of privacy-type properties fo
 r security protocols (MCF Candidate)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3594O3TIVU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 February 2018 - Room 204\n= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:
 00 - Salle : Room 204\n\nGheorghe Stefanescu\, University of Bucharest\nht
 tp://fmi.unibuc.ro/ro/stefanescu_gheorghe/\n\n« Adaptive systems made by 
 self-assembling heterogeneous components within regular 2D patterns » \n
 \nAbstract:\n\nThis talk focuses on extensions of regular ​languages/
 ​expressions in 2- and 3-dimensions\, with applications to interactive p
 rogramming and adaptive systems. We start with a new model of adaptive sys
 tems\, called ``virtual organisms''\; then we briefly present Agapia\, a s
 tructured HPC programming environment ​here ​used for getting quick im
 plementations for...
DTSTART:20180215T140000
DTEND:20180215T160000
DURATION:PT02H0M0S
LOCATION:Room 204
SUMMARY:Gheorghe Stefanescu - Adaptive systems made by self-assembling hete
 rogeneous components within regular 2D patterns
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3597JXR7vf@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  5 February 2018 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:30 - Salle : Auditorium (IMAG)\n\nMaxime Puys\, Verimag\nhttps://max
 ime.puys.name\n\n« Sécurité des systèmes industriels : filtrage applic
 atif et recherche de scénarios d’attaques (Cybersecurity of Industrial 
 Systems: Applicative Filtering and Generation of Attack Scenarios) » \n\n
 Résumé :\n\nLes systèmes industriels sont depuis peu la cible d'attaque
 s informatiques. Dû\nà leurs interactions avec le monde réel\, ils peuv
 ent être dangereux pour\nl'environnement et les humains. Ces systèmes on
 t longtemps été isolés\nd'Internet et ont été protégés par construc
 tion...
DTSTART:20180205T103000
DTEND:20180205T123000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Maxime Puys - Sécurité des systèmes industriels : filtrage appli
 catif et recherche de scénarios d’attaques (Cybersecurity of Industrial
  Systems: Applicative Filtering and Generation of Attack Scenarios)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3600PV4UbD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 January 2018 - ENSIMAG Amphi E
  \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : ENSIMAG Amphi E \n\nDavid Monniaux\, CNRS / VERIMAG\nh
 ttp://www-verimag.imag.fr/~monniaux\n\n« SPECTRE + MELTDOWN » \n\nAbstra
 ct:\n\n* Cache timing attacks\n* Branch predictor attacks\n* Attack on KAS
 LR\n* MELTDOWN\n* SPECTRE\n\n\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\nOther seminars at VERIMAG - http://www-ver
 imag.imag.fr/Verimag-Seminars\,62.html?lang=en\nLocation/Vision: ENSIMAG A
 mphi E  - http://ensimag.grenoble-inp.fr/acces/\nTo unsubscribe\, reply to
  this mail with UNSUBSCRIBE in the subject\n= = = = = = = = = = = = = = = 
 = = = = = = = = =...
DTSTART:20180118T140000
DTEND:20180118T150000
DURATION:PT01H0M0S
LOCATION:ENSIMAG Amphi E
SUMMARY:David Monniaux - SPECTRE + MELTDOWN
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-36039uffTp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 15 January 2018 - Seminar Room\, gro
 und floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (B
 uilding IMAG)\n\nDogan Ulus\, Verimag / UGA\n\n\n« Filtrage par Motif Tem
 porisé: Théorie et Applications (Pattern Matching with Time: Theory and 
 Applications) » \n\nRésumé :\n\nLes systèmes dynamiques présentent de
 s comportements temporels qui peuvent être exprimés sous diverses formes
  séquentielles telles que des signaux\, des ondes\, des séries chronolog
 iques et des suites d’événements. Détecter des motifs sur de tels com
 portements temporels est une tâche fondamentale pour comprendre et évalu
 er ces...
DTSTART:20180115T140000
DTEND:20180115T170000
DURATION:PT03H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Dogan Ulus - Filtrage par Motif Temporisé: Théorie et Application
 s (Pattern Matching with Time: Theory and Applications)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3606Kfd9FI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 December 2017 - 206\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : 206\n\nMirco Giacobbe\, IST Austria\nhttp://pub.ist.ac.at/~mgiacob
 be/\n\n« Counterexample-guided Refinement of Template Polyhedra » \n\nAb
 stract:\n\nTemplate polyhedra generalize intervals and octagons to polyhed
 ra whose facets are orthogonal to a given set of arbitrary directions. The
 y offer a very powerful framework for the reachability analysis of hybrid 
 automata\, as an appropriate choice of directions allows an effective tuni
 ng between accuracy and precision. In this talk\, I will present a method 
 for the automatic discovery of directions that generalize and eliminate sp
 urious...
DTSTART:20171221T140000
DTEND:20171221T150000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Mirco Giacobbe - Counterexample-guided Refinement of Template Polyh
 edra
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3609sG11gg@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 11 December 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nAlexandre Maréchal\, Verimag\n\n
 \n« New Algorithmics for Polyhedral Calculus via Parametric Linear Progra
 mming » \n\nAbstract:\n\nThis thesis presents the design and implementati
 on of the Verified Polyhedra Library (VPL)\, a scalable library for polyhe
 dral calculus. It provides Coq-certified polyhedral operators that work on
  constraints-only representation. The previous version was inefficient on 
 crucial operations\, namely variable elimination and convex hull. In this 
 work\, I present major improvements that have been made in scalability\, m
 odularity and...
DTSTART:20171211T140000
DTEND:20171211T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Alexandre Maréchal - New Algorithmics for Polyhedral Calculus via 
 Parametric Linear Programming
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3611FRPVhG@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 11 December 2017 - Seminar Room\, gr
 ound floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (
 Building IMAG)\n\nDenis Becker\, Verimag / STMicroelectronics\n\n\n« Simu
 lation SystemC/TLM Parallèle de Composants Matériels Décrits pour la Sy
 nthèse de Haut Niveau (Parallel SystemC/TLM Simulation of Hardware Compon
 ents Described for High-Level Synthesis) » \n\nRésumé :\n\nLes système
 s sur puce sont constitués d’une partie matérielle (un circuit intégr
 é) et d’une partie logicielle (un programme) qui utilise les ressources
  matérielles de la puce. La conséquence de cela est que le logiciel d
 ’un système...
DTSTART:20171211T140000
DTEND:20171211T170000
DURATION:PT03H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Denis Becker - Simulation SystemC/TLM Parallèle de Composants Mat
 ériels Décrits pour la Synthèse de Haut Niveau (Parallel SystemC/TLM Si
 mulation of Hardware Components Described for High-Level Synthesis)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3614dFmARE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 December 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nDe Oliviera  Steven\, CEA-List/Verimag\n\n\n« Synthe
 sizing Invariants by Solving Solvable Loops » \n\nAbstract:\n\nThe comple
 xity of program verification is directly dependent of the ability of analy
 zers to soundly handle loops. One way to overapproximate loops is to provi
 de them inductive invariants\, summing up their behavior and often providi
 ng enough information to provers.  Unfortunately\, even in very simple loo
 ps like linear loops (i.e. loops composed of linear assignments only) ther
 e exist no...
DTSTART:20171207T140000
DTEND:20171207T160000
DURATION:PT02H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:De Oliviera  Steven - Synthesizing Invariants by Solving Solvable L
 oops
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-36169xvCx4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  1 December 2017 - Salle 206 IMAG\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n15:00 - Salle : Salle 206 IMAG\n\nReineke Jan\, Saarland University\nhtt
 p://embedded.cs.uni-saarland.de/reineke.php\n\n« On the Smoothness of Pag
 ing Algorithms » \n\nAbstract:\n\nWe study the smoothness of paging algor
 ithms. How much can the number of page faults increase due to a perturbati
 on of the request sequence? We call a paging algorithm smooth if the maxim
 al increase in page faults is proportional to the number of changes in the
  request sequence. We also introduce quantitative smoothness notions that 
 measure the smoothness of an algorithm.\nWe derive lower and upper bounds 
 on the...
DTSTART:20171201T150000
DTEND:20171201T160000
DURATION:PT01H0M0S
LOCATION:Salle 206 IMAG
SUMMARY:Reineke Jan - On the Smoothness of Paging Algorithms
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3619kuGDEj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  1 December 2017 - Amphi H\, Ensimag
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:00 - Salle : Amphi H\, Ensimag\n\nHamza RIHANI\, Univ. Grenoble Alpe
 s / Verimag\n\n\n« Analyse temporelle des systèmes temps-réels sur arch
 itectures pluri-cœurs avec application à un processeur industriel (Many-
 Core Timing Analysis of Real-Time Systems and its Application to an Indust
 rial Processor) » \n\nRésumé :\n\nLa prédictibilité est un aspect imp
 ortant des systèmes temps-réel critiques. Garantir la fonctionnalité de
  ces systèmes\npasse par la prise en compte des contraintes temporelles. 
  Les architectures mono-cœurs traditionnelles ne sont plus\nsuffisantes p
 our...
DTSTART:20171201T100000
DTEND:20171201T120000
DURATION:PT02H0M0S
LOCATION:Amphi H\, Ensimag
SUMMARY:Hamza RIHANI - Analyse temporelle des systèmes temps-réels sur ar
 chitectures pluri-cœurs avec application à un processeur industriel (Man
 y-Core Timing Analysis of Real-Time Systems and its Application to an Indu
 strial Processor)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3622DaS8FH@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 November 2017 - Salle de sémi
 naire (rez-de-chaussée)\n= = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = =\n14:00 - Salle : Salle de séminaire (rez-de-cha
 ussée)\n\nJoseph Sifakis\, VERIMAG\nhttp://www-verimag.imag.fr/PEOPLE/Jos
 eph.Sifakis/\n\n« How Much Hard is System Design? » \n\nAbstract:\n\nThe
  ICT revolution is dominated by the IoT vision which promises increasingly
  interconnected smart objects providing autonomous services for the optima
 l management of resources and enhanced quality of life. These include smar
 t grids\, smart transport systems\, smart health care services\, automated
  banking services\, smart factories\, etc. Their coordination will be achi
 eved using a...
DTSTART:20171123T140000
DTEND:20171123T160000
DURATION:PT02H0M0S
LOCATION:Salle de séminaire (rez-de-chaussée)
SUMMARY:Joseph Sifakis - How Much Hard is System Design?
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3624gklrUN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 20 October 2017 - Ensimag Amphi H\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 10:15 - Salle : Ensimag Amphi H\n\nFranck De Goer\, LIG/VASCO et VERIMAG/P
 ACSS\n\n\n« Rétro-ingénierie de programmes binaires en une exécution -
  une analyse dynamique légère basée au niveau des fonctions (Reverse En
 gineering binary code in one execution - A lightweight function based dyna
 mic execution.) » \n\nRésumé :\n\nDans cette thèse\, nous proposons un
 e nouvelle approche d’analyse dynamique de programmes binaires. Ce trava
 il se place dans un contexte de rétro-conception de binaires avec des mot
 ivations liées à la sécurité : compréhension de logiciels malveillant
 s\,...
DTSTART:20171020T101500
DTEND:20171020T121500
DURATION:PT02H0M0S
LOCATION:Ensimag Amphi H
SUMMARY:Franck De Goer - Rétro-ingénierie de programmes binaires en une e
 xécution - une analyse dynamique légère basée au niveau des fonctions 
 (Reverse Engineering binary code in one execution - A lightweight function
  based dynamic execution.)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3627his7Uj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 October 2017 - Seminar Room 2\
 , ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n10:30 - Salle : Seminar Room 2\, ground f
 loor (Building IMAG)\n\n   \,  \n\n\n« COQ en STOCK » \n\nRésumé :\n\n
 Cette journée est ouverte à tous ceux et celles qui souhaitent en savoir
  plus sur l’assistant de preuve COQ. Les exposés sont à destination d
 ’un public novice en COQ et mettent l’accent sur les motivations pour 
 utiliser COQ\, l’approche utilisée\, plus que sur les détails techniqu
 es de la conduite des preuves. (Le premier exposé de la journée commence
 ra par une brève introduction à Coq.)\n\nL’objectif est qu’à traver
 s 5 retours...
DTSTART:20171019T103000
DTEND:20171019T170000
DURATION:PT06H30M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:    - COQ en STOCK
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3629ZlhUDW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 10 October 2017 - Seminar Room 1\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n10:30 - Salle : Seminar Room 1\, ground fl
 oor (Building IMAG)\n\nFrits Vaandrager\, Radboud University\, Netherlands
 \nhttp://www.cs.ru.nl/~fvaan/\n\n« Learning Mealy Machines with Timers 
 » \n\nAbstract:\n\n(joint work with Bengt Jonsson)\n\nActive automata lea
 rning is emerging as a highly effective bug finding technique\, with appli
 cations in areas such as banking cards\, network protocols and legacy soft
 ware. Timing often plays a crucial role in these applications\, but cannot
  be handled adequately by existing algorithms. Even though there has been 
 significant...
DTSTART:20171010T103000
DTEND:20171010T123000
DURATION:PT02H0M0S
LOCATION:Seminar Room 1\, ground floor (Building IMAG)
SUMMARY:Frits Vaandrager - Learning Mealy Machines with Timers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3632TwlVcI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 10 October 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nIrini Eleftheria Mens\, Verimag\, 
 Université Grenoble Alpes\n\n\n« Learning Regular Languages over Large A
 lphabets » \n\nAbstract:\n\nLearning regular languages is a branch of mac
 hine learning\, which has been proved useful in many areas\, including art
 ificial intelligence\, neural networks\, data mining\, verification\, etc.
  On the other hand\, interest in languages defined over large and infinite
  alphabets has increased in recent years. Although many theories and prope
 rties generalize well from the finite case\, learning such languages is no
 t an easy task. As...
DTSTART:20171010T140000
DTEND:20171010T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Irini Eleftheria Mens - Learning Regular Languages over Large Alpha
 bets
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3634aEf1wv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 September 2017 - 206 \n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 
 - Salle : 206 \n\nAdrien Guatto\, Inria\nhttp://www.di.ens.fr/~guatto/\n\n
 « A Functional Language with Time Warps » \n\nAbstract:\n\nSynchronous d
 ataflow languages in the vein of Lustre combine a high-level programming m
 odel with strong safety guarantees enforced at compile time. They are buil
 t on the idea of logical time: programs manipulate infinite streams of dat
 a which unfold progressively as time passes. Whether a stream unfolds at a
 ny given time step is determined by a type-like formula\, its _clock_. Clo
 cks are an essential ingredient of synchronous compilation\; for instance\
 , they are...
DTSTART:20170928T140000
DTEND:20170928T150000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Adrien Guatto - A Functional Language with Time Warps
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3637VTuuEn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 September 2017 - Room 106\, 1s
 t floor\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n14:00 - Salle : Room 106\, 1st floor\n\nJoël Goossens\, Univers
 ité libre de Bruxelles\nhttp://parts.ulb.ac.be/\n\n« Feasibility & Simul
 ation Intervals of Schedules for Recurrent Real-Time Tasks » \n\nAbstract
 :\n\nWe will consider in this talk the design of real-time embedded system
 s\, in particular we will focus the study on the _scheduler_ for real-time
  recurrent (mainly periodic) activities. We will introduce the notion of f
 easibility and simulation intervals to prove the system feasibility and to
  have a safe time-window for its analysis\, respectively.\n\nWe will start
  the study by...
DTSTART:20170914T140000
DTEND:20170914T160000
DURATION:PT02H0M0S
LOCATION:Room 106\, 1st floor
SUMMARY:Joël Goossens - Feasibility & Simulation Intervals of Schedules fo
 r Recurrent Real-Time Tasks
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3639ZOuUtF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  1 September 2017 - Auditorium (IMAG
 )\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n09:30 - Salle : Auditorium (IMAG)\n\nAnaïs Durand\, Verimag\nhttp://w
 ww-verimag.imag.fr/~adurand/\n\n« Algorithmes distribués efficaces adapt
 és à un contexte incertain (Efficient Distributed Algorithms Suited for 
 Uncertain Context) » \n\nRésumé :\n\nLes systèmes distribués sont de 
 plus en plus grands et complexes\, alors que leur utilisation s'étend à 
 de nombreux domaines (par exemple\, les communications\, la domotique\, la
  surveillance\, le ``cloud''). Par conséquent\, les contextes d'exécutio
 n des systèmes distribués sont très divers. Dans cette thèse\, nous no
 us focalisons...
DTSTART:20170901T093000
DTEND:20170901T113000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Anaïs Durand - Algorithmes distribués efficaces adaptés à un co
 ntexte incertain (Efficient Distributed Algorithms Suited for Uncertain Co
 ntext)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3642rvevld@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 August 2017 - Seminar Room\, g
 round floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n10:15 - Salle : Seminar Room\, ground floor 
 (Building IMAG)\n\n \, \n\n\n« Workshop ESTATE/VERIMAG 'Distributed Algor
 ithms' » \n\nAbstract:\n\nIn the context of the ANR project ESTATE\, we o
 rganize a workshop on distributed algorithms.\n\n\nProgramme\n\n\nTalks AN
 R ESTATE\n\n\n10:15-11h00 : Preuves de terminaison par variants\, Pierre C
 astéran\n\n\n11:00-11h30 : Composition certifiée d'algorithmes autostabi
 lisants silencieux\, Pierre Corbineau\n\n\n11:30 12:00 : Asynchronous appr
 oach in the plane: A deterministic polynomial algorithm\, Sébastien Bouch
 ard\n\n\n12:15-13:30 Repas...
DTSTART:20170831T101500
DTEND:20170831T170000
DURATION:PT06H45M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:  - Workshop ESTATE/VERIMAG 'Distributed Algorithms'
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3644389AW9@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 12 July 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nManuel Barragan\, TIMA\nhttp://tim
 a.imag.fr/tima/fr/timalaboratory/persopage_id1609.html\n\n« Feature selec
 tion and design for machine learning-based test of analog\, mixed-signal a
 nd RF circuits » \n\nAbstract:\n\nThe test of analog\, mixed-signal and R
 F (AMS-RF) blocks embedded in a complex system has become a challenging\, 
 costly and time consuming task that has been identified as one of the main
  bottlenecks in the production of current and future integrated systems. M
 achine learning-based test is a promising strategy for overcoming these is
 sues....
DTSTART:20170712T140000
DTEND:20170712T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Manuel Barragan - Feature selection and design for machine learning
 -based test of analog\, mixed-signal and RF circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3647UHrbWB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 26 June 2017 - Auditorium (IMAG)\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Auditorium (IMAG)\n\nHosein Nazarpour\, Verimag\nhttp://www
 -verimag.imag.fr/~nazarpou/\n\n« Surveillance de systèmes à composants 
 multi-threads et distribués (Monitoring Multi-Threaded and Distributed (C
 omponent-Based) Systems) » \n\nRésumé :\n\nLa conception à base de com
 posants est le processus qui permet à partir d’exigences et un ensemble
  de composants prédéfinis d’aboutir à un système respectant les exig
 ences. Les composants sont des blocs de construction encapsulant du compor
 tement. Ils peuvent être composés afin de former des composants composit
 es. Leur...
DTSTART:20170626T140000
DTEND:20170626T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Hosein Nazarpour - Surveillance de systèmes à composants multi-th
 reads et distribués (Monitoring Multi-Threaded and Distributed (Component
 -Based) Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3649UWIvZV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 June 2017 - Seminar Room\, gro
 und floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (B
 uilding IMAG)\n\nAssalé ADJE\, Université de Perpignan\n\n\n« Itératio
 ns sur les politiques pour la vérification de systèmes dynamiques en tem
 ps discret. » \n\nRésumé :\n\nDans cet exposé\, nous nous intéressons
  à la vérification formelle de propriétés numériques sur des système
 s dynamiques en temps discret par\nanalyse statique. Pour valider ces prop
 riétés et garantir la sureté de la vérification\,  nous cherchons à c
 alculer une sur-approximation précise des\nétats atteignables. Ce calcul
  est...
DTSTART:20170608T140000
DTEND:20170608T160000
DURATION:PT02H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Assalé ADJE - Itérations sur les politiques pour la vérification
  de systèmes dynamiques en temps discret.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3652Sxkumz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  6 June 2017 - Amphi E Ensimag 681\
 , rue de la passerelle - Campus\n= = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = =\n14:00 - Salle : Amphi E Ensimag 681\, ru
 e de la passerelle - Campus\n\nLaurent Lemke\, UGA\nhttps://www.linkedin.c
 om/in/laurentlemke/\n\n« Modèles partagés et infrastructure ouverte pou
 r l’internet des objets de la ville intelligente » \n\nRésumé :\n\nLe
 s villes contemporaines font face à de nombreux enjeux : énergétiques\,
  écolo-\ngiques\, démographiques ou encore économiques. Pour y répondr
 e\, des moyens tech-\nnologiques sont mis en place dans les villes via l
 ’utilisation de capteurs et d’action-\nneurs. Ces villes sont dites...
DTSTART:20170606T140000
DTEND:20170606T160000
DURATION:PT02H0M0S
LOCATION:Amphi E Ensimag 681\, rue de la passerelle - Campus
SUMMARY:Laurent Lemke - Modèles partagés et infrastructure ouverte pour l
 ’internet des objets de la ville intelligente
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-36546lhhGL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 10 May 2017 - Auditorium (IMAG)\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n09:00 - Salle : Auditorium (IMAG)\n\nYuliia Romenska\, Univ. Grenoble Al
 pes\n\n\n« Composants abstraits pour la vérification fonctionnelle des s
 ystèmes sur puce (High-Level Component-Based Models for Functional Verifi
 cation of Systems-on-a-Chip) » \n\nRésumé :\n\nLes travaux présentés 
 dans cette thèse portent sur la modélisation\, la\nspécification et la 
 vérification des modèles des Systèmes sur Puce\n(SoCs) au niveau d’ab
 straction transactionnel et à un niveau\nd’abstraction plus élevé. Le
 s SoCs sont hétérogènes: ils comprennent\ndes composants matériels et 
 des...
DTSTART:20170510T090000
DTEND:20170510T110000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Yuliia Romenska - Composants abstraits pour la vérification foncti
 onnelle des systèmes sur puce (High-Level Component-Based Models for Func
 tional Verification of Systems-on-a-Chip)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3657vJvGtn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 20 April 2017 - Room 206 (Buildin
 g IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n14:00 - Salle : Room 206 (Building IMAG)\n\nVincent Penelle\, Un
 iversite de Varsovie\nhttp://igm.univ-mlv.fr/~penelle/?l=en\n\n« On the c
 ontext-freeness problem for vector addition systems. (candidat MCF) » \n
 \nAbstract:\n\nPetri nets\, or equivalently vector addition systems (VAS)\
 , are widely recognized as a central model for concurrent systems. Many in
 teresting properties are decidable for this class\, such as boundedness\, 
 reachability\, regularity\, as well as context-freeness\, which is the foc
 us of this talk. The context-freeness problem asks whether the trace langu
 age of a given...
DTSTART:20170420T140000
DTEND:20170420T160000
DURATION:PT02H0M0S
LOCATION:Room 206 (Building IMAG)
SUMMARY:Vincent Penelle - On the context-freeness problem for vector additi
 on systems. (candidat MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3659t8FUxZ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 19 April 2017 - 206\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : 206\n\nLiliana Andrade\, Verimag\nhttp://www-verimag.imag.fr/~andrad
 e/fr/index.html\n\n« High Level Modeling and Simulation of Heterogeneous 
 Systems: A focus on the SystemC-AMS Synchronization Problem » \n\nAbstrac
 t:\n\n\nModeling and simulation of multi-disciplinary systems is currently
  an increasingly complex problem. These systems tend to be heterogeneous i
 n the sense that they require the integration of components described by m
 eans of different physical/engineering disciplines (electrical\, thermal\,
  mechanical\, …). To address this problem\, designers require tools to d
 escribe the...
DTSTART:20170419T140000
DTEND:20170419T153000
DURATION:PT01H30M0S
LOCATION:206
SUMMARY:Liliana Andrade - High Level Modeling and Simulation of Heterogeneo
 us Systems: A focus on the SystemC-AMS Synchronization Problem
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3662Xtprru@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 11 April 2017 - 206\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n11:00 - Sall
 e : 206\n\nIulia Dragomir\, Verimag\nhttp://www-verimag.imag.fr/~dragomir/
 \n\n« Compositional Design and Analysis of Embedded Systems » \n\nAbstra
 ct:\n\nThe development of error-free safety critical systems is a challeng
 ing task. Several key factors need to be considered: (1) what is the best 
 method for designing large and complex systems with minimal effort and cos
 ts\, (2) how to guarantee that the designed system is correct with respect
  to its requirements and (3) how to adapt any theoretical solution to the 
 industrial practice of system design with high-level modeling languages su
 ch as...
DTSTART:20170411T110000
DTEND:20170411T123000
DURATION:PT01H30M0S
LOCATION:206
SUMMARY:Iulia Dragomir - Compositional Design and Analysis of Embedded Syst
 ems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3665nMxoV2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 March 2017 - IMAG 206\n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 
 - Salle : IMAG 206\n\nHelmut Seidl\, Technische Universitaet Muenchen\nhtt
 p://www2.in.tum.de/hp/Main?nid=23\n\n« Enforcing Termination of Interproc
 edural Analysis » \n\nAbstract:\n\nInterprocedural analysis by means of p
 artial tabulation of summary\nfunctions may not terminate when the same pr
 ocedure is analyzed for\ninfinitely many abstract calling contexts or when
  the abstract domain\nhas infinite strictly ascending chains.\n\nAs a reme
 dy\, we present a novel local solver for general abstract\nequation system
 s\, be they monotonic or not\, and prove that this solver\nfails to termin
 ate only...
DTSTART:20170330T140000
DTEND:20170330T150000
DURATION:PT01H0M0S
LOCATION:IMAG 206
SUMMARY:Helmut Seidl - Enforcing Termination of Interprocedural Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3667gb5vTK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 March 2017 - IMAG 206\n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 
 - Salle : IMAG 206\n\nDirk Beyer\, Ludwig-Maximilians-Universitaet Muenche
 n\nhttps://www.sosy-lab.org/~dbeyer/\n\n« Correctness Witnesses: Exchangi
 ng Verification Results between Verifiers » \n\nAbstract:\n\nStandard ver
 ification tools provide a counterexample to witness a specification violat
 ion\,\nand\, since a few years\, such a witness can be validated by an ind
 ependent validator\nusing an exchangeable witness format.\nThis way\, info
 rmation about the violation can be shared across verification tools\nand t
 he user can use standard tools to visualize and explore witnesses.\nThis t
 echnique is...
DTSTART:20170330T100000
DTEND:20170330T120000
DURATION:PT02H0M0S
LOCATION:IMAG 206
SUMMARY:Dirk Beyer - Correctness Witnesses: Exchanging Verification Results
  between Verifiers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3670SbeHMp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 29 March 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:30 - Salle : Auditorium (IMAG)\n\nJosselin FEIST\, VERIMAG / PACSS\n
 \n\n« Finding the Needle in the Heap: Combining Binary Analysis Technique
 s to Trigger Use-After-Free » \n\nAbstract:\n\nSecurity is becoming a maj
 or concern in software development\, both for\nsoftware editors\, end-user
 s\, and government agencies. A typical problem is \nvulnerability detectio
 n\, which consists in finding in a code bugs able to \nlet an attacker gai
 n some unforeseen privileges like reading or writing\nsensible data\, or e
 ven hijacking the program execution. \n\nThis thesis proposes a practical 
 approach to...
DTSTART:20170329T103000
DTEND:20170329T123000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Josselin FEIST - Finding the Needle in the Heap: Combining Binary A
 nalysis Techniques to Trigger Use-After-Free
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3672VihpF6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 29 March 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nEgor Karpenkov\, VERIMAG\nhttp://m
 etaworld.me\n\n« Finding Inductive Invariants using SMT Solving and Conve
 x Optimization » \n\nAbstract:\n\nStatic analysis concerns itself with de
 riving program properties which hold\nuniversally for all program executio
 ns.\nSuch properties are used for proving program properties (e.g. there n
 ever\noccurs an overflow or other runtime error regardless of a particular
  execution) and are almost\ninvariably established using inductive invaria
 nts: properties which hold\nfor the initial state and imply themselves und
 er the...
DTSTART:20170329T140000
DTEND:20170329T170000
DURATION:PT03H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Egor Karpenkov - Finding Inductive Invariants using SMT Solving and
  Convex Optimization
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3675c7TAf3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 28 March 2017 - IMAG 206\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : IMAG 206\n\nNikolaj Bjorner\, Microsoft Research\nhttps://www.mic
 rosoft.com/en-us/research/people/nbjorner/\n\n« Network Verification for 
 Microsoft Azure » \n\nAbstract:\n\nModern large-scale cloud infrastructur
 es are inherently complex to \nconfigure and deploy: Network access restri
 ctions are enforced at \nmultiple points\, forwarding and filtering polici
 es are programmed or \nconfigured in various formats targeting devices tha
 t span different \nvendors and generations. On the other hand\, well-desig
 ned \ninfrastructures\, such as Microsoft Azure\, are based on a set of \n
 transparent...
DTSTART:20170328T140000
DTEND:20170328T150000
DURATION:PT01H0M0S
LOCATION:IMAG 206
SUMMARY:Nikolaj Bjorner - Network Verification for Microsoft Azure
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3677IkG4Bn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:30 - Sal
 le : 206\n\nRomaric Ludinard\, ENSAI\nhttp://www.ensai.fr/enseignant/alias
 /romaric-ludinard.html\n\n« Bitcoin\, la blockchain et le problème de la
  double dépense : état des lieux et analyse de propositions d'améliorat
 ions (Bitcoin\, its blockchain and the double spending problem : Bitcoin i
 n a nutshell and safety analysis of recent improvement proposals) » \n\nR
 ésumé :\n\nLe système Bitcoin permet les transferts monétaires entre u
 tilisateurs\ndistants sans recours à un tiers de confiance. Cette possibi
 lité est\nofferte au travers de la blockchain\, une structure de donnée
 \ndistribuée...
DTSTART:20170323T153000
DTEND:20170323T163000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Romaric Ludinard - Bitcoin\, la blockchain et le problème de la do
 uble dépense : état des lieux et analyse de propositions d'amélioration
 s (Bitcoin\, its blockchain and the double spending problem : Bitcoin in a
  nutshell and safety analysis of recent improvement proposals)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3680K7Bh2f@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : 206\n\nHugues Evrard\, Imperial College\, London\nhttp://hevrard.org/
 \n\n« Automated generation of a distributed implementation from a formal 
 model of concurrent processes interacting via multiway rendezvous. » \n\n
 Abstract:\n\nFormal verification often targets the model of a system\, alt
 hough the\nactual implementation may still be written by hand\, in which c
 ase even a\nsmall semantics difference between the model and its implement
 ation can\nruin the verification effort. Such risky discrepancies are avoi
 ded by\nusing automatic code generator from models.\n\nIn this talk\, we f
 ocus on the...
DTSTART:20170323T140000
DTEND:20170323T153000
DURATION:PT01H30M0S
LOCATION:206
SUMMARY:Hugues Evrard - Automated generation of a distributed implementatio
 n from a formal model of concurrent processes interacting via multiway ren
 dezvous.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3682d7fWZD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : 206\n\nManuel Selva\, Inria\nhttps://manuelselva.github.io/\n\n« Ex
 écution efficace sur machine multi-cœur (Efficient execution on multi-co
 re systems) » \n\nRésumé :\n\nAfin d'exploiter pleinement les machines 
 multi-cœur\, trois\nproblématiques principales doivent être adressées:
 \n- trouver où et comment découper les applications\n- équilibrer la ch
 arge de travail sur les ressources de la machine\n- s'assurer que les perf
 ormances sont à la hauteur des possibilités du\nmatériel\n\nCet expos
 é sera composé de deux parties. Je présenterai dans un premier\ntemps m
 es travaux...
DTSTART:20170316T150000
DTEND:20170316T160000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Manuel Selva - Exécution efficace sur machine multi-cœur (Efficie
 nt execution on multi-core systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3684m2gUv6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:30 - Sal
 le : 206\n\nLionel Rieg\, Yale university\, Flint group \nhttp://perso.ens
 -lyon.fr/lionel.rieg/\n\n« Formal Proofs of Safety in Coq: Mobile Robot N
 etworks and Lustre Compilation » \n\nAbstract:\n\nIn the first part\, I w
 ill look into the verified compilation of the synchronous language Lustre.
  The objective of this work is to build a proven compiler from Lustre to C
  and connect it to CompCert\, a proven compiler from C to assembly\, to ha
 ve a fully verified compilation chain toward assembly code. Although the c
 ompiler is straightforward to write\, the difficulties are in the proof of
  correctness...
DTSTART:20170309T153000
DTEND:20170309T163000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Lionel Rieg - Formal Proofs of Safety in Coq: Mobile Robot Networks
  and Lustre Compilation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-36874hstt5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : 206\n\nArthur Milchior\, Université Paris Diderot IRIF \nhttps://www
 .irif.fr/users/milchior/index\n\n« Deterministic  Automaton and logically
  definable sets of numbers. » \n\nAbstract:\n\nFor a fixed base b\, any i
 nteger can be encoded as a finite word of \nalphabet of digits.  In dimens
 ion d>0\, a vector of d integers is encoded \nas a word of alphabet of vec
 tor of d digits. A set of vector of integers \nis thus encoded as a langua
 ge whose alphabet is the set of vector of \ndigits. Thus\, an automaton wh
 ose alphabet is the set of vector of digits \nrecognizes a set of integers
 . Similarly\,...
DTSTART:20170309T140000
DTEND:20170309T150000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Arthur Milchior - Deterministic  Automaton and logically definable 
 sets of numbers.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3690TVb8RX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n16:45 - Sal
 le : 206\n\nPaulin Fournier\, LABRI\, Bordeaux\n\n\n« Verification of inf
 inite probabilistic systems » \n\nAbstract:\n\nIn a first part\, I'll giv
 e an overview of my phd thesis results on parameterized verification of ne
 tworks composed of many identical processes. In those networks the number 
 of processes is a parameter\, and the processes are modeled by finite prob
 abilistic state machines which interact with messages.\nIn particular I'll
  present\, with more details\, the decidability of the parameterized reach
 ability problem in selective networks\, where the messages only reach a su
 bset of the...
DTSTART:20170302T164500
DTEND:20170302T181500
DURATION:PT01H30M0S
LOCATION:206
SUMMARY:Paulin Fournier - Verification of infinite probabilistic systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3692fUVuIR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:30 - Sal
 le : 206\n\nNicolas Basset\, Université Libre de Bruxelles\nhttps://www.i
 rif.fr/users/nbasset/index\n\n« Uniform Sampling for Timed Automata with 
 Application to Language Inclusion Measurement » \n\nAbstract:\n\n(joint w
 ork with B. Barbot\, B. Beunardeau and M. Kwiatkowska)\n\nIn this talk\, I
  will present Monte Carlo model checking techniques to evaluate quantitati
 ve properties of timed languages. Our approach is based on uniform random 
 sampling of behaviours\, the uniformity being defined with respect to volu
 me measure of timed languages previously studied by Asarin\, Degorre and m
 e. We...
DTSTART:20170302T153000
DTEND:20170302T163000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Nicolas Basset - Uniform Sampling for Timed Automata with Applicati
 on to Language Inclusion Measurement
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-36955cLc7C@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 March 2017 - Seminar Room 1\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room 1\, ground flo
 or (Building IMAG)\n\nLoïc Correnson\, CEA - Equipe LIST\nhttps://frama-c
 .com/\n\n« « De Frama-C à Lustre » (« From Frama-C to Lustre ») » 
 \n\nRésumé :\n\nLa plateforme Frama-C permet de prouver des propriétés
  fonctionnelles et des propriétés de robustesse sur des fonctions C\, gr
 âce au langage de spécifications ACSL\, et grâce aux plugins WP et EVA 
 déjà bien rodés.\n\nCependant\, ACSL n'est pas adapté à la spécifica
 tion de propriétés temporelles des programmes réactifs synchrones écri
 ts en C. Au...
DTSTART:20170302T140000
DTEND:20170302T160000
DURATION:PT02H0M0S
LOCATION:Seminar Room 1\, ground floor (Building IMAG)
SUMMARY:Loïc Correnson - « De Frama-C à Lustre » (« From Frama-C to Lu
 stre »)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3697GiXgum@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 February 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n10:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nNaor Seffi\, Technion Haifa \nhttp://www.cs.technion.
 ac.il/~naor/\n\n« Multi-label Classification with Pairwise Relations » 
 \n\nAbstract:\n\nMotivated by applications in multi-label learning\, we in
 troduce the metric multi-labeling problem. The objective here is to classi
 fy objects by labels while optimizing a linear cost function of both assig
 nment costs and separation costs\, which are deduced from pairwise relatio
 ns between objects. Each object can be classified by multiple labels\, whi
 ch may have...
DTSTART:20170216T100000
DTEND:20170216T110000
DURATION:PT01H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Naor Seffi - Multi-label Classification with Pairwise Relations
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3700nDrUrl@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 16 February 2017 - Seminar Room\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor
  (Building IMAG)\n\nAbhinav Srivastav\, Verimag\n\n\n« Trade-offs in Reso
 urce Allocation Problems  » \n\nAbstract:\n\nThe thesis is focused on the
  study of trade-offs in resource allocation problems.  The first part of t
 his thesis deals with the study of heuristic based approaches for the appr
 oximation of Pareto fronts. We propose a new stochastic local search algor
 ithm for solving multi-objective combinatorial optimization problems. We e
 mbed our technique into a genetic framework and show that this method impr
 oves upon...
DTSTART:20170216T140000
DTEND:20170216T144500
DURATION:PT0H45M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Abhinav Srivastav - Trade-offs in Resource Allocation Problems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37020W8Jsh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 February 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n11:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nMastrolilli Monaldo\, IDSIA Lugano \nhttp://people.id
 sia.ch/~monaldo/\n\n« High Degree Sum of Squares Proofs/Hierarchy for 0/1
  Problems » \n\nAbstract:\n\nThe Lasserre/Sum-of-Squares (SOS) hierarchy 
 is a systematic procedure for constructing a sequence of increasingly tigh
 t semidefinite relaxations. It is known that the hierarchy converges to th
 e 0/1 polytope in n levels and captures the convex relaxations used in the
  best available approximation algorithms for a wide variety of optimizatio
 n...
DTSTART:20170216T110000
DTEND:20170216T120000
DURATION:PT01H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Mastrolilli Monaldo - High Degree Sum of Squares Proofs/Hierarchy f
 or 0/1 Problems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3705Oe7MuI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 February 2017 - Salle 206\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14
 :00 - Salle : Salle 206\n\n    \,  \n\n\n« Second Year PhD Students Semin
 ars - week 2/2 » \n\nAbstract:\n\n* 14:00-14:40 Rim El-Ballouli (Team RSD
 ): Modeling and Analysis of Systems with Dynamic Architectures\n\nIn gener
 al\, architecture is essential for mastering the complexity of computer sy
 stems and to facilitate their analysis and evolution. Architecture allows 
 the separation between detailed behavior of components and their overall c
 oordination.  Although many formalisms were already proposed to describe a
 nd reason about dynamic architectures\, they are facing serious challenges
 :\n-...
DTSTART:20170209T140000
DTEND:20170209T170000
DURATION:PT03H0M0S
LOCATION:Salle 206
SUMMARY:     - Second Year PhD Students Seminars - week 2/2
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37082AjgBz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 February 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\n   \,  \nhttp:// \n\n« Second Year PhD Students Semi
 nars - week 1/2 » \n\nAbstract:\n\n* 14:00-14:40 Braham Lotfi Mediouni (T
 eam RSD): Rigorous System Design and Performance Evaluation\n\nIn embedded
  systems\, designing functional models has become very popular thanks to t
 he powerful verification techniques that have been developed these years. 
 But it is still very difficult to build models gathering both functional a
 nd non-functional techniques. Some techniques exist in which authors propo
 se manual...
DTSTART:20170202T140000
DTEND:20170202T162000
DURATION:PT02H20M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:    - Second Year PhD Students Seminars - week 1/2
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3710j759nu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  5 December 2016 - Auditorium (IMAG
 ) \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n17:00 - Salle : Auditorium (IMAG) \n\nPaul FEAUTRIER\, LIP\, Ecole No
 rmale Supérieure de Lyon \nhttp://perso.ens-lyon.fr/paul.feautrier \n\n
 « New Architectures\, New Compilation Problems » \n\nAbstract:\n\nIn the
  past\, performance improvements were due mostly to a steady increase in p
 rocessors clock frequency. Nowadays\, due to physical problems realated to
  power dissipation\, clock frequencies are limited to about 3Ghz\, and bet
 ter performance can only be found in more parallelism. Parallel architectu
 res come in many varieties -- multicores\, vector processors and GPU\, FPG
 As and ASICs -- and...
DTSTART:20161205T170000
DTEND:20161205T183000
DURATION:PT01H30M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Paul FEAUTRIER - New Architectures\, New Compilation Problems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3712OTepSd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 November 2016 - Salle 106\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14
 :30 - Salle : Salle 106\n\nRobin David\, CEA LIST\n\n\n« Formal Approache
 s for Automatic Deobfuscation and Reverse-engineering of Protected Codes 
 » \n\nAbstract:\n\nThis work has been presented à BlackHat Europe 2016: 
 https://www.blackhat.com/eu-16/briefings.html#code-deobfuscation-intertwin
 ing-dynamic-static-and-symbolic-approaches\n\n \n\nMalware analysis is a g
 rowing research field due to the criticity and variety of assets\ntargeted
  as well as the increasing implied costs. These softwares frequently use e
 vasion\ntricks aiming at hindering detection and analysis techniques. Amon
 g these\,...
DTSTART:20161117T143000
DTEND:20161117T153000
DURATION:PT01H0M0S
LOCATION:Salle 106
SUMMARY:Robin David - Formal Approaches for Automatic Deobfuscation and Rev
 erse-engineering of Protected Codes
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3715Vd0nFL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  7 November 2016 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nNajah BEN SAID\, Verimag\, Grenobl
 e Alpes University\nhttp://www-verimag.imag.fr/~bensaid/\n\n« Sécurité 
 de Flux d'Information dans les Modèles à Base de Composant: De la Vérif
 ication à l'Implementation (Information Flow Security in Component Based 
 Models: From Verification to Implementation) » \n\nRésumé :\n\nIl est r
 econnu que garantir une sécurité de bout-en-bout pour les systèmes dist
 ribués est un problème très complexe. En effet\, la communication bas n
 iveau entre les différentes parties du programme demande l'implémentatio
 n d'un...
DTSTART:20161107T140000
DTEND:20161107T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Najah BEN SAID - Sécurité de Flux d'Information dans les Modèles
  à Base de Composant: De la Vérification à l'Implementation (Informatio
 n Flow Security in Component Based Models: From Verification to Implementa
 tion)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3718nIHrej@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  4 November 2016 - Souha Ben Rayana
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Souha Ben Rayana\n\nSouha Ben Rayana\, Verimag\, Grenob
 le Alpes University\n\n\n« Vérification compositionnelle des systèmes t
 emps-réels à base de compsants et applications. (Compositional Verificat
 ion of Component-Based Real-time Systems and Applications.) » \n\nRésum
 é :\n\nDans le cadre de cette thèse\, on s'intéresse à  la vérificati
 on formelle des propriétés de sûreté pour les systèmes temps-réels 
 à base de composants. \nLe but est de proposer une alternative aux techni
 ques d’exploration où le produit de tous les composants d’un système
  donné est...
DTSTART:20161104T140000
DTEND:20161104T170000
DURATION:PT03H0M0S
LOCATION:Souha Ben Rayana
SUMMARY:Souha Ben Rayana - Vérification compositionnelle des systèmes tem
 ps-réels à base de compsants et applications. (Compositional Verificatio
 n of Component-Based Real-time Systems and Applications.)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3720MHUGoo@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  2 November 2016 - ROOM 206\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14
 :00 - Salle : ROOM 206\n\nNikos Gorogiannis\, University of Middlesex\nhtt
 p://ngorogiannis.bitbucket.org/\n\n« Biabduction (and Related Problems) i
 n Array Separation Logic » \n\nAbstract:\n\nWe investigate Array Separati
 on Logic\, a variant of symbolic-heap separation logic in which the primar
 y data structures are not pointers or lists but arrays.  This logic can be
  used for proving memory safety for array-manipulating imperative programs
 .\n\nWe focus on the biabduction problem for this logic\, which has been e
 stablished as the key to automatic specification inference at the industri
 al scale in...
DTSTART:20161102T140000
DTEND:20161102T150000
DURATION:PT01H0M0S
LOCATION:ROOM 206
SUMMARY:Nikos Gorogiannis - Biabduction (and Related Problems) in Array Sep
 aration Logic
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3723WKSVpu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 28 October 2016 - VERIMAG (Room 206
 \, 2nd floor)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n10:00 - Salle : VERIMAG (Room 206\, 2nd floor)\n\nJ. Espar
 za\, A. Bouajjani\,  and D. Nickovic\, TU Munich\, IRIF\, Austrian IT\n\n
 \n« Verification: Theory and Practice  » \n\nAbstract:\n\n      \n\n10:0
 0 Javier Esparza\, Technical University of Munich\, Germany\n\nLimit-Deter
 ministic Automata for Probabilistic Model Checking\n\nLimit-deterministic 
 Büchi automata can replace deterministic Rabin automata in probabilistic 
 model checking algorithms\, and can be significantly smaller. We present a
  direct construction from an LTL formula to a limit-deterministic Büchi a
 utomaton. Our...
DTSTART:20161028T100000
DTEND:20161028T120000
DURATION:PT02H0M0S
LOCATION:VERIMAG (Room 206\, 2nd floor)
SUMMARY:J. Esparza\, A. Bouajjani\,  and D. Nickovic - Verification: Theory
  and Practice
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3725Ulig1R@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 October 2016 - Seminar Room\, gro
 und floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n15:00 - Salle : Seminar Room\, ground floor (B
 uilding IMAG)\n\nThomas FERRERE\, Verimag\nhttp://www-verimag.imag.fr/~fer
 rere/\n\n« Assertion and Measurements for Mixed-Signal Simulation » \n\n
 Abstract:\n\nThis thesis is concerned with the monitoring of mixed-signal 
 circuit simulations. In the field of hardware verification\, the use of de
 clarative property languages in combination with simulation is now standar
 d practice. However the lack of features to specify asynchronous behaviors
 \, or the insufficient integration of verification results\, makes existin
 g assertion...
DTSTART:20161028T150000
DTEND:20161028T170000
DURATION:PT02H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Thomas FERRERE - Assertion and Measurements for Mixed-Signal Simula
 tion
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3728l04pn0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 October 2016 - Auditorium (IMA
 G)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Auditorium (IMAG)\n\nJoseph Sifakis\, VERIMAG\nhttp:/
 /www-verimag.imag.fr/~sifakis/\n\n« Modeling architectures and their prop
 erties in BIP » \n\nAbstract:\n\nArchitectures are mechanisms for ensurin
 g global properties characterizing the coordination between components. Us
 ing architectures largely accounts for our ability to master complexity an
 d develop systems cost-effectively.\n\nIn BIP\, architectures are generic 
 behavior transformers represented as sets of connectors. They take as argu
 ments typed components and give a composite component. We propose two diff
 erent ways...
DTSTART:20161027T140000
DTEND:20161027T160000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Joseph Sifakis - Modeling architectures and their properties in BIP
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37316oosV1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 October 2016 - 206\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n16:15 - S
 alle : 206\n\nIsmail Oukid\, SAP\nhttps://wwwdb.inf.tu-dresden.de/team/ext
 ernal-members/ismail-oukid/\n\n« Storage Class Memory (aka NVRAM): Challe
 nges and Opportunities » \n\nAbstract:\n\nStorage Class Memory (SCM)\, al
 so known as byte-addressable\nnon-volatile memory\, or NVRAM\, is a new cl
 ass of memory technologies\nthat have the potential to revolutionize the a
 rchitecture of\npersistent software. Indeed\, SCM combines the low latency
  and high\nbandwidth of DRAM with the density\, non-volatility\, and econo
 mic\ncharacteristic of traditional storage media (SSDs\, HDDs). While SCM
 \ncan be used as...
DTSTART:20161013T161500
DTEND:20161013T171500
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Ismail Oukid - Storage Class Memory (aka NVRAM): Challenges and Opp
 ortunities
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3733M6Mken@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 12 October 2016 - Auditorium (IMA
 G)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : Auditorium (IMAG)\n\nLouis Dureuil\, Vérimag-CEA\n\n
 \n« Analyse de code et processus d’évaluation des composants sécuris
 és contre l’injection de faute » \n\nRésumé :\n\nLasers\, impulsions
  électriques et électromagnétiques\, confèrent à un attaquant le pouv
 oir mystérieux de perturber la logique de fonctionnement des appareils in
 formatiques. Cette étonnante capacité peut s’avérer particulièrement
  néfaste pour les composants sécurisés\, tels que les cartes à puce. F
 ace à cette menace\, la sécurité de ces composants est évaluée par de
 s laboratoires...
DTSTART:20161012T100000
DTEND:20161012T120000
DURATION:PT02H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Louis Dureuil - Analyse de code et processus d’évaluation des co
 mposants sécurisés contre l’injection de faute
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3736I0vN9N@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 October 2016 - Room 206 (build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n15:30 - Salle : Room 206 (building IMAG)\n\nCristina SERBAN\, 
 VERIMAG\n\n\n« A Decision Procedure for Separation Logic in SMT » \n\nAb
 stract:\n\nWe present a complete decision procedure for the entire quantif
 ier-free fragment of Separation Logic (SL) interpreted over heaplets with 
 data elements ranging over a parametric multi-sorted (possibly infinite) d
 omain. The algorithm uses a combination of theories and is used as a speci
 alized solver inside a DPLL(T) architecture. A prototype was implemented w
 ithin the CVC4 SMT solver. Preliminary evaluation suggests the possibility
  of using...
DTSTART:20161006T153000
DTEND:20161006T163000
DURATION:PT01H0M0S
LOCATION:Room 206 (building IMAG)
SUMMARY:Cristina SERBAN - A Decision Procedure for Separation Logic in SMT
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3738BKEpPS@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n11:30 - Salle : Auditorium (Builbing IMAG)\n\nParosh Abdul
 la\, Uppsala University\nhttp://user.it.uu.se/~parosh/\n\n« Automatic Ver
 ification of Linearization Policies » \n\nAbstract:\n\nWe consider the pr
 oblem of proving linearizability for concurrent threads that access a shar
 ed data structure. Such systems give rise to unbounded numbers of threads 
 that operate on an bounded data domain and that access dynamically allocat
 ed memory. Furthermore\, proving linearizability is harder than proving co
 ntrol state reachability due to existentially quantified linearization poi
 nts. The...
DTSTART:20160929T113000
DTEND:20160929T123000
DURATION:PT01H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Parosh Abdulla - Automatic Verification of Linearization Policies
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3741uX7wnu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n10:30 - Salle : Auditorium (Builbing IMAG)\n\nJoel Ouaknin
 e\, Max Planck Institute and Oxford University\nhttp://nts.imag.fr/index.p
 hp/Infinite_Systems_Verification_Day\n\n« Decision Problems for Linear Dy
 namical Systems » \n\nAbstract:\n\nDynamical systems\, both discrete and 
 continuous\, permeate vast areas of mathematics\, physics\, engineering\, 
 and computer science. In this talk\, we consider a selection of natural de
 cision problems for linear dynamical systems\, such as reachability of a g
 iven hyperplane. Such problems have applications in a wide array of scient
 ific areas\,...
DTSTART:20160929T103000
DTEND:20160929T113000
DURATION:PT01H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Joel Ouaknine - Decision Problems for Linear Dynamical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37432rIPuu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n09:30 - Salle : Auditorium (Builbing IMAG)\n\nAndreas Pode
 lski\, University of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff
 /podelski\n\n« Thread Modularity on the Next Level » \n\nAbstract:\n\nA 
 thread-modular proof for the correctness of a concurrent program is based 
 on an inductive and interference-free annotation of each thread. It is wel
 l-known that the corresponding proof system is not complete (unless one ad
 ds auxiliary variables). We introduce a hierarchy of proof systems where e
 ach level k corresponds to a new notion of thread modular- ity (level 1 co
 rresponds...
DTSTART:20160929T093000
DTEND:20160929T103000
DURATION:PT01H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Andreas Podelski - Thread Modularity on the Next Level
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3746WtPFFm@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 29 September 2016 - Auditorium (Builb
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n14:00 - Salle : Auditorium (Builbing IMAG)\n\nRadu Iosif\, VER
 IMAG\nhttp://nts.imag.fr/index.php/Radu_Iosif\n\n« Automata and Logics fo
 r Program Verification » \n\nAbstract:\n\nIn this thesis\, we present sev
 eral theoretical and practical results on program verification\, the main 
 purpose being that of providing cost-efficient solutions to problems that 
 almost always belong to undecidable classes. We appeal to logic and automa
 ta theory as they provide essentially the mechanisms to problem solving th
 at are needed for program verification. In this respect\, we investigate:
 \n\n* logics...
DTSTART:20160929T140000
DTEND:20160929T170000
DURATION:PT03H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Radu Iosif - Automata and Logics for Program Verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3748d4uxr4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  5 July 2016 - IMAG building\, Roo
 m 206\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n10:00 - Salle : IMAG building\, Room 206\n\nJyo Deshmukh\, TEMA To
 yota\, Los Angeles\n\n\n« Recent progress on formal methods for CPS » \n
 \nAbstract:\n\nCars are cyberphysical systems: physical phenomenon are reg
 ulated using embedded control software.  We discuss some of the challenges
  designing such systems\, and posit that some key technologies to meet the
 se can be found in a diverse set of fields: temporal logic\, optimization 
 and machine learning. We discuss some of our recent progress and ongoing w
 ork in this area.\n\n\n\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =...
DTSTART:20160705T100000
DTEND:20160705T120000
DURATION:PT02H0M0S
LOCATION:IMAG building\, Room 206
SUMMARY:Jyo Deshmukh - Recent progress on formal methods for CPS
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3751f3iElL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  5 July 2016 - Auditorium IMAG\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Auditorium IMAG\n\nRahul Mangaram\, University of Pennsylva
 nia\nhttps://www.seas.upenn.edu/~rahulm/\n\n« Challenges with Medical Cyb
 er-Physical Systems » \n\nAbstract:\n\nThis talk will focus on two challe
 nge problems with achieving high confidence in medical device software and
  systems:\n\n1. From Verified Models to Verified Code for Implantable Medi
 cal Devices\nThe design of bug-free and safe software is challenging\, esp
 ecially in complex implantable devices that control and actuate organs who
 se response is not fully understood. Currently\, over 15% of all medical d
 evice...
DTSTART:20160705T140000
DTEND:20160705T160000
DURATION:PT02H0M0S
LOCATION:Auditorium IMAG
SUMMARY:Rahul Mangaram - Challenges with Medical Cyber-Physical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37539hVVLD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 June 2016 - 206\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : 206\n\nSergiy Bogomolov\, IST Austria\nhttp://www.sergiybogomolov.com/
 \n\n« Scalable Static Hybridization Methods for Analysis of Nonlinear Sys
 tems » \n\nAbstract:\n\nHybridization methods enable the analysis of hybr
 id automata with\ncomplex\, nonlinear dynamics through a sound abstraction
  process.\nComplex dynamics are converted to simpler ones with added noise
 \, and\nthen analysis is done using a reachability method for the simpler
 \ndynamics. Several such recent approaches advocate that only “dynamic
 ”\nhybridization techniques—i.e.\, those where the dynamics are...
DTSTART:20160630T140000
DTEND:20160630T150000
DURATION:PT01H0M0S
LOCATION:206
SUMMARY:Sergiy Bogomolov - Scalable Static Hybridization Methods for Analys
 is of Nonlinear Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3756Z1KEOj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 22 June 2016 - New IMAG building
  Auditorium\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n14:00 - Salle : New IMAG building Auditorium\n\nHeiko FALK\,
  Hamburg University of Technology (TUHH) \nhttp://www.tuhh.de/es/esd/peopl
 e/hfalk/pgp\n\n« WCET-Aware Compilation and Optimization for Real-Time Sy
 stems  » \n\nAbstract:\n\nDuring the design of embedded software\, compil
 ers play an important\nrole\, since the machine code generated by them dir
 ectly influences\ncriteria like\, e.g.\, execution times. Particularly\, c
 ompiler\noptimizations could be beneficial to reduce such criteria\nsystem
 atically. In the domain of real-time systems\, the average-case\nexecution
  time (ACET)...
DTSTART:20160622T140000
DTEND:20160622T160000
DURATION:PT02H0M0S
LOCATION:New IMAG building Auditorium
SUMMARY:Heiko FALK - WCET-Aware Compilation and Optimization for Real-Time 
 Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3758M5cBjL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 16 June 2016 - Auditorium du Bât 
 IMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : Auditorium du Bât IMAG\n\nJan Lanik\, VERIMAG\n\n
 \n« Power reduction in sequential circuits  » \n\nAbstract:\n\nThe topic
  of this thesis are methods for power reduction in digital circuits by red
 ucing average switching on the transistor level. These methods are structu
 ral in the sense that they are not related to tuning physical properties o
 f the circuitry but to the internal structure of the implemented logic and
  therefore independent on the particular technology. We developed two nove
 l methods. One is based on optimizing the structure of the combinatorial p
 art of a...
DTSTART:20160616T140000
DTEND:20160616T160000
DURATION:PT02H0M0S
LOCATION:Auditorium du Bât IMAG
SUMMARY:Jan Lanik - Power reduction in sequential circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3760H63uiU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 26 May 2016 - amphithéâtre\, bâtim
 ent IMAG de l'Univ. G\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n17:00 - Salle : amphithéâtre\, bâtiment IMAG de
  l'Univ. G\n\nFrehse Goran\, VERIMAG\nhttps://sites.google.com/site/frehse
 g/\n\n«  Scalable Verification of Hybrid Systems » \n\nAbstract:\n\nIn m
 odel-based design\, a mathematical model of the system behavior is used to
  check whether it achieves the desired performance (e.g.\, rise or settlin
 g time) while satisfying critical 'safety' constraints (e.g.\, saturation\
 , overflow). This check can be difficult\, in particular when the system i
 s hybrid\, i.e.\, has continuous dynamics (physics) as well as event-based
  dynamics (mode...
DTSTART:20160526T170000
DTEND:20160526T190000
DURATION:PT02H0M0S
LOCATION:amphithéâtre\, bâtiment IMAG de l'Univ. G
SUMMARY:Frehse Goran -  Scalable Verification of Hybrid Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3763i2805K@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 May 2016 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nBruno Grenet\, LIRMM\, Universit
 é de Montpellier\nhttp://www.lirmm.fr/~grenet/\n\n« Factorisation de pol
 ynômes lacunaires » \n\nRésumé :\n\nLa représentation lacunaire est l
 a représentation naturelle d\'un polynôme par la liste de ses monômes n
 on nuls (c\'est essentiellement celle utilisée par le mathématicien sur 
 sa feuille de papier). Elle est de taille logarithmique en le degré du po
 lynôme\, et donc compacte pour les polynômes de grand degré ayant peu d
 e monômes non nuls. L\'algorithmique des polynômes en représentation la
 cunaire est...
DTSTART:20160512T140000
DTEND:20160512T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Bruno Grenet - Factorisation de polynômes lacunaires
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3765GNea54@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 April 2016 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nCamille Coti\, Université Par
 is XIII / LIPN\nhttp://www-lipn.univ-paris13.fr/~coti/\n\n« Parallel\, di
 stributed behavioral cartography of parametric timed automata » \n\nAbstr
 act:\n\nParametric timed automata (PTA) allow the specification and verifi
 cation of timed systems incompletely specified\, or subject to future chan
 ges. The behavioral cartography splits the parameter space of PTA in tiles
  in which the discrete behavior is uniform. Applications include the optim
 ization of timing constants\, and the measure of the system robustness w.r
 .t. the...
DTSTART:20160428T140000
DTEND:20160428T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Camille Coti - Parallel\, distributed behavioral cartography of par
 ametric timed automata
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3768cWs0Sh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 March 2016 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nAmaury Pouly\, Oxford Universi
 ty\, Dept. of Computer Science\n\n\n« Solvability of Matrix-Exponential E
 quations » \n\nAbstract:\n\nWe consider a continuous analogue of Babai\, 
 Lipton et al's problem of solving multiplicative matrix equations. Given k
 +1 square matrices A_1\,...\, A_k\, C\, all of the same dimension\, whose 
 entries are real algebraic\, we examine the problem of deciding whether th
 ere exist non-negative reals t_1\, ...\, t_k such that\n\nexp(A_1 t_1)exp(
 A_2 t_2)...exp(A_n t_n) = C.\n\nWe show that this problem is undecidable i
 n general\, but...
DTSTART:20160324T140000
DTEND:20160324T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Amaury Pouly - Solvability of Matrix-Exponential Equations
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3771Pj2Zur@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kunt
 zmann (MJK)	   \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =\n09:00 - Salle : Maison Jean Kuntzmann (MJK)	   \n\nAlan 
 Burns\, University	 of York\nhttps://www-users.cs.york.ac.uk/~burns/\n\n
 « Mixed Criticality - A Personal View » \n\nAbstract:\n\nIn this talk I 
 will discuss the notion of a mixed criticality system (MCS)\, give a brief
  outline of the available MCS literature\, motivate an alternative MCS mod
 el and discuss the open issues surrounding the MCS research. \n\nAbout the
  speaker:\n\nProf. Alan Burns\, University of York\nhttps://www-users.cs.y
 ork.ac.uk/~burns/\n\nProfessor Alan Burns is a member of the Department of
  Computer...
DTSTART:20160309T090000
DTEND:20160309T100000
DURATION:PT01H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Alan Burns - Mixed Criticality - A Personal View
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3773mPoRFd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kunt
 zmann (MJK)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n10:00 - Salle : Maison Jean Kuntzmann (MJK)\n\nSanjoy Baruah
 \, University of North Carolina at Chapel Hill.\nhttp://cs.unc.edu/people/
 sanjoy-k-baruah/\n\n« Mixed-criticality Scheduling on Multiprocessors » 
 \n\nAbstract:\n\nThe real-time scheduling community has devoted considerab
 le effort at better understanding how to schedule mixed-criticality worklo
 ads upon uniprocessor platforms\; in contrast\, the issue of multiprocesso
 r mixed-criticality scheduling is relatively under-explored. I will descri
 be some recent work in this direction\, presenting some preliminary result
 s and an...
DTSTART:20160309T100000
DTEND:20160309T110000
DURATION:PT01H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Sanjoy Baruah - Mixed-criticality Scheduling on Multiprocessors
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3776UhZIgV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kunt
 zmann (MJK)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n11:00 - Salle : Maison Jean Kuntzmann (MJK)\n\nLuca Santinel
 li\, ONERA (French Aerospace Lab)\nhttp://www.onera.fr/staff/luca-santinel
 li\n\n« Mixed-Criticalities and Probabilities » \n\nAbstract:\n\nIn this
  talk I will discuss possible point of contacts between the mixed-critical
 ity problem (modeling and analysis) and the probabilistic real-time (timin
 g analysis and schedulability).\nI will propose 3 main parts where probabi
 lities could help enhancing both the mixed-critical modeling and the mixed
 -critical scheduling.\n\n\nAbout the speaker:\n\nLuca Santinelli\, ONERA (
 French...
DTSTART:20160309T110000
DTEND:20160309T120000
DURATION:PT01H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Luca Santinelli - Mixed-Criticalities and Probabilities
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3778hbpwH3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  9 March 2016 - Maison Jean Kuntz
 mann (MJK)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Maison Jean Kuntzmann (MJK)\n\nDario Socci\, 
 Verimag\n\n\n« Scheduling of Certifiable  Mixed-Criticality Systems » \n
 \nAbstract:\n\nModern real-time systems tend to be mixed-critical\, in the
  sense that they integrate on the same computational platform applications
  at different levels of criticality (e.g.\, safety critical and mission cr
 itical). Integration gives the advantages of reduced cost\, weight and pow
 er consumption\, which can be crucial for modern applications like Unmanne
 d Aerial Vehicles (UAVs). On the other hand\, this leads to major complica
 tions in...
DTSTART:20160309T140000
DTEND:20160309T160000
DURATION:PT02H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Dario Socci - Scheduling of Certifiable  Mixed-Criticality Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3781JUSHkn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  2 March 2016 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nAlexey Bakhirkin\, University
  of Leicester\nhttp://www.cs.le.ac.uk/people/ab643/\n\n«  Towards finding
  non-terminating behaviours in programs  » \n\nAbstract:\n\nWe present ou
 r take on a problem of finding a recurrent set of an imperative program. A
  recurrent set is a set of states that\, once reached\, cannot or may not 
 be escaped by an execution (there exist multiple definitions). A straightf
 orward application of a recurrent set is to show the existence of non-term
 inating executions in the program\, for that it needs to be complemented b
 y a proof of...
DTSTART:20160302T140000
DTEND:20160302T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexey Bakhirkin -  Towards finding non-terminating behaviours in p
 rograms
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3783MZPdWk@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  1 March 2016 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nArnaud Sangnier\, LIAFA PARIS 7
 \n\n\n« On the Complexity of Verifying Regular Properties on Flat Counter
  Systems » \n\nAbstract:\n\nAmong the approximation methods for the verif
 ication of counter systems\, one of them consists in model-checking their 
 flat unfoldings. That is why\, optimal algorithms for model-checking flat 
 counter systems are being designed since this may represent the core of a 
 verification process. Unfortunately\, the complexity characterization of m
 odel-checking problems for such operational models is not always well stud
 ied except...
DTSTART:20160301T140000
DTEND:20160301T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Arnaud Sangnier - On the Complexity of Verifying Regular Properties
  on Flat Counter Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3786jUzdEt@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 February 2016 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\n   \, Verimag\n\n\n« PhD S
 eminars » \n\nAbstract:\n\nPhD students present their work.\n\n- <b>14:00
  Dellabani Mahieddine: Implementation of Distributed Real-Time application
 s.</b>\n\nAbstract: The design and implementation of distributed real-time
  systems is acknowledged to be a very difficult task. A central question b
 eing how to efficiently coordinate parallel activities by means of point-t
 o-point communication so as to keep global consistency while meeting timin
 g constraints. Considering real-time constraints brings additional complex
 ity since...
DTSTART:20160204T140000
DTEND:20160204T170000
DURATION:PT03H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - PhD Seminars
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3788Es8d0E@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 29 January 2016 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - Sall
 e : CTL\n\nMathilde Duclos\, Université Grenoble-Alpes\n\n\n« Méthodes 
 pour la vérification des protocoles cryptographiques dans le modèle calc
 ulatoire (Methods for cryptographic protocol verification in the computati
 onal model ) » \n\nRésumé :\n\nLes preuves de sécurité pour les syst
 èmes cryptographiques peuvent être effectuées dans\ndifférents modèle
 s qui correspondent chacun à des hypothèses de sécurité différentes. 
 Dans\nle modèle symbolique\, on considère qu’un attaquant ne peut devi
 ner aucun secret et qu’il\na seulement la possibilité d’appliquer un 
 ensemble...
DTSTART:20160129T100000
DTEND:20160129T120000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Mathilde Duclos - Méthodes pour la vérification des protocoles cr
 yptographiques dans le modèle calculatoire (Methods for cryptographic pro
 tocol verification in the computational model )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3791UZiLNf@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 January 2016 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\n   \, Verimag\n\n\n« PhD Se
 minars  » \n\nAbstract:\n\nPhD students present their work. \n\n- <b> 14:
 00 Maxime Puys: Cybersecurity in industrial systems\, from packet filterin
 g to formal methods</b>\n\nAbstract : \nRecently medias are showing an inc
 reasing number of attacks against in-\ndustrial systems. Such attacks beco
 me feasible because these systems\nare recently spreading geographically a
 nd communicating more and more\nthrough unsafe mediums like Internet. As i
 ndustrial systems historically\nhave been isolated from the rest of the wo
 rld\, there...
DTSTART:20160128T140000
DTEND:20160128T170000
DURATION:PT03H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - PhD Seminars
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-37944eiawx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 January 2016 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\n   \, Verimag \n\n\n« Phd S
 eminars  » \n\nAbstract:\n\nPhD students present their work. \n\n- <b>14:
 00  Hamza Rihani: WCET Analysis in Shared Resources Real-Time Systems</b>
 \n\nAbstract: \nPredictability is an important aspect in real-time and saf
 ety-critical systems\, where non-functional properties -- such as the timi
 ng behavior -- have high impact on the system correctness. As many safety-
 critical systems have a growing performance demand\, old and simple archit
 ectures are not sufficient anymore. Multi-core systems offer higher proces
 sing speed...
DTSTART:20160107T140000
DTEND:20160107T170000
DURATION:PT03H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - Phd Seminars
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3796apjUUj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 10 December 2015 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - S
 alle : CTL\n\nAlexios Lekidis\, Verimag/DCS\nhttp://www-verimag.imag.fr/~l
 ekidis/\n\n« Design flow for the rigorous development of networked embedd
 ed systems » \n\nRésumé :\n\nLes systèmes embarqués en réseau sont d
 evenus une avancée technologique majeure au cours des dernières années.
  Telle qu’ils sont utilisés dans une grande diversité d'applications\,
  le principal défi pose est de développer des applications fonctionnelle
 s\, en assurant leurs défis de conception. Ces défis concernent l'utilis
 ation des leurs ressources matérielles limitées (p.ex. la mémoire du pr
 ocesseur\,...
DTSTART:20151210T133000
DTEND:20151210T153000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Alexios Lekidis - Design flow for the rigorous development of netwo
 rked embedded systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3799A2Ili4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 10 December 2015 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n10:00 - Salle : salle A. Turing CE4\n\nPEKTAŞ Abdurrahman\, TUBITA
 K\n\n\n« Behavior based malware classification using online machine learn
 ing » \n\nRésumé :\n\nLes malwares\, autrement dit programmes malicieux
  ont grandement évolué ces\nderniers temps et sont devenus une menace ma
 jeure pour les utilisateurs\ngrand public\, les entreprises et même le go
 uvernement. Malgré la présence et\nl'utilisation intensive de divers out
 ils anti-malwares comme les anti-virus\,\nsystèmes de détection d'intrus
 ions\, pare-feux etc \; les concepteurs de\nmalwares peuvent significative
 ment...
DTSTART:20151210T100000
DTEND:20151210T120000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:PEKTAŞ Abdurrahman - Behavior based malware classification using o
 nline machine learning
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38013uPuvC@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 16 October 2015 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n09:30 - Salle : salle A. Turing CE4\n\nEnea Zaffanella\, Università 
 degli Studi di Parma\n\n\n« A Few Notes on the Implementation of Convex P
 olyhedra Using the Double Description Framework » \n\nAbstract:\n\nThe fi
 rst part of the seminar presents an algorithm for the removal of\nconstrai
 nts (resp.\, generators) from a convex polyhedron represented\nin the Doub
 le Description framework. Instead of recomputing the dual\nrepresentation 
 from scratch\, the algorithm tries to better exploit the\ninformation avai
 lable in the DD pair\, so as to capitalize on the\ncomputational work alre
 ady done. A...
DTSTART:20151016T093000
DTEND:20151016T103000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Enea Zaffanella - A Few Notes on the Implementation of Convex Polyh
 edra Using the Double Description Framework
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3804z5a3vI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 October 2015 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n10:00 - Salle : salle A. Turing CE4\n\nAndy King\, University of Ke
 nt\n\n\n« The Ying and the Yang of Binary Reversing » \n\nAbstract:\n\nI
  will explain how the problem of recovering types (the ying) in binary\nre
 versing\, has a yang\, which is a high-level witness that defines the\ntyp
 es.  Quite apart from providing a principled approach to type\nrecovery\, 
 the formulation gives a type-based decompiler for free.\n\n\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther semina
 rs at VERIMAG -...
DTSTART:20151015T100000
DTEND:20151015T110000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andy King - The Ying and the Yang of Binary Reversing
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3806ueB2OI@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 15 October 2015 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nAlexis Fouilhe\, Verimag\n\n\n« Revisiting the abstract doma
 in of polyhedra: constraints-only representation and formal proof » \n\nA
 bstract:\n\nThe work reported in this thesis revisits in two ways the abst
 ract domain of\npolyhedra used for static analysis of programs. First\, st
 rong guarantees are\nprovided on the soundness of the operations on polyhe
 dra\, by using of the Coq\nproof assistant to check the soundness proofs. 
 The means used to ensure cor-\nrectness don’t hinder the performance of 
 the resulting Verimag Polyhedra\nLibrary (VPL). It is built on the princip
 le of...
DTSTART:20151015T140000
DTEND:20151015T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Alexis Fouilhe - Revisiting the abstract domain of polyhedra: const
 raints-only representation and formal proof
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3809KeJBVb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 14 October 2015 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nChantal Keller\, Universit
 é Paris Sud\n\n\n« F*: Higher-Order Effectful Program Verification » \n
 \nAbstract:\n\nF* is an ML-like language designed for program verification
 . It is based\non refinement types\, a powerful extension of ML types to e
 xpress\nproperties about programs. These properties are automatically chec
 ked\nvia the generation of verification conditions that are finally\ndisch
 arged by SMT solvers. F* provides a uniform framework to deal both\nwith p
 rograms with effects and non-termination\, for which one might want\nto es
 tablish some...
DTSTART:20151014T140000
DTEND:20151014T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chantal Keller - F*: Higher-Order Effectful Program Verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3811X1ITtu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 September 2015 - Amphiteatre Mais
 on Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n10:00 - Salle : Amphiteatre Maison Jean Kuntzmann\n\nA
 li Kassem\, Verimag\nhttp://www-verimag.imag.fr/~kassem/\n\n« Vérificati
 on automatique de protocoles d'examen\, de monnaie\, de réputation\, et d
 e routage (Automated Verification of Exam\, Cash\, Reputation\, and Routin
 g Protocols) » \n\nRésumé :\n\nLa sécurité est une exigence cruciale 
 dans les applications basées sur l'information et la technologie de commu
 nication\, surtout quand un réseau ouvert tel que l'Internet est utilis
 é. Pour assurer la sécurité dans ces applications de nombreux protocole
 s cryptographiques...
DTSTART:20150918T100000
DTEND:20150918T120000
DURATION:PT02H0M0S
LOCATION:Amphiteatre Maison Jean Kuntzmann
SUMMARY:Ali Kassem - Vérification automatique de protocoles d'examen\, de 
 monnaie\, de réputation\, et de routage (Automated Verification of Exam\,
  Cash\, Reputation\, and Routing Protocols)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3814athiU9@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 September 2015 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\n Julien Signoles Nikolai K
 osmatov\, CEA6LIST\n\n\n« Combinations of Static and Dynamic Analyses in 
 Frama-C: An Overview (Combinations of Static and Dynamic Analyses in Frama
 -C: An Overview) » \n\nAbstract:\n\nInitially considered as orthogonal re
 search fields\, static and dynamic\nanalysis techniques have been for a lo
 ng time used separately to improve\nthe quality of software.  However\, th
 e development of both approaches\nhas lead to the discovery of common issu
 es and to the realization of\npotential synergies. The present talk gives 
 an overview...
DTSTART:20150910T140000
DTEND:20150910T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY: Julien Signoles Nikolai Kosmatov - Combinations of Static and Dyna
 mic Analyses in Frama-C: An Overview (Combinations of Static and Dynamic A
 nalyses in Frama-C: An Overview)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3816U6wSU8@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 September 2015 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nAmaury Pouly\, LIX (Polyte
 chnique)\nhttp://www.lix.polytechnique.fr/~pamaury/me/fr/\n\n« On the com
 plexity of some continuous space reachability problems » \n\nAbstract:\n
 \nIn this talk\, I will present some results about the two reachability pr
 oblems of some continuous space. The first problem is that of\nregion to r
 egion reachability for piecewise affine functions. We show that\, starting
  from dimension 2\, the bounded time version\nis NP-complete\, even if the
  function is assumed to be continuous. The second problem is is related to
   polynomial...
DTSTART:20150903T140000
DTEND:20150903T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Amaury Pouly - On the complexity of some continuous space reachabil
 ity problems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3819lzvmSP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 July 2015 - Amphi E ENSIMAG\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 14:00 - Salle : Amphi E ENSIMAG\n\nChristos H. Papadimitriou\, UC Berkeley
 \nhttp://www.cs.berkeley.edu/~christos/\n\n« Life under the Lens » \n\nA
 bstract:\n\nApplying the algorithmic point of view to the natural\, life\,
  and social sciences often results in unexpected insights and progress in 
 central problems\, a mode of research that has been described as ``the len
 s of computation.''  I will focus on examples in the life sciences\, from 
 joint work with Erick Chastain\, Costis Daskalakis\, Adi Livnat\, Umesh Va
 zirani\, Santosh Vempala\, and Albert Wu:  Evolution of a population throu
 gh sexual...
DTSTART:20150702T140000
DTEND:20150702T160000
DURATION:PT02H0M0S
LOCATION:Amphi E ENSIMAG
SUMMARY:Christos H. Papadimitriou - Life under the Lens
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38219Inzzv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 June 2015 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nPablo Buiras\, Chalmers Univers
 ity of Technology (Sweden)\nhttp://www.cse.chalmers.se/~buiras/\n\n«  Mix
 ing Static and Dynamic Typing for Information-Flow  Control in Haskell » 
 \n\nAbstract:\n\nInformation-Flow Control (IFC) is a well-established appr
 oach for allowing untrusted code to manipulate sensitive data without disc
 losing it.\n\nIFC is typically enforced via type systems and static analys
 es or via dynamic execution monitors. The LIO Haskell library\, originatin
 g in operating systems research\, implements a purely dynamic monitor of t
 he...
DTSTART:20150625T140000
DTEND:20150625T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pablo Buiras -  Mixing Static and Dynamic Typing for Information-Fl
 ow  Control in Haskell
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38233fmUlU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 June 2015 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nChris Myers\, University of Uta
 h\n\n\n« LEMA: A Tool for the Formal Verification of Digitally-Intensive 
 Analog/Mixed-Signal Circuits  » \n\nAbstract:\n\nThe increasing integrati
 on of analog/mixed-signal (AMS) circuits into system designs has further c
 omplicated an already difficult verification problem. Recently\, formal ve
 rification\, which has been successful in the purely digital domain\, has 
 made some in-roads in the AMS domain. This talk describes one such formal 
 verification tool for AMS circuits\, LEMA. In particular\, LEMA is capable
  of generating...
DTSTART:20150611T140000
DTEND:20150611T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chris Myers - LEMA: A Tool for the Formal Verification of Digitally
 -Intensive Analog/Mixed-Signal Circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3826kLSPxa@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  9 June 2015 - MJK\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Salle 
 : MJK\n\nAhlem TRIKI\, Verimag\n\n\n« Distributed Implementations of Time
 d Component-based Systems (Implémentations Distributés des Systems Temps
 -réel à base de Composants) » \n\nRésumé :\n\nCorrect distributed imp
 lementation of real-time systems has always been a challenging task. The c
 oordination of components executing on a distributed platform has to be en
 sured by complex communication protocols taking into account their timing 
 constraints. In this thesis\, we propose rigorous design flow starting fro
 m a high-level model of an application software in BIP (Behavior\, Interac
 tion\,...
DTSTART:20150609T133000
DTEND:20150609T153000
DURATION:PT02H0M0S
LOCATION:MJK
SUMMARY:Ahlem TRIKI - Distributed Implementations of Timed Component-based 
 Systems (Implémentations Distributés des Systems Temps-réel à base de 
 Composants)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3829PmhF2M@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 May 2015 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nAndrew Reynolds\, EPFL Lausanne 
 \nhttp://lara.epfl.ch/~reynolds/\n\n« Using CVC4 for Proofs by Induction 
 in SMT » \n\nAbstract:\n\nSatisfiability modulo theory solvers are increa
 singly being used to solve quantified formulas over structures such as int
 egers and term algebras. This talk presents a set of techniques for integr
 ating inductive reasoning within SMT solving algorithms that is sound with
  respect to the interpretation of structures in SMT-LIB standard. The tech
 niques include inductive strengthening of conjecture to be proven\, as wel
 l as...
DTSTART:20150528T140000
DTEND:20150528T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andrew Reynolds - Using CVC4 for Proofs by Induction in SMT
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38315HwrZK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  8 April 2015 - CTL (Amphitheater
 )\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n13:30 - Salle : CTL (Amphitheater)\n\nAyoub Nouri\, Verimag\nhttp://ww
 w-verimag.imag.fr/~nouri/\n\n« Rigorous System-level Modeling and Perform
 ance Evaluation for Embedded System Design  » \n\nAbstract:\n\nIn the pre
 sent work\, we tackle the problem of modeling and evaluating performance i
 n the context of embedded systems design. These have become essential for 
 modern societies and experienced important evolution. Due to the growing d
 emand on functionality and programmability\, software solutions have gaine
 d in importance\, although known to be less efficient than dedicated hardw
 are....
DTSTART:20150408T133000
DTEND:20150408T163000
DURATION:PT03H0M0S
LOCATION:CTL (Amphitheater)
SUMMARY:Ayoub Nouri - Rigorous System-level Modeling and Performance Evalua
 tion for Embedded System Design
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-383325bxuS@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 April 2015 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nDamien Pous\, ENS de Lyon\nhttp:
 //perso.ens-lyon.fr/damien.pous/\n\n« Algorithms for language equivalence
  of finite automata » \n\nAbstract:\n\nFinite automata are used in a wide
  range of verification problems.\nWe introduce 'bisimulation up to congrue
 nce' as a technique for\nproving language equivalence of non-deterministic
  finite automata.\nExploiting this technique\, we devise an optimisation o
 f the classical\nalgorithm by Hopcroft and Karp which\, as we show\, is ex
 ploiting a\nweaker 'bisimulation up to equivalence' technique. The...
DTSTART:20150403T140000
DTEND:20150403T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Damien Pous - Algorithms for language equivalence of finite automat
 a
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3836DEVhEO@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 February 2015 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\n  Seminaires doctorants 3\,
  Verimag\n\n\n« Verimag PhD seminars 3 » \n\nAbstract:\n\n14:00-14:35 Eg
 or Karpenkov\nPolicy Iteration: a Scalable Approach\n(supervision David Mo
 nniaux)\n\nMax-Policy iteration is a new technique for obtaining inductive
 \ninvariants in the program\, which is based on the ideas of\nabstract int
 erpretation.  One of the major pitfalls of abstract\ninterpretation is wid
 ening: if the invariant value does not converge\nafter a few iterations\, 
 the invariant is 'widened' to the largest\nvalue of the abstract domain.  
 Abstract...
DTSTART:20150219T140000
DTEND:20150219T170000
DURATION:PT03H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 3 - Verimag PhD seminars 3
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38380rZuvs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 February 2015 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\n  Seminaires doctorants 2\,
  Verimag\n\n\n« Verimag PhD seminars 2 » \n\nAbstract:\n\n14:00-14:35 Do
 gan Ulus\nMonitoring Timed Regular Expressions\n(supervision Oded Maler)\n
 \nTimed level of abstraction is extremely useful to model systems\nwith re
 al-time constraints. Once such systems are modeled as timed\nsystems\, pro
 perties with timing information can be specified using a\nvariety of diffe
 rent formalisms such as temporal logics and regular\nexpressions. In this 
 work we use timed regular expressions (TRE)\nas a compact but highly-expre
 ssive...
DTSTART:20150212T140000
DTEND:20150212T170000
DURATION:PT03H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 2 - Verimag PhD seminars 2
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3841bILTnU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 February 2015 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\n  Seminaires doctorants 1\,
  Verimag\n\n\n« Verimag PhD seminars 1 » \n\nAbstract:\n\n14:00-14:35: J
 osselin Feist \nBinary analysis to assist detection and exploitability of
 \nvulnerability related to dynamic memory management\n(supervision Parie-L
 aure Potet)\n\nVulnerability detection aims to find software bugs that cou
 ld be\nexploited by malicious users to hijack the program execution or to
 \naccess sensible data.  My work focus on a specific vulnerability\ncalled
  use-after-free.  In this presentation I will introduce the\nused of a sta
 tic...
DTSTART:20150205T140000
DTEND:20150205T163000
DURATION:PT02H30M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 1 - Verimag PhD seminars 1
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3843IvGKd6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 January 2015 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nJim  Kapinski\, TEMA Toyota 
 Technical Center in Los Angeles\n\n\n« Applying V&V technologies to autom
 otive engine control: challenges and directions » \n\nAbstract:\n\nIn the
  model-based development (MBD) paradigm for embedded control software\, ve
 rification and validation (V&V) technologies are critical to ensure high q
 uality of the software. In the automotive context\, powertrain control (PT
 C) software development is increasingly being performed using MBD principl
 es\; however\, application of advanced V&V techniques to PTC software cont
 inues to be a...
DTSTART:20150129T140000
DTEND:20150129T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jim  Kapinski - Applying V&V technologies to automotive engine cont
 rol: challenges and directions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3846nC9EUv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 January 2015 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nAlexandre Marechal\, Verimag
  PhD student\n\n\n« A new Linearization Technique for Multivariate Polyno
 mials Using Convex Polyhedra Based on Handelman-Krivine's Theorem » \n\nA
 bstract:\n\nWe present a new linearization method to over-approximate non-
 linear multivariate polynomials with convex polyhedra.\nIt is based on Han
 delman-Krivine's theorem and consists in using products of constraints of 
 a polyhedron to over-approximate a polynomial on this polyhedron. We imple
 mented it together with two other linearization methods that we will not d
 etail in...
DTSTART:20150115T140000
DTEND:20150115T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexandre Marechal - A new Linearization Technique for Multivariate
  Polynomials Using Convex Polyhedra Based on Handelman-Krivine's Theorem
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38491mo8mE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 10 December 2014 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nCristina Serban\, VERIMAG
 \n\n\n« An Introduction to Separation Logic » \n\nAbstract:\n\nSeparatio
 n logic is a novel system for reasoning about program correctness\, which 
 extends Hoare logic by allowing reasoning over the state of the heap. It w
 as developed by John C. Reynolds\, Peter O'Hearn\, Samin Ishtiaq and Hongs
 eok Yang and is based on early work by Rod Burstall. Separation logic faci
 litates reasoning about shared mutable data structures and also supports l
 ocal reasoning. It has also been extended to deal with other situations\, 
 such as...
DTSTART:20141210T140000
DTEND:20141210T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Cristina Serban - An Introduction to Separation Logic
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3851HW0hTM@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 21 November 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nChih-Hong Cheng\, ABB Germany
 \n\n\n« G4LTL-ST - Automatic Generation of PLC programs  » \n\nAbstract:
 \n\nG4LTL-ST automatically synthesizes control code for industrial Program
 mable Logic Controls (PLC) from timed behavioral specifications of input-o
 utput signals. These specifications are expressed in a linear temporal log
 ic (LTL) extended with non-linear arithmetic constraints and timing constr
 aints on signals. G4LTL-ST generates code in IEC 61131-3-compatible Struct
 ured Text\, which is compiled into executable code for a large number of i
 ndustrial...
DTSTART:20141121T140000
DTEND:20141121T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chih-Hong Cheng - G4LTL-ST - Automatic Generation of PLC programs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3854RuPfz9@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 November 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n13:30 - Salle : salle A. Turing CE4\n\nVictor Magron\, Imperial Co
 llege\nhttp://cas.ee.ic.ac.uk/people/vmagron/\n\n« New applications of mo
 ment-SOS hierarchies » \n\nAbstract:\n\nSemidefinite programming is relev
 ant to a wide range of mathematic fields\, including combinatorial optimiz
 ation\, control theory\, matrix completion. In 2001\, Lasserre introduced 
 a hierarchy of semidefinite relaxations for particular polynomial instance
 s of the Generalized Moment Problem (GMP). My talk emphasizes new applicat
 ions of this moment-SOS hierarchy\, investigated during my PhD and Postdoc
 ...
DTSTART:20141113T133000
DTEND:20141113T153000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Victor Magron - New applications of moment-SOS hierarchies
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3856I3WUk5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  7 November 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nJean-Baptiste Jeannin\, Carne
 gie Mellon University\nhttp://www.cs.cmu.edu/~jeannin \n\n« Differential 
 Temporal Dynamic Logic for Hybrid Systems and Airplane Collision Avoidance
   » \n\nAbstract:\n\nDifferential Dynamic Logic can express important pro
 perties about\nCyber-Physical Systems\, by combining discrete assignments 
 and control\nstructures with differential equations. However it can only e
 xpress\nproperties about the end state of a system. In this talk\, we firs
 t\nintroduce the differential temporal dynamic logic dTL2\, a logic to\nsp
 ecify...
DTSTART:20141107T140000
DTEND:20141107T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Baptiste Jeannin - Differential Temporal Dynamic Logic for Hyb
 rid Systems and Airplane Collision Avoidance
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3858StLhUB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 15 October 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nAndreas Podelski\, Universi
 ty of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff/podelski\n\n
 « Proof Spaces for Unbounded Parallelism  » \n\nAbstract:\n\nWe present 
 a proof system which can be used to exploit sequential verification techno
 logy for proving the correctness of multi-threaded programs with unbounded
 ly many threads. The corresponding verification method can leverage the te
 chniques of well-structured transition systems. The proof system is comple
 te relative to more traditional proof systems for multi-threaded programs 
 which allow...
DTSTART:20141015T140000
DTEND:20141015T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andreas Podelski - Proof Spaces for Unbounded Parallelism
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3861uVxvBE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 14 October 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nAndreas Podelski\, University
  of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff/podelski\n\n« S
 tatic Analysis Modulo Theory » \n\nAbstract:\n\nWe present a new approach
  to program verification.  We call it 'Static Analysis Modulo Theory' in a
 nalogy with SMT solving.  Satisfiability here corresponds to the existence
  of an error path in the program\, or: unsatisfiability corresponds to the
  emptiness of an automaton. Each time the tool finds an error path\, i.e.\
 , a word accepted by the automaton\, it analyzes the word in the theory of
  the data...
DTSTART:20141014T140000
DTEND:20141014T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andreas Podelski - Static Analysis Modulo Theory
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3864ozow8V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 13 October 2014 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sall
 e : CTL\n\nPranav TENDULKAR\, Verimag\n\n\n« Allocation et Ordonnancement
  sur des processeurs multi-coeur avec des solveurs SMT (Mapping and Schedu
 ling on Multi-core Processors using SMT Solvers) » \n\nRésumé :\n\nDans
  l'objectif d'augmenter les performances\, l'architecture des processeurs 
 a évolué vers des plate-formes 'multi-core' et 'many-core' composées de
  multiple unités de traitements. Toutefois\, trouver des moyens efficaces
  pour exécuter du logiciel parallèle reste un problème difficile. Avec 
 un grand nombre d'unités de calcul disponibles\, le logiciel doit orchest
 rer la...
DTSTART:20141013T133000
DTEND:20141013T153000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Pranav TENDULKAR - Allocation et Ordonnancement sur des processeurs
  multi-coeur avec des solveurs SMT (Mapping and Scheduling on Multi-core P
 rocessors using SMT Solvers)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38666VJ3hL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 13 October 2014 - Amphithéâtre - M
 aison Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n15:30 - Salle : Amphithéâtre - Maison Jean Kuntzm
 ann\n\nJulien Henry\, Université de Grenoble\nhttp://www-verimag.imag.fr/
 ~jhenry/\n\n« Analyse statique de programmes par interprétation abstrait
 e et procédures de décision (Static Analysis by Abstract Interpretation 
 and Decision Procedures) » \n\nRésumé :\n\nChers tous\, \n\nJ'ai le pla
 isir de vous inviter à la soutenance de ma thèse de doctorat\, intitul
 ée:\n\n'Analyse statique de programmes par interprétation abstraite et p
 rocédures de décision'\n\nqui aula lieu le lundi 13 octobre 2014 à 15h3
 0 dans...
DTSTART:20141013T153000
DTEND:20141013T173000
DURATION:PT02H0M0S
LOCATION:Amphithéâtre - Maison Jean Kuntzmann
SUMMARY:Julien Henry - Analyse statique de programmes par interprétation a
 bstraite et procédures de décision (Static Analysis by Abstract Interpre
 tation and Decision Procedures)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3869cErjch@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday  9 October 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n10:30 - Salle : salle A. Turing CE4\n\nKim Quyên Lý\, LIAMA\, VERI
 MAG\n\n\n« Verification automatique de certificats de terminaison (Automa
 ted verification of termination certificates) » \n\nRésumé :\n\nBonjour
  à tous\,\n\nJ\'ai le plaisir de vous inviter à ma soutenance de thèse\
 , intitulée\n\n« Automated verification of termination certificates »\n
 \nVous êtes chaleureusement invités au pot qui suivra et qui se déroule
 ra au même endroit.\n\nJury :\nMr Frédéric Blanqui\, Chargé de recherc
 he à l’INRIA\, Paris\, Co-Directeur de thèse\nMr David Delahaye\, Ma
 ître de...
DTSTART:20141009T103000
DTEND:20141009T123000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Kim Quyên Lý - Verification automatique de certificats de termina
 ison (Automated verification of termination certificates)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3871VjJ3n9@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  3 October 2014 - Maison Jean Kuntzm
 ann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Maison Jean Kuntzmann\n\nRaphaël Jamet\, Verimag\nh
 ttp://www-verimag.imag.fr/~rjamet/\n\n« Protocoles et Modèles pour la S
 écurité des Réseaux Ad Hoc Sans-Fil (Protocols and Models for the Secur
 ity of Wireless Ad Hoc Networks) » \n\nRésumé :\n\nBonjour à tous\,\n
 \nJ'ai le plaisir de vous inviter à ma soutenance de thèse\, intitulée
 \n\n'Protocoles et Modèles pour la Sécurité des Réseaux Ad Hoc Sans-Fi
 l'.\n\nElle aura lieu le vendredi 3 Octobre à 14h00\, en français\,\nà 
 la Maison Jean Kuntzmann\, sur le campus de Grenoble.\nUn plan est disponi
 ble :...
DTSTART:20141003T140000
DTEND:20141003T170000
DURATION:PT03H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Raphaël Jamet - Protocoles et Modèles pour la Sécurité des Rés
 eaux Ad Hoc Sans-Fil (Protocols and Models for the Security of Wireless Ad
  Hoc Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3874wIRHIP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 12 September 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nJean-Marc Vincent\, LIG\nhtt
 p://mescal.imag.fr/membres/jean-marc.vincent/index.html/\n\n« A Spatiotem
 poral Data Aggregation Technique for the Macroscopic Analysis of Large-sca
 le Systems  » \n\nRésumé :\n\nAnalysts commonly use execution traces co
 llected at runtime to understand the behavior of an application running on
  distributed and parallel systems. These traces are inspected post mortem 
 using various visualization techniques that\, however\, do not scale prope
 rly for a large number of events. This issue\, mainly due to human percept
 ion...
DTSTART:20140912T140000
DTEND:20140912T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Marc Vincent - A Spatiotemporal Data Aggregation Technique for
  the Macroscopic Analysis of Large-scale Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3876UOuXTN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 28 May 2014 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nDejan Nickovic\, Austrian Insti
 tute of Technology\nhttp://www.ait.ac.at/departments/safety-security/busin
 ess-units/safe-and-autonomous-systems/?L=1\n\n« Require\, Test and Trace 
 It » \n\nAbstract:\n\nWe propose a framework for requirement-driven test 
 generation which combines contract-based interface theories with model-bas
 ed testing.  We design a specification language\, that we call requirement
  interfaces\, for formalizing different views (aspects) of synchronous dat
 a-flow systems \nfrom their informal requirements. Multiple views of a sys
 tem\, each...
DTSTART:20140528T140000
DTEND:20140528T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Dejan Nickovic - Require\, Test and Trace It
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38783PUcgU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 28 April 2014 - Maison Jean Kuntzman
 n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n13:00 - Salle : Maison Jean Kuntzmann\n\nChristian VON ESSEN\, Verimag
 /UJF\n\n\n« Vérification et synthèse quantitative (Quantitative verific
 ation and synthesis) » \n\nRésumé :\n\nCette thèse contribue à l'étu
 de théorique et a l'application de la vérification et de la synthèse qu
 antitative. Nous étudions les stratégies qui optimisent la fraction de d
 eux récompenses des MDPs. L'objectif est la synthèse de régulateurs eff
 icaces dans des environnements probabilistes. Premièrement nous montrons 
 que les stratégies déterministes et sans mémoire sont suffisants. Sur l
 a base de...
DTSTART:20140428T130000
DTEND:20140428T160000
DURATION:PT03H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Christian VON ESSEN - Vérification et synthèse quantitative (Quan
 titative verification and synthesis)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3881MkTJ5x@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 14 April 2014 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nKees Goossens\, TUE\nhttp://www.
 es.ele.tue.nl/~kgoossens/\n\n« CompSOC: A Mixed-Criticality Platform\, Fo
 rmalism\, and Design Flow » \n\nAbstract:\n\nCyber-physical\, embedded re
 al-time systems often contain multiple concurrent applications that\nhave 
 different characteristics and requirements\, and are often designed by dif
 ferent parties. As a result\, a\nsingle system contains applications desig
 ned using different models of computation\, and with different\ncriticalit
 ies (e.g. real time\, safety critical\, adaptive\, or not). CompSOC is a c
 omplete solution...
DTSTART:20140414T140000
DTEND:20140414T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Kees Goossens - CompSOC: A Mixed-Criticality Platform\, Formalism\,
  and Design Flow
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3883hv0koW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 April 2014 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nFlorian Brandner\, ENSTA-Paris
 Tech \nhttp://perso.ensta-paristech.fr/~brandner/\n\n« Refinement of Wors
 t-Case Execution Time Bounds by Graph Pruning » \n\nAbstract:\n\nAs real-
 time systems increase in complexity to provide more and more \nfunctionali
 ty and perform more demanding computations\, the problem of \nstatically a
 nalyzing the Worst-Case Execution Time bound (WCET) of real-time \nprogram
 s is becoming more and more time-consuming and imprecise.\n\nThe problem s
 tems from the fact that with increasing program size also the \nnumber of.
 ..
DTSTART:20140403T140000
DTEND:20140403T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Florian Brandner - Refinement of Worst-Case Execution Time Bounds b
 y Graph Pruning
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3887TrrHUB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 April 2014 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : salle A. Turing CE4\n\nJan Reineke\, Universität des
  Saarlandes\nhttp://embedded.cs.uni-saarland.de/reineke.php\n\n« PRET DRA
 M controller: bank privatization for predictability and temporal isolation
   » \n\nAbstract:\n\nHard real-time embedded systems employ high-capacity
  memories such as Dynamic RAMs (DRAMs) to cope with increasing data and co
 de sizes of modern designs. However\, memory controller design has so far 
 largely focused on improving average-case performance. As a consequence\, 
 the latency of memory accesses is unpredictable\, which complicates the wo
 rst-case...
DTSTART:20140403T100000
DTEND:20140403T120000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Reineke - PRET DRAM controller: bank privatization for predicta
 bility and temporal isolation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3890nzXz3w@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 13 March 2014 - Amphi H\, Ensimag\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Amphi H\, Ensimag\n\nMatthieu Moy\, Verimag\nhttp://www-ver
 imag.imag.fr/~moy/\n\n« High-level Models for Embedded Systems » \n\nR
 ésumé :\n\n  Les systèmes embarqués modernes ont atteint un niveau de 
 complexité\n  qui fait qu'il n'est plus possible d'attendre les premiers
 \n  prototypes physiques pour valider les décisions sur l'intégration\n 
  des composants matériels et logiciels. Il est donc nécessaire\n  d'util
 iser des modèles\, tôt dans le flot de conception.\n  Les travaux prése
 ntés dans ce document contribuent à l'état de l'art\n  dans plusieurs d
 omaines.\n\n ...
DTSTART:20140313T140000
DTEND:20140313T160000
DURATION:PT02H0M0S
LOCATION:Amphi H\, Ensimag
SUMMARY:Matthieu Moy - High-level Models for Embedded Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38929tK2K6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 February 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nEugene Asarin\, LIAFA \nhtt
 p://www.liafa.jussieu.fr/~asarin/\n\n« Toward a Timed Theory of Channel C
 oding » \n\nAbstract:\n\nDuring last five years we are working on entropy
  of timed languages. In this talk\, based on our FORMATS'12 paper\, we wil
 l briefly recall this notion and present our ideas on applying the entropy
  to  transmission of hybrid (discrete-analog) information over channels.  
 \n\nThe classical theory of constrained-channel coding deals with the foll
 owing questions: given two languages representing a source and a channel\,
  is it...
DTSTART:20140227T140000
DTEND:20140227T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Eugene Asarin - Toward a Timed Theory of Channel Coding
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38945ocVWD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 14 February 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nFranck Cassez\, NICTA\, Sydne
 y\, Australie\nhttp://www.irccyn.fr/franck/\n\n«  A compositional approac
 h to inter-procedural analysis » \n\nAbstract:\n\nWe address the problem 
 of analysing inter-procedural programs without inlining function calls.\nJ
 oint work with Christian Müller and Karla Burnett (more detailed abstract
  to come).\n\n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Ve
 rimag-Seminars\,62.html?lang=en\nLocation/Vision: salle A. Turing CE4 -...
DTSTART:20140214T140000
DTEND:20140214T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Franck Cassez -  A compositional approach to inter-procedural analy
 sis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3897jDCJ64@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  7 February 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\n 	Victor   	Magron \, LAAS \n
 \n\n« Formal Certificates for Nonlinear Inequalities » \n\nAbstract:\n\n
 In this talk\, I will present a general framework to provide valid\ncertif
 icates for nonlinear real inequalities\, defined by semialgebraic or\ntran
 scendental expressions and to prove the correctness of these\ncertificates
  inside the Coq proof system.\n\nThe application range for such a tool is 
 widespread\; for instance Hales\\\'\nproof of Kepler\\\'s conjecture invol
 ves thousands of nonlinear inequalities.\nThe functions we are dealing wit
 h are...
DTSTART:20140207T140000
DTEND:20140207T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY: 	Victor   	Magron  - Formal Certificates for Nonlinear Inequalitie
 s
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-38990JjAfz@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 February 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nNajah Ben Said\, Verimag\n
 \n\n« Information Flow Security in Component-Based Systems.  » \n\nAbstr
 act:\n\nThe amount and complexity of nowadays conceived systems and softwa
 re knows a continuous increase and ensuring information security in these 
 systems is also paramount. Information flow security policies are very ade
 quate and quite used to track the circulation of sensitive information thr
 oughout the system. The application of global constraints on the system?s 
 information flow allows  to ensure event and data confidentiality and inte
 grity.  In...
DTSTART:20140206T140000
DTEND:20140206T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Najah Ben Said - Information Flow Security in Component-Based Syste
 ms.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3902XMCdKh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 February 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n15:00 - Salle : salle A. Turing CE4\n\nAli Kassem\, Verimag\n\n\n
 « Formal Security Analysis for Routing  Protocols and E-exams » \n\nAbst
 ract:\n\n    Security protocols aim at securing communications over public
  net-\nworks. Their design is error-prone and not an easy task. Formal\nme
 thods have shown their usefulness for providing a careful security\nanalys
 is and discovering flaws if exist. We make some contributions\nin security
  analysis of routing protocols and e-exams.\n    First\, we work on route 
 validity in ad-hoc networks. We consider\nthe non-cooperative attacker mod
 el to...
DTSTART:20140206T150000
DTEND:20140206T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ali Kassem - Formal Security Analysis for Routing  Protocols and E-
 exams
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3904m2LCuV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nAbhinav Srivastav\, Verimag
 \n\n\n« Multi-objective scheduling for multi-core systems  » \n\nAbstrac
 t:\n\nThe aim of this thesis is to study the scheduling problems in contex
 t of multi-objectives. Most of the problem pertaining to scheduling on mul
 ti-core machines are NP hard. Therefore\, we are interested in finding the
  good approximations for such problems. One such problem that we consider 
 here is the construction of pareto optimal front for jobshop problem with 
 stretch for each job as quality of service. In this presentation\, I will 
 discuss...
DTSTART:20140130T150000
DTEND:20140130T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Abhinav Srivastav - Multi-objective scheduling for multi-core syste
 ms
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3907gSFIJX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nSouha Ben Rayana\, Verimag\n
 \n\n« Compositional Verification of Component- Based Real-time Systems an
 d Applications » \n\nAbstract:\n\nThe aim of this thesis is to overcome t
 he state-space explosion problem related to the verification of timed syst
 ems with great number of components. Some methods for compositional verifi
 cation where proposed for untimed systems. However\, for timed systems\, a
 nother important  issue is encountered. In fact\, the main difficulty with
  compositional verification of timed system is that calculating the local 
 invariant of...
DTSTART:20140123T140000
DTEND:20140123T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Souha Ben Rayana - Compositional Verification of Component- Based R
 eal-time Systems and Applications
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3909cc6vmt@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n16:00 - Salle : salle A. Turing CE4\n\nAlexios Lekidis\, Verimag\n
 \n\n« Model-based design in sensor network systems » \n\nAbstract:\n\nSe
 nsor networks have emerged as a dominant technology over the last years. S
 ince they are used in a vast variety of applications\, the main arising ch
 allenge is to provide efficient design solutions ensuring limited communic
 ation cost and energy consumption\, manageable complexity and reduced fail
 ure rate. A well-known formalism\, considering all these constraints\, is 
 model-based design since it allows the simulation and validation of...
DTSTART:20140123T160000
DTEND:20140123T170000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexios Lekidis - Model-based design in sensor network systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3912bvECkn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nAlexis Fouilhe\, Verimag\n\n
 \n« Verifying numerical static analysis results with a proof assistant 
 » \n\nAbstract:\n\nThis talk will give an overview of my PhD work\, both 
 accomplished an\nprojected.  The main focus is on adapting existing numeri
 cal static\nanalysis techniques so that their result can be proved correct
  using\nthe Coq proof assistant.\nTo start with\, a lightweight approach t
 o proving the correctness of an\nimplementation of the abstract domain of 
 polyhedra will be described.\nI will then move to ongoing and projected wo
 rk. Handling...
DTSTART:20140123T150000
DTEND:20140123T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexis Fouilhe - Verifying numerical static analysis results with a
  proof assistant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3914H4gkc6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n16:00 - Salle : salle A. Turing CE4\n\nIrini-Eleftheria Mens\, Veri
 mag\n\n\n« Learning Regular Languages over Large Alphabets » \n\nAbstrac
 t:\n\nIn this work we developed  a generic algorithm for learning regular 
 languages defined over a large alphabet &#931\;. Such an alphabet can be i
 nfinite\, like N or R or just so large that it is impossible or impractica
 l to treat it in an enumerative way. The obvious solution is to use a symb
 olic representation where transitions are labeled by predicates which are 
 applicable to the alphabet in question. Learning algorithms infer an autom
 aton from a...
DTSTART:20140116T160000
DTEND:20140116T170000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Irini-Eleftheria Mens - Learning Regular Languages over Large Alpha
 bets
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3917UXBTTM@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nJan Lanik\, Verimag\n\n\n« 
 Switching reduction in sequential circuits » \n\nAbstract:\n\nThe power c
 onsumed by switching of logical elements is one of the most important cont
 ributors to the power consumption of modern CMOS chips. We investigate met
 hods to reduce the switching that could be used in EDA tools.\n\n\n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther 
 seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html
 ?lang=en\nLocation/Vision: salle A. Turing CE4 -...
DTSTART:20140116T150000
DTEND:20140116T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Lanik - Switching reduction in sequential circuits
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3919ikvfKm@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nOzgun Pinarer\, Verimag\n\n
 \n« Estimation of energy consumption of embedded system network  » \n\nA
 bstract:\n\nEmbedded system networks are built up by sets of nodes which a
 re communicating with each other. Each of these nodes has some hardware re
 strictions like limited memory\, microprocessor\, battery and autonomy. Wi
 th regard to autonomy\, it is crucial to be able to accurately estimate th
 e energy consumption of these systems\, both before deployment (for a pred
 iction of life time)\, and while running (to adapt their behavior dependin
 g on the energy...
DTSTART:20140116T140000
DTEND:20140116T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ozgun Pinarer - Estimation of energy consumption of embedded system
  network
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3922G00ZGK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  7 January 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nCorneliu Popeea\, Technische 
 Universitaet Muenchen\nhttp://www7.in.tum.de/~popeea/\n\n« Automated veri
 fication of multi-threaded programs (Automated verification of multi-threa
 ded programs) » \n\nRésumé :\n\nMy research aims to provide techniques 
 for building automated\nverification technology for the multi-core computi
 ng era. The last\nfifteen years have provided significant progress in how 
 automated\nverification technology helps in building sequential software. 
 Despite\nthis success\, and despite significant advances in testing\nmulti
 -threaded...
DTSTART:20140107T140000
DTEND:20140107T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Corneliu Popeea - Automated verification of multi-threaded programs
  (Automated verification of multi-threaded programs)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3924uLbiBX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 December 2013 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - S
 alle : CTL\n\nYvan Rivierre\, VERIMAG\nhttp://www-verimag.imag.fr/~rivierr
 e/\n\n« Algorithmes auto-stabilisants pour la construction de structures 
 couvrantes réparties (Self-Stabilizing Algorithms for Constructing Distri
 buted Spanning Structures) » \n\nRésumé :\n\nCette thèse s’intéress
 e à la construction auto-stabilisante de structures couvrantes dans un sy
 stème réparti. L’auto-stabilisation est un paradigme pour la toléranc
 e aux fautes dans les algorithmes répartis. Plus précisément\, elle gar
 antit que le système retrouve un comportement correct en temps fini apr
 ès avoir...
DTSTART:20131212T133000
DTEND:20131212T153000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Yvan Rivierre - Algorithmes auto-stabilisants pour la construction 
 de structures couvrantes réparties (Self-Stabilizing Algorithms for Const
 ructing Distributed Spanning Structures)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3927BDFUX3@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  9 December 2013 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nGiuseppe Lipari\, LSV et Scuo
 la Superiore Sant'Anna\, Pisa\nhttp://retis.sssup.it/~lipari/\n\n« Hierar
 chical scheduling and component-based analysis of real-time systems  » \n
 \nAbstract:\n\nThe complexity of modern embedded real-time systems is cons
 tantly\nincreasing\, as new and more complex functionality is added to exi
 sting\nsoftware. At the same time\, due to the increasing computational po
 wer\nof the hardware platforms and to the pressure to reduce the costs\,\n
 software that in the past was run on different computational nodes\, is\nn
 ow being...
DTSTART:20131209T140000
DTEND:20131209T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Giuseppe Lipari - Hierarchical scheduling and component-based analy
 sis of real-time systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3929pcJUA1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 25 November 2013 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n11:30 - Salle : salle A. Turing CE4\n\nMahfuza Farooque\, École pol
 ytechnique\nhttp://www.lix.polytechnique.fr/~mahfuza/\n\n« A Bisimulation
  between DPLL(T) and a Proof-Search Strategy for the Focused Sequent Calcu
 lus » \n\nAbstract:\n\nWe describe how the Davis-Putnam-Logemann-Loveland
  procedure DPLL is bisimilar to the goal-directed proof-search mechanism d
 escribed by a standard but carefully chosen sequent calculus. We thus rela
 te a procedure described as a transition system on states to the gradual c
 ompletion of incomplete proof-trees.\nFor this we use a focused sequent ca
 lculus...
DTSTART:20131125T113000
DTEND:20131125T123000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mahfuza Farooque - A Bisimulation between DPLL(T) and a Proof-Searc
 h Strategy for the Focused Sequent Calculus
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3932shClGc@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 25 November 2013 - Amphiteatre Maiso
 n Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Amphiteatre Maison Jean Kuntzmann\n\nJa
 nnik Dreier\, VERIMAG\nhttp://www-verimag.imag.fr/~dreier/\n\n« Vérifica
 tion formelle des protocoles de vote et de vente aux enchères: De l'anony
 mat à l'équité et la vérifiabilité (Formal Verification of Voting and
  Auction Protocols: From Privacy to Fairness and Verifiability) » \n\nR
 ésumé :\n\nDans cette thèse nous étudions formellement la sécurité d
 es protocoles de vote et d’enchère en ligne. Le vote en ligne est utili
 sé en Estonie et dans certaines régions de la Suisse. D’autre part\, l
 es enchères...
DTSTART:20131125T140000
DTEND:20131125T170000
DURATION:PT03H0M0S
LOCATION:Amphiteatre Maison Jean Kuntzmann
SUMMARY:Jannik Dreier - Vérification formelle des protocoles de vote et de
  vente aux enchères: De l'anonymat à l'équité et la vérifiabilité (F
 ormal Verification of Voting and Auction Protocols: From Privacy to Fairne
 ss and Verifiability)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3935ZSLH3S@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 October 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nMirko Fiacchini\, GIPSA-lab\
 , Grenoble\nhttp://www.gipsa-lab.grenoble-inp.fr/page_pro.php?vid=1757\n\n
 « Set-theory and invariance for complex systems » \n\nAbstract:\n\nThe p
 roblem of characterizing the regions of stability and convergence\, i.e. t
 he domains of attraction\, underlies most of the results in control theory
 \, as stability and convergence are usually essential properties of a cont
 rol law. Also the Lyapunov theory for stability\, for instance\, is implic
 itly concerned with the characterization of the regions of the state space
  where...
DTSTART:20131031T140000
DTEND:20131031T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mirko Fiacchini - Set-theory and invariance for complex systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3937v647kC@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 September 2013 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nGarnacho Manuel\, IRIT\nht
 tp://www.irit.fr/~Manuel.Garnacho/\n\n« A Mechanized Semantic Framework f
 or Real-Time Systems » \n\nAbstract:\n\nIn this talk I will present a log
 ical framework for defining and validating real-time formalisms as well as
  reasoning methods over them. For this purpose\, at first we have implemen
 ted in the Coq proof assistant well known semantic domains for real-time s
 ystems based on transitions systems and timed runs. We experiment our fram
 ework by considering the real-time CSP-based language FIACRE\, which has b
 een defined...
DTSTART:20130926T140000
DTEND:20130926T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Garnacho Manuel - A Mechanized Semantic Framework for Real-Time Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3940dEuZZj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 16 September 2013 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nJean Quilbeuf\, Verimag\nhttp://www-veri.imag.fr/~quilbeuf\n
 \n«  Implantations distribuées de modèles à base de composants communi
 cants par interactions multiparties avec priorités : application au langa
 ge BIP.  (Distributed Implementations of Component-based Systems with Prio
 ritized Multiparty Interactions. Application to the BIP Framework.) » \n
 \nRésumé :\n\nLes nouveaux systèmes ont souvent recours à une impléme
 ntation distribuée du logiciel\, pour des raisons d'efficacité et à cau
 se de l'emplacement physique de certains capteurs et actuateurs. S'assurer
  de la...
DTSTART:20130916T140000
DTEND:20130916T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Jean Quilbeuf -  Implantations distribuées de modèles à base de 
 composants communicants par interactions multiparties avec priorités : ap
 plication au langage BIP.  (Distributed Implementations of Component-based
  Systems with Prioritized Multiparty Interactions. Application to the BIP 
 Framework.)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3942CP2ku5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 July 2013 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nGaël Thomas\, Paris VI / LIP6
 \nhttp://pagesperso-systeme.lip6.fr/Gael.Thomas/\n\n« A Study of the Scal
 ability of Stop-the-world Garbage Collectors on Multicores » \n\nAbstract
 :\n\nLarge-scale multicore architectures create new challenges for garbage
 \ncollectors (GCs). In particular\, throughput-oriented stop-the-world\nal
 gorithms demonstrate good performance with a small number of cores\,\nbut 
 have been shown to degrade badly beyond approximately 8 cores on a\n48-cor
 e with OpenJDK 7. This negative result raises the question\nwhether the st
 op-the-world...
DTSTART:20130718T140000
DTEND:20130718T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gaël Thomas - A Study of the Scalability of Stop-the-world Garbage
  Collectors on Multicores
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-39457RVZ4X@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 July 2013 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nSriram Sankaranarayanan\, Unive
 rsity of Colorado at Boulder\nhttp://www.cs.colorado.edu/~srirams/\n\n« I
 nvariance and Termination for Probabilistic Programs using Martingales. 
 » \n\nAbstract:\n\nProbabilistic programs are standard imperative program
 s enriched with constructs to generate random values according to a pre-sp
 ecified distribution. Such programs are common in a variety of application
  domains\, including risk assessment\, biological systems\, sensor fusion 
 algorithms and randomized algorithms.\n\nWe present deductive techniques f
 or the...
DTSTART:20130711T140000
DTEND:20130711T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sriram Sankaranarayanan - Invariance and Termination for Probabilis
 tic Programs using Martingales.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3948GWpwju@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 10 July 2013 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nXiaomu Shi\, VERIMAG UJF\n\n\n« Certification d'un simulateur 
 de jeu d'instructions (Certification of an Instruction Set Simulator) » 
 \n\nRésumé :\n\nCette thèse expose nos travaux de certification d'une p
 artie d'un\nprogramme C/C++ nommé SimSoC (Simulation of System on Chip)\,
  qui\nsimule le comportement d'architectures basées sur des processeurs t
 els\nque ARM\, PowerPC\, MIPS ou SH4. Un tel simulateur peut être utilis
 é\npour developper le logiciel d'un système embarqué spécifique\, afin
  de\nraccourcir les phases des développement et de test\, en particulier
 \nquand la...
DTSTART:20130710T140000
DTEND:20130710T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Xiaomu Shi - Certification d'un simulateur de jeu d'instructions (C
 ertification of an Instruction Set Simulator)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3950uLJgXJ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 June 2013 - salle A. Pnueli CE
 3\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Pnueli CE3\n\nKlaus Draeger\, University of O
 xford\nhttp://www.cs.ox.ac.uk/people/klaus.draeger/\n\n« Synchronization 
 Invariants » \n\nAbstract:\n\nInvariants are an important tool for the ve
 rification of\ncomplex systems. One very simple class of invariants for co
 mpositional\nreasoning is given by linear constraints on the occurrences o
 f\nsynchronization sequences. This class of invariants exhibits some\nquit
 e interesting properties\, including connections to mathematical\nfields s
 uch as topology. I am currently investigating generalizations\nof these co
 ncepts to...
DTSTART:20130627T140000
DTEND:20130627T151500
DURATION:PT01H15M0S
LOCATION:salle A. Pnueli CE3
SUMMARY:Klaus Draeger - Synchronization Invariants
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-39529SkucW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Wednesday 19 June 2013 -  salle Remy Lemaire (
 K223) à l'Institut Néel\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n13:15 - Salle :  salle Remy Lemaire (K223) à 
 l'Institut Néel\n\nJessy Clédière\, CEA-Grenoble LETI DSIS STCS CESTI\n
 \n\n« Treize années au Centre d'Evaluation de la Sécurité des Technolo
 gies de l'Information du CEA-Grenoble (CESTI-Léti) » \n\nRésumé :\n\nV
 ous êtes cordialement invité à ma soutenance d'HDR intitulée « Treize
  années au Centre d'Evaluation de la Sécurité des Technologies de l'Inf
 ormation du CEA-Grenoble (CESTI-Léti) » qui aura lieu le 19 juin prochai
 n à 13h15. \n\nLieu : \nsalle Remy Lemaire (K223) à l'Institut Néel (CN
 RS\, 25...
DTSTART:20130619T131500
DTEND:20130619T151500
DURATION:PT02H0M0S
LOCATION: salle Remy Lemaire (K223) à l'Institut Néel
SUMMARY:Jessy Clédière - Treize années au Centre d'Evaluation de la Séc
 urité des Technologies de l'Information du CEA-Grenoble (CESTI-Léti)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3955tsfesW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 11 June 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:30 - Salle : salle A. Turing CE4\n\nChristian von Essen\, Verimag\n
 \n\n« Of Markov Decision Processes and Airborne Collisions » \n\nAbstrac
 t:\n\nAirspace collision avoidance systems have a long history. The severa
 l revisions\nof TCAS (Traffic Collision Avoidance System) have been mandat
 ory on medium\nand large airplanes for decades.\nFor the next generation o
 f TCAS (called ACAS-X)\, developed by MIT Licoln Labs\,\nquantitative synt
 hesis techniques are employed.\nIn this talk\, we will present this system
  from the perspective of Model\nChecking. We will present several question
 s that have...
DTSTART:20130611T143000
DTEND:20130611T151000
DURATION:PT0H40M0S
LOCATION:salle A. Turing CE4
SUMMARY:Christian von Essen - Of Markov Decision Processes and Airborne Col
 lisions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3957aDG93c@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 May 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nChantal Keller\, Laboratoire d'i
 nformatique de l'X\nhttp://www.lix.polytechnique.fr/~keller/\n\n« A Modul
 ar Integration of SAT/SMT Solvers to Coq through Proof Witnesses » \n\nAb
 stract:\n\nIn this talk\, I will present a way to enjoy the power of SAT a
 nd SMT\nprovers in Coq without compromising soundness. This requires these
 \nprovers to return not only a yes/no answer\, but also a proof witness\nt
 hat can be independently rechecked. We present such a checker\, written\na
 nd fully certified in Coq. It is conceived in a modular way\, in order\nto
  tame the...
DTSTART:20130530T140000
DTEND:20130530T151500
DURATION:PT01H15M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chantal Keller - A Modular Integration of SAT/SMT Solvers to Coq th
 rough Proof Witnesses
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3960bc9E5M@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 May 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n16:00 - Salle : salle A. Turing CE4\n\nAdam Halasz\, West Virginia Univ
 ersity\nhttp://www.math.wvu.edu/~halasz/\n\n« Challenges and possible str
 ategies in the modeling of signal initiation by membrane bound receptors 
 » \n\nAbstract:\n\nProgress in the systems biology of cells has been driv
 en by novel experimental methods\, made possible by advances in DNA manipu
 lation\, signal processing\, and data handling capacities. In recent years
 \, it is becoming clear that the amount of investment and of the accumulat
 ed data are not matched by the level of predictive insight or clinical ben
 efits derived...
DTSTART:20130523T160000
DTEND:20130523T180000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Adam Halasz - Challenges and possible strategies in the modeling of
  signal initiation by membrane bound receptors
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3962FlRLc6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  6 May 2013 - Amphitéâtre MJK\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14
 :00 - Salle : Amphitéâtre MJK\n\nEmmanuel Sifakis\, Verimag/UJF\n\n\n« 
 Programmation efficace et sécurisé d'applications à mémoire partagée 
 (Towards efficient and secure shared memory applications) » \n\nRésumé 
 :\n\nL'utilisation massive des plateformes multi-cœurs et multi-processeu
 rs a pour effet\nde favoriser la programmation parallèle à mémoire part
 agée. Néanmoins\, exploiter\nefficacement et de manière correcte le par
 allélisme sur ces plateformes reste un\nproblème de recherche ouvert.\nD
 e plus\, leur modèle d'exécution sous-jacent\, et notamment les modèles
  de...
DTSTART:20130506T140000
DTEND:20130506T160000
DURATION:PT02H0M0S
LOCATION:Amphitéâtre MJK
SUMMARY:Emmanuel Sifakis - Programmation efficace et sécurisé d'applicati
 ons à mémoire partagée (Towards efficient and secure shared memory appl
 ications)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-396508bBok@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 26 April 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nZhoulai Fu\, IMDEA Madrid\nhttp:
 //software.imdea.org/people/zhoulai.fu/index.html\n\n« Picking up your ta
 rgets --- aggressive strong update beyond common sense » \n\nAbstract:\n
 \nStrong update --- the assignments overwrite the contents of the target p
 roperty\,\n is essential for precise static analysis of  memory operations
 . Classically\,\nthe strong update is safe  if such assignment will defini
 tely occur and that it\nassigns to a unique location.\n\nWe find that this
  classic safety condition  of strong update can be weakened if\nwe semanti
 cally...
DTSTART:20130426T140000
DTEND:20130426T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Zhoulai Fu - Picking up your targets --- aggressive strong update b
 eyond common sense
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3968ChBOWp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 April 2013 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nDeshmukh Jyotirmoy\, Toyota \n
 http://www.cerc.utexas.edu/~jyotirmoy/\n\n« Mining Temporal Requirements 
 of an Industrial-Scale Control System » \n\nAbstract:\n\nIndustrial-scale
  control systems are often developed in the model-based design paradigm. T
 his typically involves capturing a plant model that describes the dynamica
 l characteristics of the physical processes within the system\, and a cont
 roller model\, which is a block-diagram-based\nrepresentation of the softw
 are used to regulate the plant behavior. In practice\, plant models and co
 ntroller...
DTSTART:20130425T140000
DTEND:20130425T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Deshmukh Jyotirmoy - Mining Temporal Requirements of an Industrial-
 Scale Control System
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3970V1IHxl@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 12 April 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nFlorent Garnier\, VERIMAG\n\n\n
 « Verifying C-Programs memory faults freedom by mean of  Abstract Interpr
 etation and a-posteriori model verification » \n\nAbstract:\n\nThis work 
 presents an original technique that\nallow to guarantee that a given ANSI 
 C program is free from certain\nmemory faults. The faults we consider are 
 pervasive in such\nprograms and all C program developers as well as progra
 m users\nhave been concerned with such issues.\nIn this work\, we are trac
 king a subset of the memory faults\,\nsuch as: A memory access through\na 
 dangling...
DTSTART:20130412T140000
DTEND:20130412T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Florent Garnier - Verifying C-Programs memory faults freedom by mea
 n of  Abstract Interpretation and a-posteriori model verification
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-39735wOuJ7@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  9 April 2013 - CTL Ampitheatre\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 3:30 - Salle : CTL Ampitheatre\n\nParaskevas Bourgos\, Verimag / UJF\n\n\n
 « Flot de conception rigoureux pour la programmation de plates-formes man
 ycore (Rigorous Design Flow for Programming Manycore Platforms) » \n\nR
 ésumé :\n\nL’objectif du travail présenté dans cette thèse  est de 
 répondre à un verrou fondamental\, qui est «comment programmer d’une 
 manière rigoureuse et efficace des applications embarquées sur des plate
 formes multi-coeurs?». Cette problématique pose plusieurs défis: 1) le 
 développement d’une approche rigoureuse basée sur les modèles pour po
 uvoir...
DTSTART:20130409T133000
DTEND:20130409T153000
DURATION:PT02H0M0S
LOCATION:CTL Ampitheatre
SUMMARY:Paraskevas Bourgos - Flot de conception rigoureux pour la programma
 tion de plates-formes manycore (Rigorous Design Flow for Programming Manyc
 ore Platforms)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3975vZA8iN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 22 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nKarem Sakalla\, University of Mi
 chigan Ann Arbor\nhttp://web.eecs.umich.edu/~karem/\n\n« Saucy3: Fast Sym
 metry Discovery in Graphs » \n\nAbstract:\n\nIn this talk I will describe
  the saucy symmetry detection algorithm. The origins of Saucy can be trace
 d to our attempt to find and break the symmetries of difficult SAT instanc
 es. A CNF instance was encoded as a colored graph and passed on to a graph
  automorphism tool to find a set of symmetry generators (vertex permutatio
 ns that preserve the edge relation)  which were then used to create...
DTSTART:20130322T140000
DTEND:20130322T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Karem Sakalla - Saucy3: Fast Symmetry Discovery in Graphs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3977Zj9x9A@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 19 March 2013 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n11:00 - Salle : salle A. Turing CE4\n\nSanjit Seshia\, University of C
 alifornia\, Berkeley\nhttp://www.eecs.berkeley.edu/~sseshia/\n\n« Integra
 ting Induction and Deduction for Verification and Synthesis » \n\nAbstrac
 t:\n\nEven with impressive advances in automated formal methods\, certain
 \nproblems in system verification and synthesis remain challenging.\nExamp
 les include the verification of quantitative properties of software\ninvol
 ving constraints on timing and energy consumption\, and the\nautomatic syn
 thesis of systems from specifications. The challenges\nmainly arise from t
 hree sources:...
DTSTART:20130319T110000
DTEND:20130319T120000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sanjit Seshia - Integrating Induction and Deduction for Verificatio
 n and Synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3980cMMI5D@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n11:00 - Salle : salle A. Turing CE4\n\nRolf Ernst\, TU Braunschweig\nht
 tp://www.ida.ing.tu-bs.de/home/mitarbeiter/ernst\n\n«  Mixed critical sys
 tem design and analysis  » \n\nAbstract:\n\nWith increasing use of embedd
 ed systems in safety critical systems\, architectures and design processes
  for safety have become a primary objective in systems design. Most such s
 ystems are also time critical leading to safety and time critical systems.
  Safety standards impose strong requirements on such systems challenging s
 ystem performance and cost. Very often\, however\, only part of the functi
 ons is...
DTSTART:20130318T110000
DTEND:20130318T123000
DURATION:PT01H30M0S
LOCATION:salle A. Turing CE4
SUMMARY:Rolf Ernst -  Mixed critical system design and analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3982KHlcUe@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nWang Yi\, Uppsala University\nht
 tp://user.it.uu.se/~yi/\n\n« Scheduling and Analysis of Cyclic Mode-Switc
 hes  » \n\nAbstract:\n\nWe propose to structure the global behavior of re
 al-time systems using modes and mode switches.  In each mode\, a system is
  executing a set of real-time tasks generating resource requests\; a mode 
 switch may be triggered at any time by internal software or hardware error
 s\, or external events. During a mode switch\, the pending requests genera
 ted in the source mode should be handled in the target mode according to a
  mode change...
DTSTART:20130318T140000
DTEND:20130318T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Wang Yi - Scheduling and Analysis of Cyclic Mode-Switches
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3985A8CUsx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nWang Yi\, Uppsala University\nht
 tp://user.it.uu.se/~yi/\n\n« Scheduling and Analysis of Cyclic Mode-Switc
 hes  » \n\nAbstract:\n\nWe propose to structure the global behavior of re
 al-time systems using modes and mode switches.  In each mode\, a system is
  executing a set of real-time tasks generating resource requests\; a mode 
 switch may be triggered at any time by internal software or hardware error
 s\, or external events. During a mode switch\, the pending requests genera
 ted in the source mode should be handled in the target mode according to a
  mode change...
DTSTART:20130318T140000
DTEND:20130318T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Wang Yi - Scheduling and Analysis of Cyclic Mode-Switches
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3987gCWvoi@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  6 March 2013 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nMarc Pouzet\, UPMC / ENS\nhtt
 p://www.di.ens.fr/~pouzet/\n\n« Zélus: A Synchronous Language with ODEs 
 » \n\nAbstract:\n\nIn this talk\, I will overview the design\, semantics 
 and implementation\nof a synchronous language that mixes difference equati
 ons\, hierarchical automata\nand ODEs.\n\n\n= = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = =\nOther seminars at VERIMAG - h
 ttp://www-verimag.imag.fr/Verimag-Seminars\,62.html?lang=en\nLocation/Visi
 on: salle A. Turing CE4 - http://www-verimag.imag.fr/Plan-d-acces.html?lan
 g=fr\nTo...
DTSTART:20130306T140000
DTEND:20130306T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Marc Pouzet - Zélus: A Synchronous Language with ODEs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3990VtPKH4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 21 February 2013 - Amphi 22\, rez-
 de-chaussée de l'UFR IMAG (bat F)\n= = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = =\n14:00 - Salle : Amphi 22\, rez-de-cha
 ussée de l'UFR IMAG (bat F)\n\nValentin Perrelle\, UJF / Verimag\n\n\n« 
 Analyse Statique de Programmes Manipulant des Tableaux (Static Analysis of
  Programs Manipulating Arrays) » \n\nRésumé :\n\nL’analyse statique d
 e programmes est un domaine crucial en compilation\, en optimisation\, et 
 en validation de logiciels. Les structures de données complexes (tableaux
 \, listes\, graphes\,...)\, omniprésentes dans les programmes\, posent de
 s problèmes difficiles\, du fait qu’elles représentent des ensembles d
 e données de...
DTSTART:20130221T140000
DTEND:20130221T160000
DURATION:PT02H0M0S
LOCATION:Amphi 22\, rez-de-chaussée de l'UFR IMAG (bat F)
SUMMARY:Valentin Perrelle - Analyse Statique de Programmes Manipulant des T
 ableaux (Static Analysis of Programs Manipulating Arrays)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3992TvKR52@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nAhlem Triki\, Verimag\n\n\n
 « Seminaire doctorant » \n\nRésumé :\n\nTBA\n\n\n\n\n= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther seminars a
 t VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html?lang=en\n
 Location/Vision: salle A. Turing CE4 - http://www-verimag.imag.fr/Plan-d-a
 cces.html?lang=fr\nTo unsubscribe\, reply to this mail with UNSUBSCRIBE in
  the subject\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =
DTSTART:20130131T150000
DTEND:20130131T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ahlem Triki - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3995Mmox5V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nDario Socci \, Verimag\n\n\n
 « Seminaire doctorant » \n\nRésumé :\n\nDesign Flow for Mixed-Critical
  Applications on Multi-core Systems\n\nabstract:\nThe introduction of many
 -cores and multi-cores is leading to an increasing trend in embedded syste
 ms towards implementing multiple subsystems upon a single shared platform.
  However\, in most applications\, not all the subsystems are equally criti
 cal. Especially this observation is important when human lives depend on c
 orrect functionality\, e.g. in avionics systems. In mixed criticality syst
 ems...
DTSTART:20130131T140000
DTEND:20130131T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Dario Socci  - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-3997Bgeisn@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:30 - Salle : salle A. Turing CE4\n\nAyoub Nouri \, Verimag\n\n\n
 « Seminaire doctorant » \n\nRésumé :\n\nTowards an Integrated Approach
  for Performance Evaluation of Embedded Systems : Statistical Model Checki
 ng and Learning-based Abstraction.\n\nWe are trying in this work to combin
 e Statistical Model Checking with abstraction based on Learning techniques
  to make the former technique more scalable. In the same time we are doing
  code generation targeting multicolor platforms to be able to get real met
 rics from physical platform or accurate simulators to make the models to b
 e checked...
DTSTART:20130124T153000
DTEND:20130124T163000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ayoub Nouri  - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40003E2uo5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n13:30 - Salle : salle A. Turing CE4\n\nJulien Henry\, Verimag\n\n\n
 « Seminaire doctorant » \n\nRésumé :\n\nTitre : Analyse statique par i
 nterprétation abstraite et procédures de décision.\n\nL'interprétation
  abstraite est une technique classique d'analyse statique qui permet de ca
 lculer une sur-approximation des état atteignables d'un programme. Cette 
 sur-approximation peut être rendue plus précise en distinguant tous les 
 chemins à l'intérieur des boucles\, mais cette énumération de chemins 
 a un coût exponentiel. L'utilisation de techniques SMT permet d'éviter e
 n...
DTSTART:20130124T133000
DTEND:20130124T143000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Julien Henry - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4002MCfipp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:30 - Salle : salle A. Turing CE4\n\nRaphael  Jamet\, Verimag\n\n
 \n« Seminaire doctorant » \n\nRésumé :\n\nSecure and resilient protoco
 ls for wireless sensor\n\nThe goal for this thesis is to build and analyze
  secure protocols for wireless sensor networks. The inherent limitations o
 f these platforms cause a lot of security challenges when compared to trad
 itional networks\, and thus\, we need to find new ways of achieving securi
 ty. We will first present our work on neighborhood detection\, where we de
 veloped a model for the verification of k-neighborhoods in WSNs\, and prop
 osed a new...
DTSTART:20130124T143000
DTEND:20130124T153000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Raphael  Jamet - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4005txkKC0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 16 January 2013 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nPrabhakar Pavithra\, IMDEA\
 , Spain\nhttp://www.software.imdea.org/people/pavithra.prabhakar/index.htm
 l\n\n« Approximation based Verification of Hybrid Systems » \n\nAbstract
 :\n\nThe increasing demand for automation in safety-critical applications 
 such as aeronautics\, automotive\, industrial process control\, medical de
 vices and so on\, has pressurized the need for scalable formal analysis te
 chniques for ensuring reliable and error-free operation of the systems. A 
 unique feature of these systems is the mixed discrete continuous behaviors
  they exhibit\,...
DTSTART:20130116T140000
DTEND:20130116T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Prabhakar Pavithra - Approximation based Verification of Hybrid Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4007FAnm5D@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  7 December 2012 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nRomain Testylier\, UJF\n\n\n« Reachability analysis of nonlin
 ear dynamical systems » \n\nAbstract:\n\nThis thesis is concerned with sa
 fety verification of hybrid systems\, which are a common mathematical mode
 l for describing systems integrating both continuous and discrete dynamics
 . They found applications in various domains such that embedded systems an
 d biological systems.\n\nBesides the undecidability of the verification pr
 oblem for even hybrid systems with simple dynamics\, the main difficulty i
 n applying the standard approaches (which have been successful for hardwar
 e and...
DTSTART:20121207T140000
DTEND:20121207T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Romain Testylier - Reachability analysis of nonlinear dynamical sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4010KBLJZP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n15:00 - Salle : salle A. Turing CE4\n\nIrina Asavoae\, University 
 Alexandru Ioan Cuza\, Iasi\, Romania\n\n\n« Bounded Model Checking of Rec
 ursive Programs with Pointers in K Abstract » \n\nAbstract:\n\nWe present
  an adaptation of the model checking pushdown systems to semantics-based v
 erification. First we introduce the algebraic notion of pushdown systems 
 specifications (PSS) and adapt a model checking algorithm for this new no
 tion. Then we instantiate everything in the K framework\, namely we show w
 hy K is a suitable environment for PSS. Finally\, we give a parametric K s
 pecification...
DTSTART:20121206T150000
DTEND:20121206T160000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Irina Asavoae - Bounded Model Checking of Recursive Programs with P
 ointers in K Abstract
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40126HORtN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nMihail Asavoae\, University
  Alexandru Ioan Cuza\, Iasi\, Romania   \n\n\n« Semantics-Based WCET Anal
 ysis » \n\nAbstract:\n\nWe propose a general methodology for worst-case e
 xecution time (WCET) analysis centered around a formal executable semantic
 s of the underlying programming language. We assert that a formal definiti
 on of a language has all the necessary information to be used for program 
 analysis and verification\, therefore we define\, in a rewrite-based frame
 work called K\, a formal executable semantics of a MIPS-based assembly lan
 guage. This...
DTSTART:20121206T140000
DTEND:20121206T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mihail Asavoae - Semantics-Based WCET Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4015msO3Zd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  9 November 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nDamien Massé\, Université d
 e Bretagne Occidentale (Brest)\nhttp://www.lisyc.univ-brest.fr/pages_perso
 /dmasse/\n\n« Inférences de propriétés de terminaison par itération d
 e stratégies » \n\nRésumé :\n\nDans le cadre de l'interprétation abst
 raite\, les techniques d'itérations de polices (ou de stratégies) ont 
 été proposées comme alternative à la méthode classique d'élargisseme
 nt/rétrécissement pour approximer des points fixes avec une précision a
 ccrue. Nous étudions ici l'application de ces techniques à la surapproxi
 mation de...
DTSTART:20121109T140000
DTEND:20121109T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Damien Massé - Inférences de propriétés de terminaison par it
 ération de stratégies
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40175LXput@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Tuesday  6 November 2012 - Maison Jean Kuntzma
 nn\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : Maison Jean Kuntzmann\n\nPascal Lafourcade\, Verimag
 \nhttp://www-verimag.imag.fr/~plafourc/\n\n« Sécurité assisté par ordi
 nateur pour les primitives cryptographiques\, les protocoles de vote élec
 troniques et les réseaux de capteurs sans fil (Computer Aided Security fo
 r Cryptographic Primitives\, Voting protocols\, and Wireless Sensor Networ
 ks) » \n\nRésumé :\n\nLa sécurité est une des préoccupations princip
 ales de l’informatique moderne. De plus en plus de personnes utilisent u
 n ordinateur pour des opérations sensibles comme pour des transferts banc
 aires\, des...
DTSTART:20121106T100000
DTEND:20121106T130000
DURATION:PT03H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Pascal Lafourcade - Sécurité assisté par ordinateur pour les pri
 mitives cryptographiques\, les protocoles de vote électroniques et les r
 éseaux de capteurs sans fil (Computer Aided Security for Cryptographic Pr
 imitives\, Voting protocols\, and Wireless Sensor Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4020KEkdjl@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 29 October 2012 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nJean-François KEMPF\, VERIMAG\n\n\n« Exploration de l'espace 
 de design assistée par ordinateur pour les systèmes multi-coeurs (On Com
 puter-Aided Design-Space Exploration for Multi-Cores) » \n\nRésumé :\n
 \nLa complexité croissante des systèmes embarqués nécessite des formal
 ismes de modélisation qui peuvent être simulés et analysés pour explor
 er l'espace des alternatives de conception. Cette thèse décrit le dével
 oppement d'un formalisme de modélisation et des outils pour l'exploration
  de l'espace de conception à des stades précoces du développement.\nD'u
 ne part\,...
DTSTART:20121029T140000
DTEND:20121029T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Jean-François KEMPF - Exploration de l'espace de design assistée 
 par ordinateur pour les systèmes multi-coeurs (On Computer-Aided Design-S
 pace Exploration for Multi-Cores)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4022ZlFuUk@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 24 October 2012 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : CTL\n\nSelma Saidi\, VERIMAG\n\n\n« Optimizing DMA Data Transfers 
 for Embedded Multi-Cores » \n\nAbstract:\n\nMultiprocessor system on chip
  (MPSoC) such as the CELL processor or the more recent Platform2012 are he
 terogeneous multi-core architectures\, with a powerful host processor and 
 a computation fabric\, consisting of several smaller cores\, whose intende
 d role is to act as a general purpose programmable accelerator. Therefore 
 computation-intensive (and parallelizable) parts of the application initia
 lly intended to be executed by the host processor are offloaded to the mul
 ti-cores for...
DTSTART:20121024T140000
DTEND:20121024T170000
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:Selma Saidi - Optimizing DMA Data Transfers for Embedded Multi-Core
 s
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4025z1IPJx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 16 October 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n15:30 - Salle : salle A. Turing CE4\n\nGuillaume Brat\, NASA Ames\n
 \n\n« An overview of formal methods for Aeronautics at NASA » \n\nAbstra
 ct:\n\nThe US National Airspace System is undergoing a transformation to a
 ddress the dramatic increase in air traffic in the future. The FAA\, and t
 he JPDO\, have identified a certain number of operational improvements and
  infusion of technologies needed to address the problem. This effort is kn
 own as NextGen\, the Next Generation of air traffic system. Certain techno
 logy gaps have been identified for NextGen\, especially when it comes to t
 he V&V of...
DTSTART:20121016T153000
DTEND:20121016T173000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Guillaume Brat - An overview of formal methods for Aeronautics at N
 ASA
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4027u8tfvS@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  2 October 2012 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nArtur Pietrek\, VERIMAG\n\n\n« TIREX: a textual target-level 
 intermediate representation for virtual execution  environment\, compiler 
 information exchange and program analysis » \n\nAbstract:\n\nSome environ
 ments require several compilers\, for instance one for the operating syste
 m\, supporting the full C/C++ norm\, and one for the applications\, potent
 ially supporting less but able to derive more performance. Maintaining dif
 ferent compilers for a target requires considerable effort\, thus it is ea
 sier to implement and maintain target-dependent optimizations in a single\
 , external tool....
DTSTART:20121002T140000
DTEND:20121002T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Artur Pietrek - TIREX: a textual target-level intermediate represen
 tation for virtual execution  environment\, compiler information exchange 
 and program analysis
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40304MrGtD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 14 September 2012 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nRance Delong\, SRI Internati
 onal\n\n\n« MILS and DMILS project (MILS and DMILS project) » \n\nRésum
 é :\n\nPrior MILS work has focused on relatively simple applications that
  could be implemented on a single MILS node. These simple applications hav
 e used a modest number of subjects and objects\, organized into disjoint p
 artitions. The architecture of such systems has been simple enough that it
 s correspondence to the configuration of the separation kernel may be vali
 dated by inspection\, with rigorous assurance only for the correctness of 
 the kernel....
DTSTART:20120914T140000
DTEND:20120915T050000
DURATION:PT15H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Rance Delong - MILS and DMILS project (MILS and DMILS project)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4032KHm43v@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 September 2012 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nCorneliu Popeea\, Technica
 l University of Munich\nhttp://www.model.in.tum.de/~popeea/\n\n« Synthesi
 zing Software Verifiers from Proof Rules » \n\nAbstract:\n\nAutomatically
  generated tools can significantly improve programmer\nproductivity. For e
 xample\, parsers and dataflow analyzers can be\nautomatically generated fr
 om declarative specifications in the form of\ngrammars\, which tremendousl
 y simplifies the task of implementing a\ncompiler.\nIn this talk\, I will 
 present a method for the automatic synthesis of\nsoftware verification too
 ls. The...
DTSTART:20120913T140000
DTEND:20120913T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Corneliu Popeea - Synthesizing Software Verifiers from Proof Rules
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4035R8EVHv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 July 2012 - salle C. Shannon C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle C. Shannon CE4\n\nRoberto Bruttomesso\, ATRENTA
 \n\n\n« Automated Analysis of Parametric Timing-Based Mutual Exclusion Al
 gorithms » \n\nAbstract:\n\nDeadlock-free algorithms that ensure mutual e
 xclusion cru- cially\ndepend on timing assumptions. In this paper\, we des
 cribe our expe-\nrience in automatically verifying mutual-exclusion and\nd
 eadlock-freedom of the Fischer and Lynch-Shavit algorithms\, using the\nmo
 del checker modulo theories mcmt. First\, we explain how to specify\ntimin
 g-based algorithms in the mcmt input language as symbolic\ntransition syst
 ems. Then\,...
DTSTART:20120712T140000
DTEND:20120713T053000
DURATION:PT15H30M0S
LOCATION:salle C. Shannon CE4
SUMMARY:Roberto Bruttomesso - Automated Analysis of Parametric Timing-Based
  Mutual Exclusion Algorithms
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4037c8AxEu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 July 2012 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nPascal Cuoq\, CEA\nhttp://frama
 -c.com\n\n« Collaboration d\'analyses dans Frama-C » \n\nRésumé :\n\nF
 rama-C est une plateforme collaborative d\'analyse statique pour le langag
 e C. Chaque technique ou idée peut être implémentée dans Frama-C sous 
 la forme d\'un greffon.\n\nUn premier moyen de collaboration entre greffon
 s est par le langage de spécification ACSL : l\'analyse de valeurs\, un g
 reffon d\'interprétation abstraite\, insère dans le programme cible des 
 assertions ACSL pour chaque comportement indéfini qu\'elle est incapable 
 d\'exclure....
DTSTART:20120705T140000
DTEND:20120705T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pascal Cuoq - Collaboration d\'analyses dans Frama-C
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4040M2vPGd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 26 June 2012 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:30 - Salle 
 : CTL\n\nEduardo Mazza\, Verimag\n\n\n« A Formal Framework for Specifying
  and Analyzing Liabilities Using Log as Digital Evidence (A Formal Framewo
 rk for Specifying and Analyzing Liabilities Using Log as Digital Evidence)
  » \n\nRésumé :\n\nMalgré les progrès importants effectués en mati
 ère de conception de logiciels et l'existence de méthodes de développem
 ent éprouvées\, il faut reconnaître que les défaillances de systèmes 
 causées par des logiciels restent fréquentes. Il est donc important de p
 ouvoir déterminer en cas de dommages causés par des logiciels les respon
 sabilités...
DTSTART:20120626T103000
DTEND:20120626T123000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Eduardo Mazza - A Formal Framework for Specifying and Analyzing Lia
 bilities Using Log as Digital Evidence (A Formal Framework for Specifying 
 and Analyzing Liabilities Using Log as Digital Evidence)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4042DfDr5C@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 26 June 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:30 - Salle : salle A. Turing CE4\n\nGerardo Schneider\, Chalmers | U
 niversity of Gothenburg\nhttp://www.cse.chalmers.se/~gersch/\n\n« Towards
  a Framework for Conflict Analysis of Normative Texts Written in Controlle
 d Natural Language » \n\nAbstract:\n\nOur aim is to detect whether texts 
 written in natural language contain normative conflicts (i.e.\, whether th
 ere are conflicting obligations\, permissions and prohibitions). In this t
 alk I will present AnaCon\, a framework where such texts are written in a 
 Controlled Natural Language (CNL) and automatically translated into the fo
 rmal...
DTSTART:20120626T143000
DTEND:20120626T153000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gerardo Schneider - Towards a Framework for Conflict Analysis of No
 rmative Texts Written in Controlled Natural Language
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4045KFtUE2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 June 2012 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nJean-Christophe Filliâtre\, CN
 RS / LRI\nhttp://www.lri.fr/~filliatr/index.fr.html\n\n« Combining Intera
 ctive and Automated Theorem Proving in Why3 » \n\nAbstract:\n\nWhy3 is a 
 platform for deductive program verification. It features a rich logical la
 nguage with polymorphism\, algebraic data types\, and inductive predicates
 . Why3 provides an extensive library of proof task transformations that ca
 n be chained to produce a suitable input for a large set of theorem prover
 s\, including SMT solvers\, TPTP provers\, as well as interactive proof as
 sistants. In...
DTSTART:20120621T140000
DTEND:20120621T151500
DURATION:PT01H15M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Christophe Filliâtre - Combining Interactive and Automated Th
 eorem Proving in Why3
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4048VLhe89@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 June 2012 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nGilles Muller\, LIP6 \nhttp://p
 agesperso-systeme.lip6.fr/Gilles.Muller/\n\n« Remote Core Locking: Migrat
 ing Critical-Section Execution to Improve the Performance of Multithreaded
  Applications » \n\nAbstract:\n\nThe scalability of multithreaded applica
 tions on current\nmulticore systems is hampered by the performance of\nloc
 k algorithms\, due to the costs of access contention\nand cache misses. In
  this paper\, we propose a new lock\nalgorithm\, Remote Core Locking (RCL)
  that aims to im-\nprove the performance of critical sections in legacy...
DTSTART:20120607T140000
DTEND:20120607T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gilles Muller - Remote Core Locking: Migrating Critical-Section Exe
 cution to Improve the Performance of Multithreaded Applications
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4050uwWeli@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  5 June 2012 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nTesnim Abdellatif\, Verimag\n\n\n« Rigorous Implementation of Re
 al-time Systems » \n\nAbstract:\n\nReal-time systems are systems that are
  subject to 'real-time constraints'? e.g. operational deadlines from event
  to system response. Building real-time systems\nrequires the use of desig
 n and implementation methodologies that ensure the property of meeting tim
 ing constraints e.g. a system has to react within user-defined bounds such
  as deadlines and periodicity.\n\nWe provide a rigorous design and impleme
 ntation method for real-time systems. The implementation is generated from
  a given...
DTSTART:20120605T140000
DTEND:20120605T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Tesnim Abdellatif - Rigorous Implementation of Real-time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4053wKD1sL@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  1 June 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nIan Mitchell\, VERIMAG\nhttp://w
 ww.cs.ubc.ca/~mitchell/\n\n« Scalable approximation of the viability kern
 el and safe control synthesis for LTI systems using maximal reachability 
 » \n\nAbstract:\n\nWe present a connection between the viability kernel a
 nd maximal reachable sets.  Current numerical schemes that compute the via
 bility kernel suffer from a complexity that is exponential in the dimensio
 n of the state space.  In contrast\, extremely efficient and scalable tech
 niques are available that compute maximal reachable sets.  We show that un
 der certain...
DTSTART:20120601T140000
DTEND:20120601T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ian Mitchell - Scalable approximation of the viability kernel and s
 afe control synthesis for LTI systems using maximal reachability
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4055StR9BG@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 May 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nPavol Cerny\, IST Austria\nhttp:
 //pub.ist.ac.at/~cernyp/\n\n« Quantitative Abstraction Refinement » \n\n
 Abstract:\n\nWe propose a general framework for abstraction with respect t
 o\nquantitative properties of systems\, such as worst-case execution time
 \n(WCET) or power consumption.  Our framework provides a systematic way\nf
 or counter-example guided abstraction refinement (CEGAR) for\nquantitative
  properties.  The salient aspect of the framework is that\nit allows anyti
 me verification\, that is\, verification algorithms\nthat can be stopped a
 t any time...
DTSTART:20120531T140000
DTEND:20120531T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pavol Cerny - Quantitative Abstraction Refinement
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4058l78ux6@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 29 May 2012 - CTL\n= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Salle :
  CTL\n\nRajarshi RAY\, Verimag\nhttp://www-verimag.imag.fr/~ray/\n\n« Rea
 chability Analysis of Hybrid Systems Using Support Functions » \n\nAbstra
 ct:\n\nIn model based design\, one constructs a mathematical model of the 
 system and uses it to design the system so that it exhibits the desired pr
 operties. For safety critical systems\, it can be of utmost importance to 
 verify these safety properties on the model\, e.g.\, to account for parame
 ter variations. Computing a finite number of system behaviors via simulati
 on is not sufficient to guarantee safety properties. With a reachability a
 nalysis one...
DTSTART:20120529T150000
DTEND:20120529T170000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Rajarshi RAY - Reachability Analysis of Hybrid Systems Using Suppor
 t Functions
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40609otUhR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 25 May 2012 - salle A. Turing CE4\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n14:00 - Salle : salle A. Turing CE4\n\nJohannes Reich\, SPA\n\n\n« A Sy
 stem Perspective on Processes and Their Interactions. » \n\nAbstract:\n\n
 The starting point is a view of our social world as an open network of non
 deterministic interactions between possibly deterministic systems. From an
  engineering perspective one essential question becomes  how we can descri
 be local parts of these networks without running into the unfulfillable re
 quirement to describe the network as a whole.\n \nTwo different perspectiv
 es naturally arise: an interaction centric\, providing the local borders a
 nd a...
DTSTART:20120525T140000
DTEND:20120525T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Johannes Reich - A System Perspective on Processes and Their Intera
 ctions.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4063g59TlV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 11 May 2012 - salle A. Turing CE4\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n10:00 - Salle : salle A. Turing CE4\n\nXavier Urbain\, ENSIIE\nhttp://ww
 w.ensiie.fr/~urbain/\n\n« Démonstration automatique : techniques\, outil
 s et certification. » \n\nRésumé :\n\nNotre objectif est de permettre l
 a vérification de programme à l'aide de méthodes fondées sur la preuve
  et aussi automatisées que possible. Je me concentrerai sur la preuve d'u
 ne propriété : la *terminaison*\, dans des formalismes à base de récri
 ture.\n  J'esquisserai tout d'abord un panel de techniques pour la preuve 
 de terminaison\, adaptées à différentes extensions qui\, de proche en p
 roche\, mènent...
DTSTART:20120511T100000
DTEND:20120511T120000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Xavier Urbain - Démonstration automatique : techniques\, outils et
  certification.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4065kEhWnK@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  9 May 2012 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nPierre Ganty\, IMDEA (Madrid)\n
 http://software.imdea.org/people/pierre.ganty/\n\n« A Perfect Model for B
 ounded Verification (A Perfect Model for Bounded Verification) » \n\nRés
 umé :\n\nA class of languages C is perfect if it is closed under\nBoolean
  operations and the emptiness problem is decidable. Perfect\nlanguage clas
 ses are the basis for the automata-theoretic approach to\nmodel checking: 
 a system is correct if the language generated by the\nsystem is disjoint f
 rom the language of bad traces. Regular languages\nare perfect\, but becau
 se the...
DTSTART:20120509T140000
DTEND:20120509T150000
DURATION:PT01H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pierre Ganty - A Perfect Model for Bounded Verification (A Perfect 
 Model for Bounded Verification)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4068bkGXCt@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 April 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nLaura Kovacs\, Technical Unive
 rsity of Vienna\nhttp://www.complang.tuwien.ac.at/lkovacs/\n\n« Playing i
 n the Grey Area of Proofs » \n\nAbstract:\n\nnterpolation is an important
  technique in verification and static\nanalysis of programs. In particular
 \, interpolants extracted from\nproofs of various properties are used in i
 nvariant generation and\nbounded model checking. A number of recent papers
  studies\ninterpolation in various theories and also extraction of smaller
 \ninterpolants from proofs. In particular\, there are several algorithms\n
 for...
DTSTART:20120405T140000
DTEND:20120405T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Laura Kovacs - Playing in the Grey Area of Proofs
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4070T2xTbW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 March 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nOded Maler\, VERIMAG\nhttp://w
 ww-verimag.imag.fr/~maler/\n\n« Performance Evaluation of Schedulers in a
  Probabilistic Setting » \n\nAbstract:\n\nWe show how to evaluate the per
 formance of solutions to finite-horizon scheduling problems where task dur
 ations are specified by bounded uniform distributions. Our computational t
 echnique\, based on computing the volumes of zones\, constitutes a contrib
 ution to the computational study of scheduling under uncertainty and stoch
 astic systems in general.\n\nJoint work with Kim Larsen\, Bruce Krogh\, Ma
 rius Bozga and...
DTSTART:20120322T140000
DTEND:20120322T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Oded Maler - Performance Evaluation of Schedulers in a Probabilisti
 c Setting
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4073vUZ0RF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 12 March 2012 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nNicolas Berthier\, Université de Grenoble\nhttp://www-verimag.im
 ag.fr/~berthier/\n\n« Programmation synchrone de pilotes de périphériqu
 es pour un contrôle global de ressources dans les systèmes embarqués (S
 ynchronous Programming of Device Drivers for Global Resource Control in Em
 bedded Systems) » \n\nRésumé :\n\nLe travail présenté porte sur la co
 nception de logiciels pour systèmes embarqués. Outre les contraintes de 
 programmation provenant des faibles quantité de mémoire et capacité de 
 calcul\, ces plates-formes matérielles ne disposent parfois que de peu d'
 énergie...
DTSTART:20120312T140000
DTEND:20120312T170000
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:Nicolas Berthier - Programmation synchrone de pilotes de périphér
 iques pour un contrôle global de ressources dans les systèmes embarqués
  (Synchronous Programming of Device Drivers for Global Resource Control in
  Embedded Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-407574TTm2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 March 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nGoran Frehse\, Verimag\n\n\n
 « Safety Analysis of Hybrid Systems with SpaceEx » \n\nAbstract:\n\nIn a
  variety of application domains such as embedded and cyber-physical system
 s\, model-based design relies on models that incorporate time-driven as we
 ll as event-driven behavior. These so-called hybrid systems are difficult 
 to analyze\, because even small errors in the analysis algorithm can lead 
 to qualitatively different behaviors.\nWe verify safety properties of hybr
 id systems by computing their reachable states. Using set-based computatio
 ns allows us...
DTSTART:20120308T140000
DTEND:20120308T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Goran Frehse - Safety Analysis of Hybrid Systems with SpaceEx
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4077VuwNsk@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  5 March 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nSriram Rajamani\, Microsoft Rese
 arch\nhttp://research.microsoft.com/en-us/people/sriram/\n\n« Program Ana
 lysis and Machine Learning: A Win-Win Deal  » \n\nAbstract:\n\nWe give an
  account of our experiences working at the intersection of two fields: pro
 gram analysis and machine learning.  In particular\, we show that machine 
 learning can be used to infer annotations for program analysis tools\, and
  that program analysis techniques can be used to improve the efficiency of
  machine learning tools.\n\nEvery program analysis tool needs annotations.
  We show...
DTSTART:20120305T140000
DTEND:20120305T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sriram Rajamani - Program Analysis and Machine Learning: A Win-Win 
 Deal
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4080h4s0J5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 March 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nJerôme Leroux \, LABRI \nhttp
 ://www.labri.fr/perso/leroux/ \n\n« Vector Addition System Reachability P
 roblem  » \n\nAbstract:\n\nThe reachability problem for Vector Addition S
 ystems (VASs) is a central problem of net theory. The general problem is k
 nown decidable by algorithms exclusively based on the classical Kosaraju-L
 ambert-Mayr-Sacerdote-Tenney decomposition (KLMTS decomposition). Recently
  from this decomposition\, we deduced that a final configuration is not re
 achable from an initial one if and only if there exists a Presburger induc
 tive...
DTSTART:20120301T140000
DTEND:20120301T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jerôme Leroux  - Vector Addition System Reachability Problem
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4082pZcp6k@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 February 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nFranck Petit\, LIP6\nhttp:/
 /pagesperso-systeme.lip6.fr/Franck.Petit/\n\n« Strength of Stabilization 
 vs. Amount of Resources » \n\nAbstract:\n\nThe amount of resources used t
 o perform a given task is a key feature in distributed systems\, especiall
 y when resource embedding is very costly.  Ad hoc and sensors networks bel
 ong to this category of distributed systems because they are supposed to b
 e made of low-power tiny devices\, requiring the smallest amount of resour
 ces as possible.  Furthermore\, such networks are expected to be larger an
 d larger\,...
DTSTART:20120223T140000
DTEND:20120223T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Franck Petit - Strength of Stabilization vs. Amount of Resources
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4085ZHKNgE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 10 February 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nLaurent George\, INRIA Rocque
 ncourt / AOSTE Team INRIA \nhttp://www-roc.inria.fr/who/Laurent.George/\n
 \n« Robustesse temporelle dans les systèmes embarqués mono et multiproc
 esseur » \n\nRésumé :\n\nLe respect de contraintes temporelles strictes
  dans un système temps réel peut être garanti par l’établissement de
  conditions de faisabilité 'pires cas'. Ces conditions de faisabilité so
 nt établies pour un système temps réel spécifié par différents mod
 èles (modèle de taches exécutées\, modèle d'ordonnancement\, modèle.
 ..
DTSTART:20120210T140000
DTEND:20120210T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Laurent George - Robustesse temporelle dans les systèmes embarqu
 és mono et multiprocesseur
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4087nx0RnO@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 February 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nJan Olaf Blech\, Fortiss\nh
 ttp://www.jblech.de/\n\n« Proof Assistant Based Certification for Modelin
 g Languages and its Application to PLC Development » \n\nAbstract:\n\nThi
 s talk gives an overview on our work on proof assistant based\ncertificati
 on of system models: We automatically generate system model\nrepresentatio
 ns for Coq out of Eclipse based modeling tools and\nprovide support for ve
 rification work on this.  The focus of the talk\nis on work for Programmab
 le Logic Controllers (PLC). PLC are widely\nused in embedded systems for t
 he...
DTSTART:20120209T140000
DTEND:20120209T160000
DURATION:PT02H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Olaf Blech - Proof Assistant Based Certification for Modeling L
 anguages and its Application to PLC Development
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4090oW712U@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 January 2012 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : CTL\n\nTom Henzinger\, IST-Austria\nhttp://www.ist.ac.at/research/r
 esearch-groups/henzinger-group/\n\n« Quantitative Reactive Modeling » \n
 \nAbstract:\n\nFormal verification aims to improve the quality of hardware
  and software by detecting errors before they do harm. At the basis of for
 mal verification lies the logical notion of correctness\, which purports t
 o capture whether or not a circuit or program behaves as desired. We sugge
 st that the boolean partition into correct and incorrect systems falls sho
 rt of the practical need to assess the behavior of hardware and software i
 n a more...
DTSTART:20120126T140000
DTEND:20120126T150000
DURATION:PT01H0M0S
LOCATION:CTL
SUMMARY:Tom Henzinger - Quantitative Reactive Modeling
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4092JiKg17@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 January 2012 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nChristian von Essen\
 , Verimag\n\n\n« Synthesizing Efficient Controllers » \n\nAbstract:\n\nI
 n many situations\, we are interested in controllers that implement a good
  trade-off between conflicting objectives. Examples of conflicting objecti
 ves are the speed of a car versus its fuel consumption\, or the transmissi
 on rate of a wireless device versus its energy consumption. In both cases\
 , we aim for a system that efficiently uses its resources.\nIn this talk I
  show how to automatically construct efficient controllers. We provide a s
 pecification...
DTSTART:20120119T140000
DTEND:20120119T143000
DURATION:PT0H30M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Christian von Essen - Synthesizing Efficient Controllers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4095rbovtV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 January 2012 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nMarion DAUBIGNARD\, VERIMAG\n\n\n« Formalisation de preuves 
 de sécurité concrète (Formal Methods for Concrete Security Proofs) » 
 \n\nAbstract:\n\nIn this thesis\, we address the lack of formalisms to car
 ry out \nconcrete security proofs. \nOur contributions are threefold.\nFir
 st\, we present a logic\, named Computational Indistinguishability \nLogic
  (CIL)\, for reasoning about cryptographic systems. It consists \nin a sma
 ll set of\nrules capturing reasoning principles common to many \nproofs.\n
 Their formalization relies\non classic tools such as bisimulation\nrelatio
 ns and...
DTSTART:20120112T140000
DTEND:20120112T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Marion DAUBIGNARD - Formalisation de preuves de sécurité concrèt
 e (Formal Methods for Concrete Security Proofs)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-40979aXeHw@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 November 2011 - Ensimag\, Amphi E
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Ensimag\, Amphi E\n\nGiovanni Funchal\, Verimag/STMicro
 electronics\nhttp://funchal.github.com/\n\n« Contributions à la Modélis
 ation Transactionnelle des Systèmes-sur-Puce (Contributions to Transactio
 n-Level Modeling of Systems-on-a-Chip) » \n\nRésumé :\n\nCette thèse p
 orte sur la modélisation des systèmes-sur-puce au niveau transactionnel\
 , une approche connue sous le nom de prototypage virtuel. Les prototypes v
 irtuels sont d'un grand intérêt industriel parce qu'ils permettent de d
 émarrer certaines activités (telles que le développement du logiciel em
 barqué) plus...
DTSTART:20111118T140000
DTEND:20111118T160000
DURATION:PT02H0M0S
LOCATION:Ensimag\, Amphi E
SUMMARY:Giovanni Funchal - Contributions à la Modélisation Transactionnel
 le des Systèmes-sur-Puce (Contributions to Transaction-Level Modeling of 
 Systems-on-a-Chip)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4100mAUO6G@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 14 November 2011 - Grande Salle de 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Grande Salle de CE4\n\nPhilippe Suter\, EPFL\nhttp:/
 /lara.epfl.ch/~psuter/\n\n« Sets with Cardinality Constraints in Satisfia
 bility Modulo Theories » \n\nRésumé :\n\n \n\nAbstract:\n\nBoolean Alge
 bra with Presburger Arithmetic (BAPA) is a decidable logic that can expres
 s constraints on sets of elements and their cardinalities. Problems from v
 erification of complex properties of software often contain fragments that
  belong to quantifier-free BAPA (QFBAPA). In contrast to many other NP-com
 plete problems (such as quantifier-free first-order logic or linear arithm
 etic)\, the...
DTSTART:20111114T140000
DTEND:20111114T153000
DURATION:PT01H30M0S
LOCATION:Grande Salle de CE4
SUMMARY:Philippe Suter - Sets with Cardinality Constraints in Satisfiabilit
 y Modulo Theories
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-41021KLnHi@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  4 October 2011 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nJulien Legriel\, VERIMAG\nhttp://www-verimag.imag.fr/~legriel/
 \n\n« Optimisation multi-critère et application aux systèmes multi-proc
 esseurs embarqués (Multi-Criteria Optimization and its Application to Mul
 ti-Processor Embedded Systems ) » \n\nRésumé :\n\nDans cette thèse nou
 s développons de nouvelles techniques pour résoudre les problèmes d'opt
 imisation multi-critère. Ces problèmes se posent naturellement dans de n
 ombreux domaines d'application (sinon tous) où les choix sont évalués s
 elon différents critères conflictuels (coûts et performance par exemple
 )....
DTSTART:20111004T140000
DTEND:20111004T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Julien Legriel - Optimisation multi-critère et application aux sys
 tèmes multi-processeurs embarqués (Multi-Criteria Optimization and its A
 pplication to Multi-Processor Embedded Systems )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4105VF5kUd@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 September 2011 - Grande Salle 
 de VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBalaji Raman\, DCS
 \, Verimag\n\n\n« On Buffering with Stochastic Guarantees in Resource-Con
 strained Media Players » \n\nAbstract:\n\nPlayout delay or buffering are 
 commonly used in the case of streaming multimedia to ensure smooth playout
 . A large delay\, however\, is required for promising a high quality in di
 splay.\nSuch significant delays consume huge on-chip memory. We show that 
 when the constraints on output are slightly relaxed\, the playout delay ne
 eded can be reduced to a negligible value with no perceivable loss in vide
 o...
DTSTART:20110915T140000
DTEND:20110915T160000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Balaji Raman - On Buffering with Stochastic Guarantees in Resource-
 Constrained Media Players
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4107nHbSwh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 July 2011 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nPierre Ganty\, IMDEA\nhttp://software.imdea.org/people/pierre.g
 anty/\n\n« Pattern-based Verification for Multithreaded Programs » \n\nA
 bstract:\n\nPattern-based verification checks the correctness of the progr
 am executions that follow a given pattern\, a regular expression over the 
 alphabet of program transitions of the form w1* ... wn*. For multithreaded
  programs\, the alphabet of the pattern is given by the synchronization op
 erations between threads. After introducing the model\, we study the compl
 exity of pattern-based verification for abstracted multithreaded. While un
 restricted...
DTSTART:20110721T140000
DTEND:20110721T150000
DURATION:PT01H0M0S
LOCATION:CTL
SUMMARY:Pierre Ganty - Pattern-based Verification for Multithreaded Program
 s
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4110gFFzce@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 June 2011 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nNathalie Bertrand\, IRISA\nhttp://www.irisa.fr/prive/nbertran/
 \n\n« Determinizing timed automata. » \n\nAbstract:\n\nTimed automata ar
 e frequently used to model real-time systems. Essentially\ntimed automata 
 are an extension of finite automata with guards and resets of\ncontinuous 
 variables (called clocks) evolving at the same pace. They are\nextensively
  used in the context of validation of real-time systems. One of\nthe reaso
 ns for this popularity is that\, despite the fact that they\nrepresent inf
 inite state systems\, their reachability is decidable\, thanks to\nthe con
 struction of...
DTSTART:20110630T140000
DTEND:20110630T150000
DURATION:PT01H0M0S
LOCATION:CTL
SUMMARY:Nathalie Bertrand - Determinizing timed automata.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-41132IBhf5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 28 June 2011 - CTL\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle
  : CTL\n\nFrancesco Logozzo\, Microsoft Research\nhttp://research.microsof
 t.com/en-us/people/logozzo/\n\n« Practical program verification for the w
 orking programmer with CodeContracts and Abstract Interpretation » \n\nAb
 stract:\n\nIn this talk I will present Clousot\, an abstract interpretatio
 n-based static analyzer to be used as verifier for the CodeContracts.\nClo
 usot is routinely used every day by many .NET programmers.\n\nIn the first
  part of the talk I will recall what contracts are (essentially preconditi
 ons\, postconditions and object invariants)\, why they are almost universa
 lly accepted...
DTSTART:20110628T140000
DTEND:20110628T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Francesco Logozzo - Practical program verification for the working 
 programmer with CodeContracts and Abstract Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4116vEFvBe@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 21 June 2011 - Amphi CTL\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : Amphi CTL\n\nVASSILIKI SFYRLA\, VERIMAG/UJF\n\n\n« Modélisation 
 des Systèmes Synchrones en BIP (Modeling Synchronous Systems in BIP) » 
 \n\nAbstract:\n\n    A central idea in systems engineering is that complex
  systems are built by assembling com-\nponents. Components have different 
 characteristics\, from a large variety of viewpoints\, each\nhighlighting 
 different dimensions of a system. A central problem is the meaningful comp
 osition\nof heterogeneous components to ensure their correct interoperatio
 n. A fundamental source of\nheterogeneity is the composition of subsystems
  with...
DTSTART:20110621T140000
DTEND:20110621T170000
DURATION:PT03H0M0S
LOCATION:Amphi CTL
SUMMARY:VASSILIKI SFYRLA - Modélisation des Systèmes Synchrones en BIP (M
 odeling Synchronous Systems in BIP)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4118JvGEn5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 May 2011 - Grande Salle de VER
 IMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nJannik Dreier\, VERIMAG
 \nhttp://www-verimag.imag.fr/~dreier/\n\n« Privacy Properties for Voting 
 Protocols: The completed picture » \n\nAbstract:\n\nExisting formal defin
 itions of privacy properties for voting protocols such as Coercion-Resista
 nce or Receipt-Freeness suffer from having been tailored to a specific typ
 e of protocol. We propose a new family of privacy notions to unify these d
 efinitions and accommodate more general types of protocols\, including pro
 tocols supporting multiple votes. At the same time\, we extend the threat 
 model to...
DTSTART:20110526T140000
DTEND:20110526T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Jannik Dreier - Privacy Properties for Voting Protocols: The comple
 ted picture
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4121p6Nc9V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 May 2011 - Grande Salle de VER
 IMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nViktor  Kuncak\, EPFL\nh
 ttp://lara.epfl.ch/~kuncak/\n\n« Towards Implicit Programming » \n\nAbst
 ract:\n\n\nWe argue for a programming model where automated reasoning play
 s a key\nrole during (1) interactive program development\, (2) program\nco
 mpilation\, and (3) program execution. I will focus on data\nmanipulation 
 (as opposed to control). I outline our recent results in\ncomplete functio
 nal synthesis for integer arithmetic\, which is a form\nof program compila
 tion based on decision procedures. For program\ndevelopment\, I outline ou
 r ongoing...
DTSTART:20110519T140000
DTEND:20110519T160000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Viktor  Kuncak - Towards Implicit Programming
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4123VERkPh@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 18 May 2011 - CTL - Grande Salle
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:30 - Salle : CTL - Grande Salle\n\nJinyun XUE\, Institute of Softwar
 e\, Chinese Academy of Science\,\n \n\n« PAR Method and PAR Platform for 
 Developing Reliable Software and Its New Development » \n\nAbstract:\n\nI
 t is a challenging task of computer scientists for increasing the reliabil
 ity of software and efficiency of developing software. For answering the c
 hallenge\, we are developing the PAR method and its supporting platform\, 
 called PAR platform，that is a long-term research project supported by a 
 series of research foundations of China. PAR method and PAR platform consi
 sts of PAR...
DTSTART:20110518T103000
DTEND:20110518T113000
DURATION:PT01H0M0S
LOCATION:CTL - Grande Salle
SUMMARY:Jinyun XUE - PAR Method and PAR Platform for Developing Reliable So
 ftware and Its New Development
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4126U2mN7R@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 16 March 2011 - Grande Salle de 
 VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n15:30 - Salle : Grande Salle de VERIMAG\n\nFabio Somenzi\, Unive
 rsity of Colorado in Boulder\nhttp://vlsi.colorado.edu/~fabio/\n\n« Claus
 e Manipulation for Faster Satisfiability » \n\nAbstract:\n\nPropositional
  Satisfiability solvers used in verification are mostly\nbased on backtrac
 king search and read formulae in Conjunctive Normal\nForm.  Which formula 
 is chosen to represent a function has great\nimpact on solution time.  The
 refore\, various techniques have been\ndevised to either preprocess the in
 put formula or modify it\nduring the search.  In this talk\, we review exi
 sting...
DTSTART:20110316T153000
DTEND:20110316T163000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Fabio Somenzi - Clause Manipulation for Faster Satisfiability
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-41297bBiIu@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 March 2011 - Grande Salle de V
 ERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nHubert Garavel\, INRIA
 \nhttp://vasy.inria.fr\n\n« CADP 2010: A Toolbox for the Construction and
  Analysis of Distributed Processe » \n\nAbstract:\n\nCADP (Construction a
 nd Analysis of Distributed Processes) is a comprehensive\nsoftware toolbox
  that implements the results of concurrency theory. Started\nin\nthe mid 8
 0s\, CADP has been continuously developed by adding new tools and\nenhanci
 ng existing ones. Today\, CADP benefits from a worldwide user\ncommunity\,
 \nboth in academia and industry. This talk presents the latest release...
DTSTART:20110303T140000
DTEND:20110303T160000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Hubert Garavel - CADP 2010: A Toolbox for the Construction and Anal
 ysis of Distributed Processe
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4131r2D4gs@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday  3 February 2011 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : CTL\n\nIMENE BEN HAFAIEDH\, VERIMAG-UJF\nhttp://www-verimag.imag.fr
 /~benhfaie/\n\n« Component-based Systems: from Design to Implementation 
 » \n\nAbstract:\n\nThe goal of the thesis is to provide theory\, methods 
 and tools for the design and implementation\nof component-based systems.\n
 To master the complexity of systems of components\, we first propose a con
 tract-based design and verification approach which is both compositional a
 nd incremental. Then we provide a distributed implementation of these syst
 ems allowing to preserve some global properties.\nThe proposed verificatio
 n approach...
DTSTART:20110203T140000
DTEND:20110203T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:IMENE BEN HAFAIEDH - Component-based Systems: from Design to Implem
 entation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4134tghJn5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 21 January 2011 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:30 - Sall
 e : CTL\n\nSophie Quinton\, Verimag / UJF\nhttp://www-verimag.imag.fr/~qui
 nton/\n\n« Design\, verification and implementation of systems of compone
 nts » \n\nAbstract:\n\nIn this thesis\, we have studied how component-bas
 ed systems are designed\, verified and then implemented. We have focused i
 n particular on formalisms involving complex interactions\, where connecto
 rs are not only used to transfer data but also play a role in the synchron
 ization of components.\n\n1. DESIGN AND VERIFICATION\nContracts are emergi
 ng as a concept of choice when systems are designed by teams working indep
 endently....
DTSTART:20110121T103000
DTEND:20110121T123000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Sophie Quinton - Design\, verification and implementation of system
 s of components
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4154xVOLXv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Monday 20 December 2010 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nJohn Plaice\, University of New South Wales\nhttp://www.cse.unsw.
 edu.au/~plaice/\n\n« La programmation Cartésienne (Habilitation à Dirig
 er des Recherches) (Cartesian Programming (HDR defence)) » \n\nAbstract:
 \n\nWe present a new form of declarative programming inspired by the Carte
 sian coordinate sys-\ntem. This Cartesian programming\, illustrated by the
  TransLucid language\, assumes that all\nprogrammed entities vary with res
 pect to all possible dimensions\, or degrees of freedom. This\nmodel is im
 mediately applicable to areas of science\, engineering and business in whi
 ch working\nwith...
DTSTART:20101220T140000
DTEND:20101220T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:John Plaice - La programmation Cartésienne (Habilitation à Dirige
 r des Recherches) (Cartesian Programming (HDR defence))
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4157vOipnV@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 November 2010 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nAntoine GERBAUD\, S
 ynchrone/Asynchrone\n\n\n« Le modèle du marcheur pour les réseaux d'int
 eractions (Walker model for complex networks) » \n\nRésumé :\n\ntba\n\n
 \n\n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semi
 nars\,62.html?lang=en\nLocation/Vision: Grande Salle de VERIMAG - http://w
 ww-verimag.imag.fr/Plan-d-acces.html?lang=fr\nTo unsubscribe\, reply to th
 is mail with UNSUBSCRIBE in the subject\n= = = = = = = = = = = = = = = = =
  = = = = = = = = = =...
DTSTART:20101118T140000
DTEND:20101118T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Antoine GERBAUD - Le modèle du marcheur pour les réseaux d'intera
 ctions (Walker model for complex networks)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4159LBMvu4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  5 November 2010 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nMoshe Vardi\, Rice University\nhttp://www.cs.rice.edu/~vardi/
 \n\n« From Philosophical to Industrial Logics  » \n\nAbstract:\n\nOne of
  the surprising developments in the area of program verification is how se
 veral ideas introduced by logicians in the first part of the 20th century 
 ended up yielding at the start of the 21st century industry-standard prope
 rty-specification languages called PSL and SVA. This development was enabl
 ed by the equally unlikely transformation of the mathematical machinery of
  automata on infinite words\, introduced in the early 1960s for second-ord
 er...
DTSTART:20101105T140000
DTEND:20101105T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Moshe Vardi - From Philosophical to Industrial Logics
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4162TjGIJ1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 28 October 2010 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sa
 lle : CTL\n\nMohamad Jaber\, VERIMAG\nhttp://www-verimag.imag.fr/~jaber\n
 \n« Centralized and Distributed Implementations of Correct-by-constructio
 n Component-based Systems by using Source-to-source Transformations in BIP
  » \n\nAbstract:\n\nThe thesis studies theory and methods for generating 
 automatically centralized and distributed implementations from a high-leve
 l model of an application software in BIP. BIP (Behavior\, Interaction\, P
 riority) is a component framework with formal operational semantics. Coord
 ination between components is achieved by using multiparty interactions an
 d dynamic...
DTSTART:20101028T133000
DTEND:20101028T160000
DURATION:PT02H30M0S
LOCATION:CTL
SUMMARY:Mohamad Jaber - Centralized and Distributed Implementations of Corr
 ect-by-construction Component-based Systems by using Source-to-source Tran
 sformations in BIP
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4165gUvDCN@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 22 September 2010 - Maison Jean K
 untzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n15:00 - Salle : Maison Jean Kuntzmann\n\nMathias Péron\, UJF /
  VERIMAG\nhttp://www-verimag.imag.fr/~peron/\n\n« Contributions à l’an
 alyse statique de programmes manipulant des tableaux (Contributions to the
  Static Analysis of Programs Handling Arrays) » \n\nRésumé :\n\nSi l'an
 alyse automatique des accès aux tableaux a été largement\nétudiée\, o
 n trouve très peu de résultats convaincants sur l'analyse\ndu contenu de
 s tableaux.\n\nPour une telle analyse\, les analyses numériques sont cent
 rales. \nNotamment\, si l'on découvre l'invariant i <> j\, on évite d'af
 faiblir\nla...
DTSTART:20100922T150000
DTEND:20100922T173000
DURATION:PT02H30M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Mathias Péron - Contributions à l’analyse statique de programme
 s manipulant des tableaux (Contributions to the Static Analysis of Program
 s Handling Arrays)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-41689GgXAm@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 15 September 2010 - CTL\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : CTL\n\nTayeb BOUHADIBA\, Verimag\nhttp://www-verimag.imag.fr/~bou
 hadib/\n\n« 42\, Une Approche à Composants pour le prototypage Virtuel d
 es Systèmes Embarqués Hétérogènes  (42\,  A Component-Based Approach 
 to Virtual  Prototyping of Heterogeneous Embedded Systems ) » \n\nRésum
 é :\n\nLes travaux présentés dans cette thèse portent sur le prototypa
 ge virtuel des systèmes embarqués hétérogènes. La conception d'un sys
 tème embarqué est complexe\, et trouver une solution optimale est diffic
 ile. L'intérêt du prototypage virtuel est de fournir un modèle exécuta
 ble de ce...
DTSTART:20100915T140000
DTEND:20100915T170000
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:Tayeb BOUHADIBA - 42\, Une Approche à Composants pour le prototypa
 ge Virtuel des Systèmes Embarqués Hétérogènes  (42\,  A Component-Bas
 ed Approach to Virtual  Prototyping of Heterogeneous Embedded Systems )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4171bmV3I4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 27 August 2010 - MJK\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - Salle
  : MJK\n\nManuel Garnacho\, VERIMAG - DCS\n\n\n« Automatisation de la cer
 tification formelle de systèmes critiques par instrumentation d\\\'interp
 réteurs abstraits (Automatic and formal certification of critical systems
  by instrumentation of abstract interpreters) » \n\nRésumé :\n\nLes tra
 vaux menés dans cette thèse portent sur la certification de programmes i
 mpératifs utilisés dans des applications critiques. Les certificats éta
 blissent la validité des propriétés sémantiques des programmes. Ils so
 nt produits sous forme de preuves déductives vérifiables par machine. Le
  défi...
DTSTART:20100827T100000
DTEND:20100827T120000
DURATION:PT02H0M0S
LOCATION:MJK
SUMMARY:Manuel Garnacho - Automatisation de la certification formelle de sy
 stèmes critiques par instrumentation d\\\'interpréteurs abstraits (Autom
 atic and formal certification of critical systems by instrumentation of ab
 stract interpreters)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4173wuvaUP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 August 2010 - Grande Salle de 
 VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n19:00 - Salle : Grande Salle de VERIMAG\n\nSébastien Bourdeaudu
 cq\, Sharism at Work\nhttp://www.sharism.cc/\n\n« Milkymist : un System-o
 n-Chip libre et orienté video temps réel » \n\nRésumé :\n\nAvec la di
 minution des coûts et la large disponibilité de FPGAs relativement dense
 s et performants\, il devient aisé pour les particuliers de concevoir des
  puces numériques\, et de repousser ainsi les limites du libre vers le ni
 veau de la conception électronique numérique. Milkymist\, l\'un des plus
  gros projets actuels d’électronique numérique libre\, développe un..
 .
DTSTART:20100826T190000
DTEND:20100826T200000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Sébastien Bourdeauducq - Milkymist : un System-on-Chip libre et or
 ienté video temps réel
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4175MJGpBJ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 July 2010 - Grande Salle de VE
 RIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nSophie Quinton\, Verima
 g\nhttp://www-verimag.imag.fr/~quinton/\n\n« Achieving distributed contro
 l through model checking » \n\nAbstract:\n\nWe apply model checking of kn
 owledge properties to the design of distributed controllers that enforce g
 lobal constraints on concurrent systems. We calculate when processes can d
 ecide\, autonomously\, to take or block an action so that the global const
 raint will not be violated. When the separate processes cannot make this d
 ecision alone\, it may be possible to temporarily coordinate several proce
 sses in...
DTSTART:20100708T140000
DTEND:20100708T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Sophie Quinton - Achieving distributed control through model checki
 ng
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4178SwUWC5@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 July 2010 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nJocelyne Troccaz\, CNRS/TIMC\nhttp://membres-timc.imag.fr/Jocel
 yne.Troccaz/\n\n« TBA » \n\nRésumé :\n\nL'équipe GMCAO (Gestes Médic
 o-Chirurgicaux Assistés par Ordinateur) développe des systèmes informat
 isés d'assistance à la réalisation de gestes diagnostiques et thérapeu
 tiques. Le plus souvent ces systèmes intègrent une phase de planificatio
 n basée sur une imagerie médicale pré-opératoire (par exemple scanner 
 ou IRM)\; ensuite lors de la réalisation du geste des données per-opéra
 toires (per = pendant) sont acquises et après recalage(*) permettent de t
 ransférer...
DTSTART:20100701T140000
DTEND:20100701T160000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Jocelyne Troccaz - TBA
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4181Mz8mfj@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 18 June 2010 - Grande Salle de VERI
 MAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n10:00 - Salle : Grande Salle de VERIMAG\n\nArshia Cont\, IRCAM\nhttp
 ://imtr.ircam.fr/imtr/Arshia_Cont\n\n« Antescofo : A performance-synchro
 nous language for computer music » \n\nAbstract:\n\nWithin centuries of e
 volution\, musical notation has become a fascinating mean for abstraction 
 of time and transcription of thought. A musical score transports the conce
 ived structure from the compositional ideas towards various interpretation
 s. The main particularity of interest here is its power of abstraction in 
 describing complex\, parallel\, hierarchical and multiple-clock processes 
 at the time...
DTSTART:20100618T100000
DTEND:20100618T120000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arshia Cont - Antescofo : A performance-synchronous language for c
 omputer music
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4183Des11l@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 June 2010 - Grande Salle de VE
 RIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nKarel Heurtefeux\, Sync
 hrone\nhttp://www-verimag.imag.fr/~heurtefe/\n\n« Localisation qualitativ
 e appliquée au routage et à l\'accès au canal dans les réseaux de capt
 eurs (Qualitative localization applied to routing and MAC layer in Wireles
 s Sensor Networks) » \n\nRésumé :\n\nLes réseaux de capteurs sont cons
 titués de centaines d\'entités électroniques communiquant sans fil et f
 orment ainsi des réseaux étendus\, denses et contraints en énergie. Dan
 s ce contexte\, il est souvent utile d\'avoir une information sur la proxi
 mité des...
DTSTART:20100617T140000
DTEND:20100617T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Karel Heurtefeux - Localisation qualitative appliquée au routage e
 t à l\'accès au canal dans les réseaux de capteurs (Qualitative localiz
 ation applied to routing and MAC layer in Wireless Sensor Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4185wSRHww@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 27 May 2010 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nThanh Hung NGUYEN\, Verimag\nhttp://www-verimag.imag.fr/~thnguyen
 \n\n« Vérification Constructive des Systèmes à base de Composants (Con
 structive Verification for Component-based Systems) » \n\nAbstract:\n\nTh
 e goal of the thesis is to develop theory\, methods and tools for the comp
 ositional and incremental verification for component-based systems. We pro
 pose a compositional verification method for proving safety properties. Th
 e method is based on the use of two kinds of invariants: component invaria
 nts which express local aspects of systems and interaction invariants whic
 h...
DTSTART:20100527T140000
DTEND:20100527T170000
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:Thanh Hung NGUYEN - Vérification Constructive des Systèmes à bas
 e de Composants (Constructive Verification for Component-based Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4188C9teOb@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : Grande Salle de VERIMAG\n\nChristophe JOUBERT\, Techn
 ical University of Valencia\, Spain\n\n\n« Datalog-based Program Analysis
  with BES and RWL » \n\nAbstract:\n\nIn this talk\, we present two powerf
 ul\, fully automated methods to\nevaluate Datalog queries in the context o
 f object-oriented program\nanalyses: the first approach transforms the Dat
 alog program in an\nimplicit Boolean Equation Systems (BESs) solved by exi
 sting general\npurpose verification toolboxes\, such as CADP\, providing l
 ocal BES\nresolutions with linear-time complexity\; the second approach\nt
 ransforms...
DTSTART:20100510T100000
DTEND:20100510T110000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Christophe JOUBERT - Datalog-based Program Analysis with BES and RW
 L
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4190EUuISS@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n15:15 - Salle : Grande Salle de VERIMAG\n\nArnaud Sangnier\, DISI\, U
 niversità di Genova \nhttp://www.disi.unige.it/person/SangnierA/\n\n« We
 ak Time Petri Nets Strike back!  » \n\nAbstract:\n\nWe consider the model
  of Time Petri Nets where time is associated with transitions. Two semanti
 cs for time elapsing can be considered: the strong one\, for which all tra
 nsitions are urgent\, and the weak one\, for which time can elapse arbitra
 rily. It is well known that many verification problems such as the marking
  reachability are undecidable with the strong semantics. In this talk\, we
  focus on Time...
DTSTART:20100510T151500
DTEND:20100510T161500
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arnaud Sangnier - Weak Time Petri Nets Strike back!
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4193pXCiMF@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nNadia El Mrabet\, GREYC al
 go team - Université de Caen\n\n\n« Arithmétique des couplages\, perfor
 mance et résistance aux attaques par canaux cachés  » \n\nRésumé :\n
 \nMes travaux portent sur l'étude des couplages\, et plus particulièreme
 nt leur utilisation en cryptographie. Mes premiers travaux ont portés sur
  l'arithmétique des couplages à travers une comparaison des complexités
  en nombre d'opérations des couplages de Weil et Tate. Puis je me suis in
 téressée à l'étude de l'arithmétique utile pour les couplages. Un de 
 mes travaux...
DTSTART:20100510T140000
DTEND:20100510T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nadia El Mrabet - Arithmétique des couplages\, performance et rés
 istance aux attaques par canaux cachés
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-41952os933@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n16:30 - Salle : Grande Salle de VERIMAG\n\nRegis Gascon\, Inria Sophi
 a-Antipolis\n\n\n«   (Verification of quantitative properties on constrai
 nt automata ) » \n\nAbstract:\n\nTraditional temporal logics like LTL or 
 CTL* use propositional variables\nas atomic formulas.\nConsequently\, thes
 e logics allow only to state properties on the control\nlocations of the m
 odels.\nThey are not well suited to state richer properties on the objects
 \n(data) that models can handle:\nintergers (counters)\, reals (clocks)\, 
 strings (stacks\, queues)...\nIndeed\, this kind of\ndata are interpreted 
 in infinite...
DTSTART:20100510T163000
DTEND:20100510T173000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Regis Gascon -   (Verification of quantitative properties on constr
 aint automata )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4198P2dwTE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  7 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nKevin Marquet\, Verimag\n
 \n\n« Vérification automatique de modèles de systèmes sur puce  » \n
 \nRésumé :\n\nLa modélisation des systèmes sur puce permet de valider 
 en avance de phase des architectures matérielles. Lors de ce séminaire j
 e présenterai mes travaux traitant de la vérification formelle et\nautom
 atique de programmes SystemC\, le standard en matière de modélisation. J
 e détaillerai comment une représentation formelle peut être extraite d'
 un tel programme parallèle. Je décrirai les avantages\nd'une forme exéc
 utable et...
DTSTART:20100507T140000
DTEND:20100507T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Kevin Marquet - Vérification automatique de modèles de systèmes 
 sur puce
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-42005X42SZ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  7 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n15:15 - Salle : Grande Salle de VERIMAG\n\nAlexandre DONZE\, verimag
 \n\n\n« Conception et analyse basée sur les modèles de systèmes hybrid
 es: techniques par simulations\, applications et perspectives (Model-based
  design and analysis of hybrid systems:simulation-based techniques\, appli
 cations and perspectives) » \n\nRésumé :\n\nLors de ce séminaire\, je 
 présenterai mes contributions passées\,\nprésentes et prévues dans le 
 domaine de la vérification et de\nl'analyse des systèmes continus et hyb
 rides\, en particulier en\nprésence de dynamiques non-linéaires. Je rapp
 ellerai...
DTSTART:20100507T151500
DTEND:20100507T161500
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Alexandre DONZE - Conception et analyse basée sur les modèles de 
 systèmes hybrides: techniques par simulations\, applications et perspecti
 ves (Model-based design and analysis of hybrid systems:simulation-based te
 chniques\, applications and perspectives)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4203Pu65jE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 April 2010 - Grande Salle de V
 ERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nNikolay Kosmatov\, CEA
  - LISI\n\n\n« Le traitement des alias internes dans l'outil de générat
 ion de tests PathCrawler (All-Paths Test Generation for Programs with Inte
 rnal Aliases in PathCrawler) » \n\nRésumé :\n\nNous présentons le prob
 lème des alias dans le cadre de la méthode de\ngénération automatique 
 de tests tous-les-chemins par la recherche en\nprofondeur d'abord à l'aid
 e de l'exécution symbolique en contraintes.\n\nNous classons les alias en
  deux classes : les alias externes présents au\npoint d'entrée dans la f
 onction...
DTSTART:20100422T140000
DTEND:20100422T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nikolay Kosmatov - Le traitement des alias internes dans l'outil de
  génération de tests PathCrawler (All-Paths Test Generation for Programs
  with Internal Aliases in PathCrawler)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-42055HzCi2@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  7 April 2010 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sal
 le : CTL\n\nMohamed Yassin CHKOURI\, VERIMAG\nhttp://www-verimag.imag.fr/~
 chkouri/\n\n« Modélisation des systèmes temps-réel embarqués en utili
 sant AADL pour la génération automatique d’applications formellement v
 érifiées (Modelling real-time embedded systems using AADL for the automa
 tic generation of applications formally verified) » \n\nRésumé :\n\nLe 
 langage d’analyse et de description d’architectures (AADL) fait l’ob
 jet d’un intérêt croissant dans l’industrie des systèmes embarqués
  tempsréel. Il définit plusieurs catégories de composants\, réparties 
 en trois...
DTSTART:20100407T133000
DTEND:20100407T160000
DURATION:PT02H30M0S
LOCATION:CTL
SUMMARY:Mohamed Yassin CHKOURI - Modélisation des systèmes temps-réel em
 barqués en utilisant AADL pour la génération automatique d’applicatio
 ns formellement vérifiées (Modelling real-time embedded systems using AA
 DL for the automatic generation of applications formally verified)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4208tiFxgX@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 April 2010 - Grande Salle de V
 ERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nClaire Maiza\, Compile
 r Design Lab\, Saarland University\nhttp://rw4.cs.uni-saarland.de/people/b
 urguiere.shtml\n\n« Static analysis of interferences in the cache memory 
 in preemptive real-time systems » \n\nAbstract:\n\nHard real-time embedde
 d systems require verification of timing\nconstraints and thus estimation 
 of upper-bounds on the execution time.\nHowever\, usual timing analyses as
 sume programs to be executed with\nuninterrupted execution. Our aim is to 
 broaden the scope of current\ntiming analysis techniques to programs runni
 ng on...
DTSTART:20100401T140000
DTEND:20100401T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Claire Maiza - Static analysis of interferences in the cache memory
  in preemptive real-time systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4211DelSKR@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 19 March 2010 - Grande Salle de VER
 IMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n10:00 - Salle : Grande Salle de VERIMAG\n\nNicolas Blanc\, ETH Zuri
 ch\nhttp://www.cprover.org/scoot/\n\n« Static Analysis for SystemC with S
 coot: From Verification to Simulation (Analyse statique de SystemC avec Sc
 oot : de la Verification à la Simulation) » \n\nAbstract:\n\nSYSTEMC is 
 a description language for computer systems that is based on C++.\nThe lan
 guage is used for modeling electronic devices at arbitrary\nlevels of abst
 raction.\nIn particular\, SystemC can describe models with both hardware a
 nd\nsoftware aspects.\nAs today’s electronic designs are incredibly larg
 e and...
DTSTART:20100319T100000
DTEND:20100319T110000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nicolas Blanc - Static Analysis for SystemC with Scoot: From Verifi
 cation to Simulation (Analyse statique de SystemC avec Scoot : de la Verif
 ication à la Simulation)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4213paFJrB@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  9 March 2010 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - Sall
 e : CTL\n\nThomas GAWLITZA\, verimag\n\n\n« Combining Strategy Iteration 
 with Semidefinite Programming for Abstract Interpretation » \n\nAbstract:
 \n\nWe present a practical strategy improvement algorithm for computing le
 ast solutions of fixpoint equation systems\, whose right-hand sides use or
 der-concave operators and the maximum operator. These equation systems str
 ictly generalize systems of rational equations. We use our algorithm for c
 omputing precise numerical invariants of programs by abstract interpretati
 on. Thereby we consider the abstract domain of quadratic zones introduced 
 by Adjé...
DTSTART:20100309T100000
DTEND:20100309T120000
DURATION:PT02H0M0S
LOCATION:CTL
SUMMARY:Thomas GAWLITZA - Combining Strategy Iteration with Semidefinite Pr
 ogramming for Abstract Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4216pOXHTE@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  5 March 2010 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Salle 
 : CTL\n\nMarc Poulhiès\, VERIMAG - DCS\nhttp://www-verimag.imag.fr/~poulh
 ies/\n\n« Conception et Implantation de Système Fondé sur les Composant
 s. Vers une Unification des Paradigmes Génie Logiciel et Système. (Desig
 n and Implementation of Component Based Systems. Towards a Unification of 
 the Software Engineering and the System Paradigms. ) » \n\nRésumé :\n\n
 Cette thèse a été co-encadrée par le laboratoire MAPS/AMS de France Te
 lecom R&D\n(aujourd'hui MAPS/SHINE) et le laboratoire VERIMAG.\n\nLe déve
 loppement de logiciels pour les systèmes embarqués présente de nombreux
 \ndéfis....
DTSTART:20100305T133000
DTEND:20100306T053000
DURATION:PT16H0M0S
LOCATION:CTL
SUMMARY:Marc Poulhiès - Conception et Implantation de Système Fondé sur 
 les Composants. Vers une Unification des Paradigmes Génie Logiciel et Sys
 tème. (Design and Implementation of Component Based Systems. Towards a Un
 ification of the Software Engineering and the System Paradigms. )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4218Gk5ejl@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 March 2010 - Grande Salle de V
 ERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nOndrej Sery\, Charles 
 University Prague\nhttp://dsrg.mff.cuni.cz/~sery/\n\n« Code analysis with
  Blast  » \n\nAbstract:\n\nThe first part of the talk will present the Bl
 ast model checker\, which has originated at UC Berkley (Ranjit Jhala\, Rup
 ak Majumdar\, Gregoire Sutre) and has been thereafter developed also at ot
 her institutions\, e.g.\, EPFL Lausanne (T. Henzinger)\, UC San Diego (Ran
 jit Jhala)\, UC Los Angeles (Rupak Majumdar)\, Simon Fraser University (Di
 rk Beyer).\n\nBlast is a counter-example guided abstraction refinement mod
 el checker for C...
DTSTART:20100304T140000
DTEND:20100304T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Ondrej Sery - Code analysis with Blast
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-42212Pxzt1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 16 February 2010 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBahareh Badban\, Uni
 versity of Konstanz\nhttp://www.inf.uni-konstanz.de/soft/members/badban/ 
 \n\n«  Automated Invariant Generation for the Verification of Real-Time S
 ystems » \n\nRésumé :\n\n\n\n\n\nAbstract:\n\nAlthough real-time model 
 checking has significantly advanced the quality of\nsafety-critical system
 s\, the demand for more rigorous verification methods is\nstill increasing
 . The modeling of many such systems requires dense time\ndomains to reflec
 t the fact that events may happen arbitrarily close to each\nother in actu
 al applications....
DTSTART:20100216T140000
DTEND:20100216T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bahareh Badban -  Automated Invariant Generation for the Verificati
 on of Real-Time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4223JuoAaP@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday  4 February 2010 - Amphi\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sa
 lle : Amphi\n\nMarius Bozga\, Verimag\nhttp://www-verimag.imag.fr/~bozga\n
 \n« Component-Based Construction of Real-Time Systems » \n\nAbstract:\n
 \nThe design of complex and reliable IT systems is a challenging engineeri
 ng problem.  In contrast to traditional engineering disciplines\, predicta
 bility cannot be guaranteed at design time and a\nposteriori analyses are 
 mandatory for ensuring corectness and estimating runtime performances.\n\n
 During the five past years\, I have contributed to the development of a sy
 stem design methodology based on BIP - Behavior\, Interaction\, Priority -
  component...
DTSTART:20100204T133000
DTEND:20100204T163000
DURATION:PT03H0M0S
LOCATION:Amphi
SUMMARY:Marius Bozga - Component-Based Construction of Real-Time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4226BxHfd0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Friday 29 January 2010 - Amphi F018\, UFR IMA
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Amphi F018\, UFR IMA\n\nDang Thao\, VERIMAG\n\n\n« Met
 hods and tools for  Computer Aided Design of Embedded Systems  » \n\nAbst
 ract:\n\nDue to an increasing use of computers\, there has been a dramatic
  rise in interest in embedded systems\, that is systems in which the compu
 ter interacts with the physical world. The main objective of my research h
 as been to develop new analysis methods and tools\, with a focus on semi-f
 ormal approaches (such as testing) and by exploring new application areas 
 (such as\, analog and mixed-signal circuits and biological systems). In pa
 rticular\, my...
DTSTART:20100129T140000
DTEND:20100129T160000
DURATION:PT02H0M0S
LOCATION:Amphi F018\, UFR IMA
SUMMARY:Dang Thao - Methods and tools for  Computer Aided Design of Embedde
 d Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4228kHvHUW@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 January 2010 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nArnaud Sangnier\, Un
 iversite de Turin\nhttp://www.di.unito.it/~sangnier/\n\n« Reversal-bounde
 d counter machines revisited » \n\nAbstract:\n\nWe extend the class of re
 versal-bounded counter machines by authorizing a finite number of alternat
 ions between increasing and decreasing mode over a given bound. We prove t
 hat extended reversal-bounded counter machines also have effective semi-li
 near reachability sets and enjoy the same properties as the original rever
 sal-bounded counter machines. We also prove that the property of being...
DTSTART:20100114T140000
DTEND:20100114T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arnaud Sangnier - Reversal-bounded counter machines revisited
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4231JO5v2T@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n16:00 - Salle : Grande Salle de VERIMAG\n\nMatthias Althoff\, 
 Technische Universität München\n\n\n« Reachability Analysis of Nonlinea
 r and Hybrid Systems with Zonotopes » \n\nAbstract:\n\nThe necessity of a
 utomatic tools for the verification of dynamic systems is constantly incre
 asing due to the growing complexity of the technical world. A possible ans
 wer to this problem is the verification of hybrid systems based on reachab
 ility analysis. One of the biggest challenges in reachability analysis is 
 the curse of dimension. As a possible solution to this problem\, zonotopes
  have been...
DTSTART:20091119T160000
DTEND:20091119T170000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Matthias Althoff - Reachability Analysis of Nonlinear and Hybrid Sy
 stems with Zonotopes
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4233snUhde@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBruce Krogh \, Dept
 . of Electrical and Computer Engineering\, Carn\n\n\n« Research Direction
 s in Cyber-Physical Systems  » \n\nAbstract:\n\nLast year the U.S. Nation
 al Science Foundation launched a new initiative in cyber-physical systems 
 (CPS)\, which according to the program announcement “refers to the tight
  conjoining of and coordination between computational and physical resourc
 es.” The first part of this talk will review the general CPS research ag
 enda\, with some observations concerning the relationships between CPS and
  earlier...
DTSTART:20091119T140000
DTEND:20091119T160000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bruce Krogh  - Research Directions in Cyber-Physical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4236U4hDd0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n11:00 - Salle : Grande Salle de VERIMAG\n\nFlorent Garnier\, V
 ermimagg- Team DCS\nhttp://www-verimag.imag.fr/~fgarnier/\n\n« A classifi
 cation of randomized fair strategies for studying termination of term rewr
 iting (A classification of randomized fair strategies for studying termina
 tion of term rewriting) » \n\nAbstract:\n\nIn this talk\, we tackled the 
 problem of the probabilistic termination of infinite state space rule-base
 d programs when non-deterministic choices are solved using randomized stra
 tegies. In this talk\, we consider the probabilistic termination of Term R
 ewrite...
DTSTART:20091112T110000
DTEND:20091112T114500
DURATION:PT0H45M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Florent Garnier - A classification of randomized fair strategies fo
 r studying termination of term rewriting (A classification of randomized f
 air strategies for studying termination of term rewriting)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4238AkZIJZ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  9 November 2009 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nYliès Falcone\, Vérimag\nhttp://www-verimag.imag.fr/~falcone
 \n\n« Etude et mise en oeuvre de méthodes de validation à l'exécution 
 (Study and implementation of runtime validation techniques) » \n\nRésum
 é :\n\nL'étude de cette thèse porte sur trois méthodes de validation d
 ynamiques : les méthodes de vérification\, d'enforcement (mise en applic
 ation)\, et de test de propriétés lors de l'exécution des systèmes. No
 us nous intéresserons à ces approches en l'absence de spécification com
 portementale du système à valider. Pour notre étude\, nous nous plaçon
 s dans la...
DTSTART:20091109T140000
DTEND:20091109T170000
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:Yliès Falcone - Etude et mise en oeuvre de méthodes de validation
  à l'exécution (Study and implementation of runtime validation technique
 s)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4241LJEaBp@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 October 2009 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nStephane Demri\, ENS
  CACHAN\nhttp://www.lsv.ens-cachan.fr/~demri/\n\n« Les problèmes de couv
 erture et finitude pour les systèmes d'addition de vecteurs arborescents.
   (The covering and boundedness problems for branching vector addition\nsy
 stems ) » \n\nRésumé :\n\nLes systèmes d'addition de vecteurs arboresc
 ents (BVAS) forment un modèle formel de calcul qui est\nutilisé par exem
 ple en linguistique ou pour la vérification de protocoles cryptographique
 s. Ce modèle a\naussi des  liens étroits avec des logiques de données..
 .
DTSTART:20091029T140000
DTEND:20091029T160000
DURATION:PT02H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Stephane Demri - Les problèmes de couverture et finitude pour les 
 systèmes d'addition de vecteurs arborescents.  (The covering and boundedn
 ess problems for branching vector addition\nsystems )
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4243Spmf2f@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 28 October 2009 - MJK\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : MJK\n\nColas Le Guernic\, VERIMAG\nhttp://www-verimag.imag.fr/~legu
 erni/\n\n« Calcul d'Atteignabilité des Systèmes Hybrides à Partie Cont
 inue Linéaire (Reachability Analysis of Hybrid Systems with Linear Contin
 uous Dynamics) » \n\nRésumé :\n\nCette thèse est consacrée au calcul 
 des états atteignables des systèmes linéaires et hybrides. \n\nLa premi
 ère partie est consacrée aux systèmes linéaires. Après avoir présent
 é les méthodes existantes\, nous introduisons notre principale contribut
 ion: un nouveau schéma algorithmique pour l'analyse d'accessibilité des 
 systèmes...
DTSTART:20091028T140000
DTEND:20091028T160000
DURATION:PT02H0M0S
LOCATION:MJK
SUMMARY:Colas Le Guernic - Calcul d'Atteignabilité des Systèmes Hybrides 
 à Partie Continue Linéaire (Reachability Analysis of Hybrid Systems with
  Linear Continuous Dynamics)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-42460nzPg1@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 21 October 2009 - Amphithéâtre 
 CTL\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Amphithéâtre CTL\n\nAldric Degorre\, Vérimag\nhtt
 p://www-verimag.imag.fr/~degorre/\n\n« Langages formels: quelques aspects
  quantitatifs (On Some Quantitative Aspects of Formal Languages) » \n\nR
 ésumé :\n\nDans cette thèse nous présentons trois directions de recher
 che assez différentes concernant les aspects quantitatifs des langages fo
 rmels. \n\nLa première étudie des problèmes d'ordonnancement avec à la
  fois des dépendances entre tâches à ordonnancer et des comportements i
 nfinis et imprévisibles: les flux de requêtes appartenant à un langage.
 ..
DTSTART:20091021T140000
DTEND:20091021T170000
DURATION:PT03H0M0S
LOCATION:Amphithéâtre CTL
SUMMARY:Aldric Degorre - Langages formels: quelques aspects quantitatifs (O
 n Some Quantitative Aspects of Formal Languages)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4249t5uCPD@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 September 2009 - Grande Salle 
 de VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBageshri KARKARE\,
  Verimag\n\n\n«  Efficiency\, Precision\, Simplicity\, and Generality in 
 Interprocedural Data Flow Analysis. » \n\nAbstract:\n\nThe full call stri
 ngs method is the most general\, simplest\, and most precise method of per
 forming context sensitive interprocedural data flow analysis. It remembers
  contexts using call strings. For full precision\, all call strings up to 
 a prescribed length must be constructed. Two limitations of this method ar
 e (a) it cannot be used for frameworks with infinite lattices\, and (b) th
 e prescribed...
DTSTART:20090924T140000
DTEND:20090924T150000
DURATION:PT01H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bageshri KARKARE -  Efficiency\, Precision\, Simplicity\, and Gener
 ality in Interprocedural Data Flow Analysis.
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4251SD3JXG@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 15 September 2009 - CTL\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : CTL\n\nDino Distefano\, Queen Mary University\, London\nhttp://www
 .dcs.qmul.ac.uk/~ddino/ddino_homepage/About_me.html\n\n« Compositional Sh
 ape Analysis by means of Bi-Abduction » \n\nAbstract:\n\nThis talk descri
 bes a compositional shape analysis\, where each procedure is analyzed inde
 pendently of its callers.\nThe analysis uses an abstract domain based on a
  restricted fragment of separation logic\,\nand assigns a collection of Ho
 are triples to each procedure\; the triples  provide an over-approximation
  of  data structure usage.\nCompositionality brings its usual benefits --i
 ncreased...
DTSTART:20090915T140000
DTEND:20090915T150000
DURATION:PT01H0M0S
LOCATION:CTL
SUMMARY:Dino Distefano - Compositional Shape Analysis by means of Bi-Abduct
 ion
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4254h9VVEJ@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 June 2009 - VERIMAG\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - 
 Salle : VERIMAG\n\nZvonimir Rakamaric\, University of British Columbia \nh
 ttp://www.cs.ubc.ca/~zrakamar/\n\n«  Static and Precise Detection of Conc
 urrency Errors in Systems Code Using SMT Solvers  » \n\nAbstract:\n\nCont
 ext-bounded analysis is an attractive approach to verification of\nconcurr
 ent programs. Bounding the number of contexts executed per\nthread not onl
 y reduces the asymptotic complexity\, but also the\ncomplexity increases s
 lowly from checking a purely sequential program.\nLal and Reps provided a 
 method for reducing the\ncontext-bounded verification of a concurrent bool
 ean program to...
DTSTART:20090625T100000
DTEND:20090625T110000
DURATION:PT01H0M0S
LOCATION:VERIMAG
SUMMARY:Zvonimir Rakamaric -  Static and Precise Detection of Concurrency E
 rrors in Systems Code Using SMT Solvers
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4256OvvV3V@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 25 June 2009 - Ampithéatre CTL\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 14:00 - Salle : Ampithéatre CTL\n\nScott Cotton\, Verimag\n\n\n« Sur Que
 lques Problèmes de la Satisfiabilité (On Some Problems in Satisfiability
  Solving) » \n\nRésumé :\n\nUn nombre croissant d'applications\, telles
  que la vérification et l'optimisation non-linéaire\, fait usage des sol
 veurs SAT et SMT. Malgré des progrès récents dans le développement de 
 techniques de SAT et SMT\, les problèmes pour lesquels les solveurs SAT a
 nd SMT sont utilisés sont souvent difficiles et 'intractables'\, et la pe
 rformance de ces solveurs est difficile à estimer. En consequence\, le d
 éveloppement...
DTSTART:20090625T140000
DTEND:20090625T150000
DURATION:PT01H0M0S
LOCATION:Ampithéatre CTL
SUMMARY:Scott Cotton - Sur Quelques Problèmes de la Satisfiabilité (On So
 me Problems in Satisfiability Solving)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4259UoBua0@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Friday 19 June 2009 - CTL\n= = = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:15 - Salle : CT
 L\n\nDavid Monniaux\, CNRS / VERIMAG\nhttp://www-verimag.imag.fr/~monniaux
 /\n\n« Analyse statique : de la théorie à la pratique (Static analysis
 : from theory to practice) » \n\nRésumé :\n\nIl est important que les l
 ogiciels pilotant les systèmes critiques (avions\, centrales nucléaires\
 , etc.) fonctionnent correctement — alors que la plupart des systèmes i
 nformatisés de la vie courante (micro-ordinateur\, distributeur de billet
 s\, téléphone portable) ont des dysfonctionnements visibles. Il ne s'agi
 t pas là d'un simple problème d'ingéniérie : on sait depuis les trava
 ux de Turing...
DTSTART:20090619T101500
DTEND:20090619T131500
DURATION:PT03H0M0S
LOCATION:CTL
SUMMARY:David Monniaux - Analyse statique : de la théorie à la pratique 
 (Static analysis: from theory to practice)
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4261VeITV4@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 May 2009 - CTL\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle
  : CTL\n\nFlorian Kammueller\, Technische Universitat Berlin\nhttp://user.
 cs.tu-berlin.de/~flokam/\n\n« ASPfun: un calcul pour des objets distribu
 és  » \n\nRésumé :\n\nLa programmation d'un grand réseau d' ordinateu
 rs distribués\,\ntel que l'Internet\, pose de nouveaux problèmes de séc
 urité.\nJe présente dans cet exposé le langage formel ASPfun pour les\n
 objets distribués asynchrones.\n\nASPfun élargit la théorie des objets 
 par une communication requêtes-réponse basée sur des futurs. Un futur r
 eprésente le\nrésultat encore attendu d'une requête donnée\; la répon
 se...
DTSTART:20090514T140000
DTEND:20090514T150000
DURATION:PT01H0M0S
LOCATION:CTL
SUMMARY:Florian Kammueller - ASPfun: un calcul pour des objets distribués
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-426457vUsx@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 May 2009 - VERIMAG\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : VERIMAG\n\nVillard Jules\, LSV\, Cachan\nhttp://www.lsv.ens-cachan.
 fr/~villard/\n\n« Proving Copyless Message Passing  » \n\nAbstract:\n\nH
 andling concurrency using a shared memory and locks can be tedious and\ner
 ror-prone. One solution is to use message-passing instead. We study here\n
 a particular flavor that makes the ownership transfer of messages explicit
 .\nIn this case\, ownership of the heap region representing the content of
  a\nmessage is lost upon sending\, which can lead to efficient implementat
 ions.\nWe have defined a proof system for a concurrent imperative programm
 ing\nlanguage...
DTSTART:20090507T140000
DTEND:20090507T150000
DURATION:PT01H0M0S
LOCATION:VERIMAG
SUMMARY:Villard Jules - Proving Copyless Message Passing
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4266ovEh5z@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 April 2009 - VERIMAG/AMPHI CTL
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : VERIMAG/AMPHI CTL\n\nChristophe Guillon\, STMicroelectr
 onics \nhttp://www.st.com/stonline/\n\n« Les représentations SSA et Psi-
 SSA  » \n\nRésumé :\n\nLa représentation SSA (Static Single Assignment
 ) est fréquemment\nutilisée dans les compilateurs récents pour l'impl
 émentation efficace\nd'algorithmes d'optimisations. Dans cette représent
 ation\, chaque\ndéfinition d'une variable\, statiquement dans un programm
 e\, est\nrenommée de manière unique\, et des opérations PHI sont introd
 uites\npour fusionner des définitions venant de flots de contrôle diff
 érents.\n\nLa...
DTSTART:20090416T140000
DTEND:20090416T150000
DURATION:PT01H0M0S
LOCATION:VERIMAG/AMPHI CTL
SUMMARY:Christophe Guillon - Les représentations SSA et Psi-SSA
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4269So0Ljf@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 April 2009 - VERIMAG\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : VERIMAG\n\nAlexandre Donzé\, VERIMAG\nhttp://www-verimag.imag.fr
 /~donze/\n\n«  	 Calcul numérique d'ensembles atteignables pour les syst
 èmes hybrides et applications  » \n\nRésumé :\n\nLe calcul d'ensembles
  atteignables pour les systèmes hybrides à \ndynamiques continues nonlin
 éaires est un problème toujours difficile.\nLe principal obstacle en est
  la malédiction de la dimensionalité\, qui\ndésigne le fait que le nomb
 re d'opérations nécessaires à  sa résolution\ncroît de manière expon
 entielle avec le nombre de variables continues.\nDans le cas linéaire\, o
 n s'en sort...
DTSTART:20090409T140000
DTEND:20090409T150000
DURATION:PT01H0M0S
LOCATION:VERIMAG
SUMMARY:Alexandre Donzé -  	 Calcul numérique d'ensembles atteignables po
 ur les systèmes hybrides et applications
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-42711AbPNU@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 April 2009 - VERIMAG\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : VERIMAG\n\nDomagoj Babic\, Fujitsu Labs America\nhttp://www.domag
 oj-babic.com/\n\n« Scalable and Precise Extended Static Checking » \n\nA
 bstract:\n\nAutomatic software verification and bug finding have been a lo
 ng-held\ngoal in software engineering.  Many techniques exist\, trading of
 f\nvarying levels of automation\, coverage\, precision\, and scalability.
 \nExtended Stating Checking (ESC)\, a combination of static checking and\n
 decision procedures has emerged as a powerful technique for improving\nsof
 tware reliability.  A major limitation of the ESC paradigm is that\nit req
 uires...
DTSTART:20090402T140000
DTEND:20090402T150000
DURATION:PT01H0M0S
LOCATION:VERIMAG
SUMMARY:Domagoj Babic - Scalable and Precise Extended Static Checking
END:VEVENT
BEGIN:VEVENT
UID:20260426T171800CEST-4274thSnwv@129.88.40.24
DTSTAMP:20260426T151800Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 March 2009 - VERIMAG\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : VERIMAG\n\nThomas Gawlitza    \, Technische Universität München
 \nhttp://www2.informatik.tu-muenchen.de/~gawlitza/\n\n« Precise Relationa
 l Invariants Through Strategy Iteration  » \n\nAbstract:\n\nWe present a 
 practical algorithm for computing exact least solutions\nof systems of equ
 ations over the rationals with addition\,\nmultiplication with positive co
 nstants\, minimum and maximum. The\nalgorithm is based on strategy improve
 ment combined with solving two\nlinear programming problems for each selec
 ted strategy. We apply our\ntechnique to compute the abstract least fixpoi
 nt semantics of...
DTSTART:20090305T140000
DTEND:20090305T150000
DURATION:PT01H0M0S
LOCATION:VERIMAG
SUMMARY:Thomas Gawlitza     - Precise Relational Invariants Through Strateg
 y Iteration
END:VEVENT
END:VCALENDAR