BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//129.88.40.24//NONSGML kigkonsult.se iCalcreator 2.20.4//
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:Evènements Verimag
X-WR-CALDESC:Liste des évènements (séminaires\, thèses\, ...) au laboratoir
 e Verimag.
X-WR-TIMEZONE:Europe/Paris
BEGIN:VEVENT
UID:20260703T152041UTC-29869OzutZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 July 2026 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nLéo Colisson Palais\, UGA (LJK - CASC)\nhttps://leo.colisson.me/\n\n« 
 Towards intuitive and formal security proofs using quantum-inspired diagra
 mmatic reasoning » \n\nAbstract:\n\nGiven the high risks of many cryptogra
 phic applications\, it is fundamental to have security proofs to assert th
 eir security\, ideally automatically verified by a computer. But security 
 proofs (not even mentioning formal proofs!) present many challenges\, maki
 ng them really tedious to write and check… and things get even worse when.
 ..
DTSTART:20260702T140000
DTEND:20260702T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Léo Colisson Palais - Towards intuitive and formal security proofs 
 using quantum-inspired diagrammatic reasoning
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-29876M94jV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 21 May 2026 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Clara Bo
 urgeais\, Univ. Grenoble Alpes Grenoble INP\, LCIS
https://clarface.github.
 io/

« Modification du back-end d'un compilateur pour la sécurité : étude de
  cas sur une contre-mesure contre les attaqs par canaux auxiliaires (Compi
 ler Back-end Modification for Security : a SCA Countermeasure Case Study) 
 » 

Résumé :

La compilation sécurisante devient un élément essentiel dans la 
 sécurité.\nCependant\, les contributions dans ce domaine concernent princi
 palement des applications de contremesures dans le...
DTSTART:20260521T140000
DTEND:20260521T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Clara Bourgeais - Modification du back-end d'un compilateur pour la
  sécurité : étude de cas sur une contre-mesure contre les attaqs par canau
 x auxiliaires (Compiler Back-end Modification for Security : a SCA Counter
 measure Case Study)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2988cVVmbN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 April 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMarek BUCKI\, Twinsight Medical et UGA\nhttps://twinsight-medical.com/
 services-fr/\n\n« Conception de logiciels critiques -- retour d’expérience
  du domaine médical\, et questionnement sur la pratique et l'enseignement 
 de méthodes de design des logiciels » \n\nRésumé :\n\nJe vous propose de p
 artager avec vous mon expérience en tant que consultant auprès des entrepr
 ises dans le domaine du logiciel médical. Je vous présenterai également un
 e méthode très simple que je mets en place depuis 20 ans et qui permet...
DTSTART:20260430T140000
DTEND:20260430T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Marek BUCKI - Conception de logiciels critiques -- retour d’expérie
 nce du domaine médical\, et questionnement sur la pratique et l'enseigneme
 nt de méthodes de design des logiciels
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-29891TuJUX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 April 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMohamed Graiet\, directeur de l'ISIM Monastir\, Tunisie\nhttps://schol
 ar.google.com/citations?user=21cLtOsAAAAJ\n\n« Approche formelle Générique
  de Transfert Learning (GTL) dans le continuum CEI » \n\nRésumé :\n\nL'une
  des technologies qui devient incontournable dans le continuum CEI (Cloud\
 , Edge\, Iot) est l'apprentissage automatique (Machine Learning). En raiso
 n de l'avancement de la recherche dans ce domaine\, les algorithmes Machin
 e Learning nécessitent une capacité de calcul considérable\, ce qui est...
DTSTART:20260402T140000
DTEND:20260402T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mohamed Graiet - Approche formelle Générique de Transfert Learning 
 (GTL) dans le continuum CEI
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2990xbjpbm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 March 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nYoussouf Oualhadj\, Univ. Paris-Est Creteil Val de Marne (LACL)\nhttps
 ://www.lacl.fr/~youalhadj/\n\n« Rational Synthesis in Resource-Constrained
  Multi-Agent Systems » \n\nAbstract:\n\nRational synthesis studies the aut
 omatic construction of controllers that interact with rational agents purs
 uing their own objectives. Rather than assuming a hostile environment\, th
 is framework accounts for strategic behavior and equilibrium reasoning in 
 multi-agent systems. In this talk\, we consider rational synthesis in the 
 presence of...
DTSTART:20260319T140000
DTEND:20260319T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Youssouf Oualhadj - Rational Synthesis in Resource-Constrained Mult
 i-Agent Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2991NubwBt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 22 January 2026 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Jose
 ph Sifakis\, Verimag
https://sifakis.net/

« Bringing AI to Autonomous System
 s » 

Abstract:

Autonomous systems are distributed systems composed of agents
 \, each pursuing its own goals\, but which must coordinate to satisfy the 
 overall goals of the system. \n\nMain points covered:\n\n1. We analyze the
  characteristics of autonomous systems\, explaining that they underlie a m
 ultifaceted concept of intelligence that cannot be characterized by conver
 sational behavioral tests such as the Turing test.\n\n2. We...
DTSTART:20260122T140000
DTEND:20260122T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - Bringing AI to Autonomous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2991SL2pZB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 19 January 2026 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nAlban Reynaud\, Verimag\nhttps://github.com/AeneasVerif/mechanized-llb
 c/tree/jfla-2026\n\n« Formal Verification of Borrow-Checking by Local Comm
 utation Diagrams » \n\nAbstract:\n\nThe Rust programming language provides
  a safe alternative to C and C++ for system programming. In particular\, i
 t achieves memory safety with an ownership-based typing discipline\, provi
 ding a notion of borrows as a restriction on aliasable pointers. The disci
 pline of borrows is statically enforced by a component of the compiler cal
 led the...
DTSTART:20260119T140000
DTEND:20260119T143000
DURATION:PT0H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alban Reynaud - Formal Verification of Borrow-Checking by Local Com
 mutation Diagrams
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2992WvBvl0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 18 December 2025 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Jér
 émie Decouchant\, TU Delft (Pays-Bas)
https://sites.google.com/view/jdecouc
 hant/accueil

« Defending TEE-aided Blockchain Consensus against Rollback At
 tacks » 

Abstract:

In this talk\, I will first provide some background on Da
 mysus (EuroSys'21)\, an efficient Byzantine Fault-Tolerant (BFT) consensus
  protocol that uses Trusted Execution Environments (TEEs) to achieve resil
 ience with fewer replicas and reduced communication rounds compared to pro
 tocols like HotStuff.\n\nWe will then see how rollback...
DTSTART:20251218T140000
DTEND:20251218T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jérémie Decouchant - Defending TEE-aided Blockchain Consensus again
 st Rollback Attacks
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2993HNaW3X@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 December 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nThaïs Baudon\, University of Kent (UK)\nhttps://perso.ens-lyon.fr/t
 hais.baudon/\n\n« Compiling types and other high-level language features f
 or performance or security » \n\nAbstract:\n\nThe first part of this talk 
 will present the Ribbit language and compiler\, which aim to combine the c
 onvenience and safety of Algebraic Data Types (ADTs) with the fine control
  over memory representation required in high-performance applications. ADT
 s provide nice data abstractions and an elegant way to express functions t
 hrough...
DTSTART:20251211T140000
DTEND:20251211T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thaïs Baudon - Compiling types and other high-level language featur
 es for performance or security
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2994LsrpLp@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 December 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJannik LAVAL\, DISP - IUT Lumière de Lyon2 \nhttp://jannik-laval.eu
 /\n\n« Jumeaux Numériques : Les sciences du logiciel au cœur de la transfo
 rmation industrielle (Digital Twins: software engineering at the heart of 
 industrial transformation) » \n\nRésumé :\n\nUn jumeau numérique est défin
 i comme une représentation virtuelle (modèle) d'un objet\, d'un processus 
 ou d'un système avec lequel il est synchronisé. Le concept a émergé pour r
 épondre au besoin de contrôler\, maitriser\, prévoir des...
DTSTART:20251204T140000
DTEND:20251204T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jannik LAVAL - Jumeaux Numériques : Les sciences du logiciel au cœu
 r de la transformation industrielle (Digital Twins: software engineering a
 t the heart of industrial transformation)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2995GdPpLo@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  1 December 2025 - Room 206 (2nd floo
 r\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Sylva
 in BOULME\, Verimag
https://www-verimag.imag.fr/~boulme/

« Introduction à la
  programmation orientée objet en Crystal » 

Résumé :

Au second semestre 2025
 -2026\, un nouveau cours optionnel en Ensimag 1A sur les 'paradigmes de pr
 ogrammation' va proposer 10h de cours/TP pour découvrir le paradigme 'orie
 nté objet' à travers le langage Crystal. Ce séminaire correspond au cours 
 d'introduction de 1h pour présenter Crystal et des aspects sémantiques de 
 la programmation orientée objet.\n\nCrystal est...
DTSTART:20251201T140000
DTEND:20251201T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain BOULME - Introduction à la programmation orientée objet en 
 Crystal
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2996IWv9rN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 25 November 2025 - Room 106 (1st flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 106 (1st floor\, badged access)

Véro
 nique Cortier\, CNRS - LORIA
https://members.loria.fr/VCortier/

« Electronic
  voting: design\, attack\, and formal verification » 

Abstract:

Electronic v
 oting aims at guaranteeing apparently conflicting\nproperties: no one shou
 ld know how I voted and yet\, I should be able to\ncheck that my vote has 
 been properly counted. Electronic voting belongs\nto the large family of s
 ecurity protocols\, that aim at securing\ncommunications against powerful 
 adversaries that may read\, block\, and\nmodify messages.\nIn...
DTSTART:20251125T140000
DTEND:20251125T150000
DURATION:PT1H0M0S
LOCATION:Room 106 (1st floor\, badged access)
SUMMARY:Véronique Cortier - Electronic voting: design\, attack\, and formal
  verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2997e5aDcv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 21 November 2025 - Amphithéâtre - Ma
 ison du doctorat Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = =\n14:00 - Salle : Amphithéâtre - Maison du
  doctorat Jean Kuntzmann\n\nOussama Oulkaid\, Verimag - LIP (Lyon) - Aniah
 \nhttps://oulkaid.github.io/\n\n« Formal models of integrated circuits for
  transistor level electrical verification » \n\nAbstract:\n\nChip design i
 s a highly complex task. It involves large teams of engineers with a wide 
 range of skills. Their collective goal is to build chips that conform to t
 heir respective specifications\, and that are bug-free. Despite the effort
 s made\, it is not uncommon for manufactured chips to contain design error
 s...
DTSTART:20251121T140000
DTEND:20251121T170000
DURATION:PT3H0M0S
LOCATION:Amphithéâtre - Maison du doctorat Jean Kuntzmann
SUMMARY:Oussama Oulkaid - Formal models of integrated circuits for transist
 or level electrical verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2998fpLa4V@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 November 2025 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n15:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nYann Herklotz\, VCA lab at EPFL (CH)\nhttps://yannherklotz.com/\n\n
 « Towards scalable verification and efficient hardware generation using ve
 rified high-level synthesis tools » \n\nRésumé :\n\nLes entreprises de des
 ign hardware passent plus de 60% de leur temps uniquement à vérifier que l
 es puces qu'elles conçoivent fonctionnent comme prévu. Face à la montée en
  complexité et en besoins des accélérateurs hardware personnalisés\, les d
 esigners travaillent sur le hardware à différents niveaux...
DTSTART:20251113T150000
DTEND:20251113T170000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yann Herklotz - Towards scalable verification and efficient hardwar
 e generation using verified high-level synthesis tools
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-2999w2w756@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 16 October 2025 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:30 - Salle : Room 206 (2nd floor\, badged access)

Nico
 las Chappe\, Verimag
https://www-verimag.imag.fr/~chappen/

« Representing an
 d reasoning about nondeterministic programs » 

Abstract:

Nondeterminism play
 s a key role in various aspects of the semantics of programming languages:
  concurrency\, undefined behaviors\, weak memory models\, etc. However\, t
 he formalization of nondeterministic semantics can be subtle. I will talk 
 about several contributions I have made over the past few years to help re
 asoning about such nondeterministic programs.\n\nFirst\, I am a...
DTSTART:20251016T143000
DTEND:20251016T163000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicolas Chappe - Representing and reasoning about nondeterministic 
 programs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3000SSkPO9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 October 2025 - BBB
= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle :
  BBB

Tiago Cogumbreiro\, University of Massachusetts\, Boston
https://cogumb
 reiro.github.io/

« Verifying GPU programs with Memory Access Protocols » 

Ab
 stract:

*** Tiago is likely to applying to DR CNRS ***\n\nGPUs offer parall
 elism as a commodity\, but they are difficult to program correctly.Static 
 analyzers that guarantee data-race freedom (DRF) are essential to help pro
 grammers establish the correctness of their programs (kernels).However\, e
 xisting approaches produce too many false alarms and struggle to handle la
 rger programs.\n\nTo address these limitations we introduce...
DTSTART:20251009T140000
DTEND:20251009T150000
DURATION:PT1H0M0S
LOCATION:BBB
SUMMARY:Tiago Cogumbreiro - Verifying GPU programs with Memory Access Proto
 cols
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3000GUUgOA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 October 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nEduardo Camponogara\, Federal University of Santa Catarina\n\n\n« Form
 al Analysis of Optimization-based Controllers Approximated by ReLU Neural 
 Nets » \n\nAbstract:\n\nAbstract: This talk presents a novel reachability 
 analysis method for closed-loop systems in which an optimization-based con
 troller is approximated by a ReLU neural network. The algorithm performs e
 xact reachability analysis for discrete-time LTI systems controlled by ReL
 U neural networks\, as well as for systems both described and controlled b
 y such...
DTSTART:20251003T100000
DTEND:20251003T120000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Eduardo Camponogara - Formal Analysis of Optimization-based Control
 lers Approximated by ReLU Neural Nets
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3001IX8JEo@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nNikolaus Huber\, Uppsala University\nhttps://www.n-huber.eu\n\n« Mimos
 a: A Language Design for Modern Embedded Systems » \n\nAbstract:\n\n Embed
 ded systems have evolved beyond simple\, single microcontroller applicatio
 ns and are nowadays deployed on increasingly complex platforms\, often inc
 luding multi- and many-core processors and even custom accelerators. While
  the synchronous paradigm is frequently used to ensure real-time behaviour
  in simpler systems\, it becomes difficult to maintain this abstraction as
  hardware...
DTSTART:20250626T140000
DTEND:20250626T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nikolaus Huber - Mimosa: A Language Design for Modern Embedded Syst
 ems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3002aJ5SxZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 13 June 2025 - Room 206 (2nd floor\, 
 badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =
10:00 - Salle : Room 206 (2nd floor\, badged access)

Selma Sai
 di\, TU Braunschweig
https://www.ida.ing.tu-bs.de/team/saidi#c4984

« Connect
 ed Minds: Leveraging Collective Reasoning for Autonomous Systems » 

Résumé 
 :

Abstract: \n In this talk we will explore how collective intelligence\, a
  concept long studied in social sciences\, is becoming essential for enhan
 cing reliability and safety of distributed autonomous systems in fields li
 ke automated driving and robotics. The talk will in particular focus on th
 e need for developing novel computing paradigms for...
DTSTART:20250613T100000
DTEND:20250613T110000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Selma Saidi - Connected Minds: Leveraging Collective Reasoning for 
 Autonomous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3003UjccVg@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMaher Mallem\, INRIA Lyon\nhttps://www.lip6.fr/actualite/personnes-fic
 he.php?ident=D2525\n\n« Parameterized complexity of scheduling problems wi
 th precedence delays » \n\nAbstract:\n\nIn scheduling problems it is commo
 nplace to have a precedence graph\, which asks that some tasks must be com
 pleted before starting some other task. Time constraints which relate a ta
 sk to its predecessors - like a latency\, a setup time or a countdown time
 r - can be modeled by precedence delays. Given a precedence constraint fro
 m task i to...
DTSTART:20250612T140000
DTEND:20250612T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Maher Mallem - Parameterized complexity of scheduling problems with
  precedence delays
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3003240fCb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 June 2025 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSébastien Michelland\, Grenoble INP\, LCIS\nhttps://silent-tower.net/r
 esearch/\n\n« Secure compilation—with the compiler\, not against: first ex
 periments on 'Tracing LLVM' » \n\nAbstract:\n\nCountermeasures against fau
 lt injection or side-channels attacks that have software components all fa
 ce the same tension: on one hand\, defeating accurate\, micro-architectura
 l attack models requires precise control of assembler code\; on the other 
 hand\, security requirements are application-specific and originate in the
  source code...
DTSTART:20250605T140000
DTEND:20250605T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien Michelland - Secure compilation—with the compiler\, not a
 gainst: first experiments on 'Tracing LLVM'
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3004oGl2Np@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 April 2025 - Zoom UGA 959 9591
  1882 -- Passcode: 063113\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n14:00 - Salle : Zoom UGA 959 9591 1882 -- Pass
 code: 063113\n\nRiadh ROBBANA\, INSAT  - Université de Carthage\n\n\n« Le 
 Vote Électronique Sécurisé à l’Ère de la Blockchain : Contexte\, Défis et 
 Solutions Innovantes » \n\nRésumé :\n\nDans un contexte où la confiance et
  la transparence dans les processus électoraux deviennent essentielles\, l
 a blockchain ouvre la voie à des systèmes de vote en ligne plus fiables. C
 ette présentation explore deux protocoles novateurs de vote en ligne\, co-
 proposés avec Marwa CHAIEB\, Pascal LAFOURCADE et Souheib YOUSFI\,...
DTSTART:20250417T140000
DTEND:20250417T150000
DURATION:PT1H0M0S
LOCATION:Zoom UGA 959 9591 1882 -- Passcode: 063113
SUMMARY:Riadh ROBBANA - Le Vote Électronique Sécurisé à l’Ère de la Blockch
 ain : Contexte\, Défis et Solutions Innovantes
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3005V4vSwM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 11 April 2025 - Auditorium (Building
  IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n15:00 - Salle : Auditorium (Building IMAG)\n\nHadi Dayekh\, VERIM
 AG\n\n\n« L'apprentissage passif et actif des systèmes dynamiques non liné
 aires commutés (Passive and Active Learning of Switched Nonlinear Dynamica
 l Systems) » \n\nRésumé :\n\nLes systèmes cyber-physiques\, qui combinent 
 des processus physiques avec des éléments computationnels\, présentent sou
 vent une dynamique hybride\, avec des comportements continus et discrets e
 n interaction. De telles dynamiques hybrides apparaissent dans de nombreus
 es applications\, de la robotique aux systèmes biologiques....
DTSTART:20250411T150000
DTEND:20250411T190000
DURATION:PT4H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hadi Dayekh - L'apprentissage passif et actif des systèmes dynamiqu
 es non linéaires commutés (Passive and Active Learning of Switched Nonline
 ar Dynamical Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3005D6JM9I@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 March 2025 - Zoom (Meeting ID:
  986 9236 8072\; Passcode: 923483)\n= = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = =\n14:00 - Salle : Zoom (Meeting ID: 986
  9236 8072\; Passcode: 923483)\n\nYoussouf Oualhadj\, Université Paris-Est
  Créteil Val de Marne (LACL)\nhttps://www.lacl.fr/~youalhadj/\n\n« Robust 
 timed synthesis » \n\nAbstract:\n\nSolving games played on timed automata 
 is a well-known problem and has led to tools and industrial case studies. 
 In these games\, the first player (Controller) chooses delays and actions 
 and the second player (Environment) resolves the non-determinism of action
 s. However\, the model of timed automata suffers from mathematical idealiz
 ations...
DTSTART:20250327T140000
DTEND:20250327T160000
DURATION:PT2H0M0S
LOCATION:Zoom (Meeting ID: 986 9236 8072\; Passcode: 923483)
SUMMARY:Youssouf Oualhadj - Robust timed synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3006gKN7VN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 March 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nThomas Carle\, IRIT\, Toulouse Univ.\n\n\n« MINOTAuR: a timing-predict
 able RiscV (CVA6) core » \n\nAbstract:\n\nReal-time systems stand out from
  conventional computer systems by the existence of temporal constraints th
 at must absolutely be respected. They are generally specified in the form 
 of tasks with associated deadlines. When designing a real-time system\, an
  upper bound for the the worst-case execution time for each task must be d
 etermined\, which is then which is then used to guarantee compliance with 
 deadlines in...
DTSTART:20250313T140000
DTEND:20250313T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thomas Carle - MINOTAuR: a timing-predictable RiscV (CVA6) core
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3007knVmR2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 March 2025 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nYannick Chevalier\, Univ. Toulouse 3\, IRIT\nhttps://www.irit.fr/~Yann
 ick.Chevalier/\n\n« Logique et Cybersécurité » \n\nRésumé :\n\nLe domaine 
 de la cybersécurité offre un vaste champ d'applications au logicien\, car 
 la complexité des systèmes informatiques modernes et le besoin de garantie
  de propriétés de sécurité nécessite l'utilisation et le développement de 
 techniques de preuve automatique adaptées. Si ces techniques sont adaptées
  pour l'analyse locale de la sécurité (d'un protocole\, d'un...
DTSTART:20250306T140000
DTEND:20250306T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Chevalier - Logique et Cybersécurité
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3007R93HCV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2025 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nNiklas Kochdumper\, IRIF\, Université Paris Cité\n\n\n« Reachability
  Analysis and its Application to Verification and Control of Cyber-Physica
 l Systems » \n\nAbstract:\n\nModern cyber-physical systems\, such as auton
 omous cars\, surgical robots\, or power systems\, often exhibit highly non
 linear dynamics\, making them hard to analyze\, verify\, and control. In a
 ddition\, with the current trend towards artificial intelligence\, cyber-p
 hysical systems are often combined with neural network components\, which 
 increases their...
DTSTART:20250123T140000
DTEND:20250123T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Niklas Kochdumper - Reachability Analysis and its Application to Ve
 rification and Control of Cyber-Physical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30080hoVAe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 December 2024 - GIPSA-Lab \, Sa
 lle JM Chassery\, 11 rue des Maths \n= = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = = = =\n14:00 - Salle : GIPSA-Lab \, Salle J
 M Chassery\, 11 rue des Maths \n\nBob AUBOUIN-PAIRAULT\, Université Grenob
 le Alpes\, VERIMAG\, GIPSA-Lab\n\n\n« Data-based anesthesia process modell
 ing for online monitoring and prediction » \n\nAbstract:\n\nThis thesis ex
 plores computational methods to enhance the safety and effectiveness of an
 esthesia management\, a critical yet complex aspect of modern surgery. By 
 leveraging control theory and machine learning\, the work focuses on impro
 ving the use of intravenous drugs like propofol and remifentanil to regula
 te the depth...
DTSTART:20241212T140000
DTEND:20241212T160000
DURATION:PT2H0M0S
LOCATION:GIPSA-Lab \, Salle JM Chassery\, 11 rue des Maths 
SUMMARY:Bob AUBOUIN-PAIRAULT - Data-based anesthesia process modelling for 
 online monitoring and prediction
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3009hX7uAI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday 12 December 2024 - Amphi C002 - Bâti
 ment Ampère de l'Ensimag
= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =
15:00 - Salle : Amphi C002 - Bâtiment Ampère de l'E
 nsimag

Lucas Bueri\, Verimag


« Logics for Reasoning about the Correctness of
  Reconfigurable Distributed Systems » 

Abstract:

Distributed computing is in
 creasingly used\, and requires regular modifications to remain efficient. 
 However it can be penalizing or impossible to stop such systems\, hence th
 e use of dynamic reconfiguration. As this is a major source of errors\, th
 e need for modelling and verification is essential\, and this is what we a
 im to contribute with our logical framework.\nThis thesis...
DTSTART:20241212T150000
DTEND:20241212T190000
DURATION:PT4H0M0S
LOCATION:Amphi C002 - Bâtiment Ampère de l'Ensimag
SUMMARY:Lucas Bueri - Logics for Reasoning about the Correctness of Reconfi
 gurable Distributed Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3010TmIMVJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday  2 December 2024 - Amphitéatre MJK
= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00
  - Salle : Amphitéatre MJK

Thomas Vigouroux\, Verimag


« Analyses quantitativ
 es pour les attaquants adaptatifs (Quantitative analysis for adaptive atta
 ckers) » 

Abstract:

Evaluating the security of a program is a notoriously di
 fficult task\, but of paramount importance considering the prevalence of c
 omputer systems in today’s world.\n\nA possible path towards security eval
 uation proceeds in steps: first search for vulnerabilities or bugs within 
 the program\, then evaluate how to turn said bugs into profit\, whether it
  be information or capabilities with respect to the...
DTSTART:20241202T140000
DTEND:20241202T160000
DURATION:PT2H0M0S
LOCATION:Amphitéatre MJK
SUMMARY:Thomas Vigouroux - Analyses quantitatives pour les attaquants adapt
 atifs (Quantitative analysis for adaptive attackers)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3010rblCMZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 November 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nGrégoire BUSSONE\, ENS\, équipe Parkas (Inria-ENS)\n\n\n« Réduire l
 es copies et l'utilisation mémoire dans les langages synchrones (Reducing 
 copies and memory consumption in synchronous languages) » \n\nRésumé :\n\n
 Les systèmes réactifs embarqués sont des systèmes interagissant périodique
 ment avec leur environnement\, par la lecture de capteurs et l'activation 
 d'actionneurs. Les ingénieurs modélisent ces systèmes sous forme de schéma
 s blocs\, qui sont transcrits par le logiciel de modélisation dans un...
DTSTART:20241128T140000
DTEND:20241128T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Grégoire BUSSONE - Réduire les copies et l'utilisation mémoire dans
  les langages synchrones (Reducing copies and memory consumption in synchr
 onous languages)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3011KW65Vt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 20 November 2024 - Room 206 (2nd
  floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acc
 ess)\n\nChao Huang\, University of Southampton\, UK\nhttps://chaohuang2018
 .github.io/\n\n« Safe Reinforcement Learning with Verification in the Loss
  » \n\nRésumé :\n\n \n\nAbstract:\n\nAbstract: Reinforcement learning (RL)
  is one of the main areas in machine learning\, of which the basic idea is
  that an agent will interact with the environment and use the feedback to 
 update its control policy. Compared with the classical control algorithms\
 , RL can be used in a complex or even unknown environment. However\, due t
 o the...
DTSTART:20241120T140000
DTEND:20241120T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Chao Huang - Safe Reinforcement Learning with Verification in the L
 oss
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3012s18vhS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 November 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nLisa Maile\, TU Braunschweig (Germany)\nhttps://www.ida.ing.tu-bs.d
 e/team/lisa-maile\n\n« Real-Time Communication with Dynamic Network Traffi
 c using Time-Sensitive Networking  » \n\nAbstract:\n\nSafety-critical task
 s in today's world depend on networks that must avoid information loss or 
 unexpected delays. The growing demand for robust and responsive networks h
 as led to the emergence of Time-Sensitive Networking (TSN)\, which provide
 s deterministic data transmission for real-time communications. However\, 
 TSN lacks...
DTSTART:20241114T140000
DTEND:20241114T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lisa Maile - Real-Time Communication with Dynamic Network Traffic u
 sing Time-Sensitive Networking 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3012v4mUS2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  7 November 2024 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Aur
 èle Barrière\, EPFL
https://people.epfl.ch/aurele.barriere

« Formal Verifica
 tion Beyond Traditional Compilation » 

Abstract:

Modern dynamic programming 
 language implementations often use compilation\, but do so in atypical way
 s.  In this talk\, I focus on two concrete examples from dynamic languages
  implementations.\n\nFirst\, many dynamic language implementations use Jus
 t-in-Time (JIT) compilation for performance. JITs interleave the execution
  of a program\, its optimizations\, and native compilation. ...
DTSTART:20241107T140000
DTEND:20241107T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Aurèle Barrière - Formal Verification Beyond Traditional Compilatio
 n
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3013h4kKju@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 27 June 2024 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nNicolas Chappe\, ENS-Lyon\, LIP\, CASH\n\n\n« Executable semantics bas
 ed on Choice Trees for a concurrent subset of LLVM IR » \n\nAbstract:\n\nM
 onadic interpreters have gained increasing attention as a powerful tool fo
 r modeling and reasoning about first order languages. In the Coq ecosystem
 \, our Choice Trees (CTrees) library provides generic tools to craft such 
 monadic interpreters while supporting concurrency with nodes encoding non-
 deterministic choice. This monadic approach allows the definition of progr
 amming...
DTSTART:20240627T140000
DTEND:20240627T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicolas Chappe - Executable semantics based on Choice Trees for a c
 oncurrent subset of LLVM IR
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3014uEPnf2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 19 June 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n09:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nJean-François MONIN\, Verimag\, Polytech Grenoble.\nhttps://www-verima
 g.imag.fr/~monin/\n\n« Recent advances on the Braga method » \n\nAbstract:
 \n\nThe Braga method\, designed by D. Larchey-Wendling and J-F. Monin\, al
 lows us to define in Coq recursive programs without a priori knowledge on 
 their termination domain\, to be be extracted 'as expected' in\, say\, OCa
 ml. More precisely\, it is enough to know in advance *how* termination is 
 ensured\, but not *why*\, and this 'how' is syntactically derived from the
  intended code to...
DTSTART:20240619T093000
DTEND:20240619T113000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jean-François MONIN - Recent advances on the Braga method
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3015sMtgv0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 18 June 2024 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
09:30 - Salle : Room 206 (2nd floor\, badged access)

Matthieu
  Sozeau\, Inria (Galinette)\, Université de Nantes
https://sozeau.gitlabpag
 es.inria.fr/www/

« Verified Extraction from Coq to OCaml » 

Abstract:

Joint w
 ork of Yannick Forster\, Matthieu Sozeau and Nicolas Tabareau.\n\nOne of t
 he central original features of the Coq proof assistant is extraction\, i.
 e.\, the ability to obtain efficient programs in industrial programming la
 nguages such as OCaml\, Haskell\, or Scheme from programs written in Coq's
  expressive  dependent type theory. Extraction is of great...
DTSTART:20240618T093000
DTEND:20240618T113000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Sozeau - Verified Extraction from Coq to OCaml
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3015a2DX1D@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 17 June 2024 - Room 206 (2nd floor\, 
 badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =
16:00 - Salle : Room 206 (2nd floor\, badged access)

Basile GR
 OS\, Verimag\, UGA


« Small Inversions in Coq  » 

Abstract:

The inversion tact
 ic is one of the most powerful reasoning technique in the Coq proof assist
 ant.\nHowever\, it produces proof terms that are clunky and unpredictable.
 \n\nJ-F Monin has proposed a lightweight approach to inversion by defining
  intermediate data structures and using the destruct tactic. This new tech
 nique is more transparent and produces readable proof terms.\n\nWe propose
  a mechanized version of the technique by leveraging the...
DTSTART:20240617T160000
DTEND:20240617T180000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Basile GROS - Small Inversions in Coq 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3016HvzxM0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 17 June 2024 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSylvain BOULME\, Verimag\, Grenoble-INP Ensimag\nhttp://www-verimag.imag
 .fr/~boulme/\n\n« Toward a FFI (Foreign Function Interface) for embedding 
 untrusted imperative OCaml into Coq-verified computations. » \n\nAbstract:
 \n\nThe naive embedding of imperative OCaml functions as Coq functions wit
 h linking at extraction is unsound. A famous example of such an unsound em
 bedding is the register allocator of CompCert. In the case of CompCert\, w
 e can reasonably argue that this unsoundness should not produce a bug\, bu
 t this is...
DTSTART:20240617T140000
DTEND:20240617T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain BOULME - Toward a FFI (Foreign Function Interface) for embe
 dding untrusted imperative OCaml into Coq-verified computations.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3017sCBDoH@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 May 2024 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Mohamed 
 Maghenem\, CNRS\, GIPSA-lab\, Grenoble


« A Hybrid-Systems Framework for Dis
 tributed Gradient-Based Estimation » 

Abstract:

We address the classical pro
 blem of estimating the constant unknown parameters of a given linear input
 /output relationship.\nMotivated by large-scale estimation problems and co
 ncurrent learning\, the proposed method uses a network of gradient-descent
 -based estimators\, each of which explores only a subset of (local) input-
 output data.\nA key feature of the method is that the...
DTSTART:20240530T140000
DTEND:20240530T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mohamed Maghenem - A Hybrid-Systems Framework for Distributed Gradi
 ent-Based Estimation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3017sRUbhO@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 May 2024 - BBB\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle
  : BBB\n\nGaiyun Liu\, GREAH\nhttps://web.xidian.edu.cn/gyliu/en/index.htm
 l\n\n« Modeling\, analysis\, and supervisory control of networked discrete
  event systems » \n\nAbstract:\n\nThis talk centers around the modeling\, 
 analysis\, and supervisory control of networked discrete event systems (DE
 Ss). The first part of the talk provides a succinct introduction to Petri 
 nets. We will illustrate the application of Petri nets in the modeling and
  analysis of DESs\, using an automated manufacturing system as a demonstra
 tive example. Also\, we will show the process of designing supervisors for
  DESs using...
DTSTART:20240516T140000
DTEND:20240516T150000
DURATION:PT1H0M0S
LOCATION:BBB
SUMMARY:Gaiyun Liu - Modeling\, analysis\, and supervisory control of netwo
 rked discrete event systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3018zDTbzv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 May 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n13:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMatthieu Moy\, Univ. Lyon 1 - LIP (CASH)\nhttps://matthieu-moy.fr/spip/
 \n\n« How to Build a Broken System?  » \n\nAbstract:\n\nThe talk summarize
 s my research activities since the beginning of my carreer\, at Verimag an
 d then at LIP (Lyon). I will present some of my work on embedded system de
 sign and verification\, and on high-performance computing. I present sever
 al categories of mistakes that can be made designing these systems (functi
 onal errors\, performance issues\, etc.)\, and solutions I worked on. The 
 talk concludes...
DTSTART:20240502T130000
DTEND:20240502T150000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Moy - How to Build a Broken System? 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3019uOWjjU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 April 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nAkram Idani\, LIG (Vasco)\, Ensimag\nhttps://lig-membres.imag.fr/idani
 /\n\n« Formal Model-Driven Engineering » \n\nAbstract:\n\nMy research work
 s are dedicated to the integration of two well known paradigms: Formal Met
 hods (FM) and Model-Driven Engineering (MDE). I call this integration Form
 al MDE (FMDE). In fact\, several works have been already done in order to 
 strengthen the MDE paradigm with formal reasoning\, and therefore make it 
 more viable as far as safety and security concerns have to be addressed. W
 hen taken...
DTSTART:20240418T140000
DTEND:20240418T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Akram Idani - Formal Model-Driven Engineering
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3019tNZNW8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 15 April 2024 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSubhajit Roy\, Indian Institute of Technology Kanpur\nhttps://www.cse.ii
 tk.ac.in/users/subhajit/\n\n« Satisfiability modulo fuzzing: a synergistic
  combination of SMT solving and fuzzing » \n\nAbstract:\n\nProgramming lan
 guages and software engineering tools routinely encounter components that 
 are difficult to reason on via formal techniques or whose formal semantics
  are not even available—third-party libraries\, inline assembly code\, SIM
 D instructions\, system calls\, calls to machine learning models\, etc. Ho
 wever\, often...
DTSTART:20240415T140000
DTEND:20240415T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Subhajit Roy - Satisfiability modulo fuzzing: a synergistic combina
 tion of SMT solving and fuzzing
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3020eUsPv8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 11 April 2024 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
14:30 - Salle : Room 206 (2nd floor\, badged access)

Andrei
  Paskevich\, Univ. Paris-Saclay (LMF) - Inria Saclay (Toccata)
http://terti
 um.org/

« Coma: an intermediate verification language with explicit abstrac
 tion barriers » 

Abstract:

Coma is a minimalistic algorithmic language desig
 ned for deductive verification. It adopts the continuation-passing style w
 hich allows us to express in a natural manner the standard control structu
 res — conditionals\, loops\, subroutine calls\, and exception handling — u
 sing only three elementary constructions.\n\nThe...
DTSTART:20240411T143000
DTEND:20240411T163000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Andrei Paskevich - Coma: an intermediate verification language with
  explicit abstraction barriers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3021vluUi1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 April 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n13:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSébastien Michelland\, LCIS (UGA)\nhttps://silent-tower.net/research/
 \n\n« Abstract Interpreters: a Monadic Approach to Modular Verification » 
 \n\nAbstract:\n\nAbstract interpreters are a versatile type of static anal
 yzers based on running programs in an “abstract domain” where termination 
 is guaranteed. They're versatile because they have extensible components (
 like lattices and iteration strategies) that can be switched freely to der
 ive varied analyses that are all sound based on meta-theoretical arguments
 . But...
DTSTART:20240404T133000
DTEND:20240404T153000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien Michelland - Abstract Interpreters: a Monadic Approach to
  Modular Verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3021VbK13F@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 14 March 2024 - Room 206 (3rd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
13:15 - Salle : Room 206 (3rd floor\, badged access)

Adel N
 OUREDDINE\, University of Pau\, laboratoire LIUPPA
https://www.noureddine.o
 rg/

« Observing energy consumption: from hardware to software source code »
  

Abstract:

Reducing the energy and environmental impacts of ICT is a necess
 ity today for a sustainable computing future.\nOptimizing energy in comput
 ing systems\, from IoT objects to data centers\, can also be addresses at 
 the software level as software run and control these devices and systems.
 \nIn this talk\, we explore our approaches on observing software...
DTSTART:20240314T131500
DTEND:20240314T151500
DURATION:PT2H0M0S
LOCATION:Room 206 (3rd floor\, badged access)
SUMMARY:Adel NOUREDDINE - Observing energy consumption: from hardware to so
 ftware source code
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3022PFDmLs@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 13 March 2024 - Room 306 (3rd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n10:30 - Salle : Room 306 (3rd floor\, badged access
 )\n\nInigo Incer\, CalTech and UC Berkley\n\n\n« Towards Provably Safe and
  Secure Systems with Contract-Based Design » \n\nAbstract:\n\nThe task of 
 system design is shared by all engineering disciplines\, each coming with 
 its own techniques. In spite of their differences in tools\, there is larg
 e intersection in their conceptual approach to design. In this talk\, we e
 xploit this commonality to take an abstract view of systems and their comp
 osition. We understand systems and subsystems in terms of their assume-gua
 rantee...
DTSTART:20240313T103000
DTEND:20240313T123000
DURATION:PT2H0M0S
LOCATION:Room 306 (3rd floor\, badged access)
SUMMARY:Inigo Incer - Towards Provably Safe and Secure Systems with Contrac
 t-Based Design
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3023UwSnW7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 March 2024 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:30 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSylvain Boulmé\, Verimag\, Grenoble-INP Ensimag\nhttp://www-verimag.im
 ag.fr/~boulme/\n\n« Développement logiciel formellement vérifié: pourquoi 
 et comment ? » \n\nRésumé :\n\nDans le cadre de ma candidature au poste de
  professeur Polytech/Verimag\, je tracerai un panorama de mes travaux sur 
 le développement logiciel formellement vérifié\, depuis que j'ai commencé 
 (il y a presque 30 ans). Je situerai ces travaux dans les problématiques d
 u génie logiciel: comment limiter l'impact des bugs dans les logiciels\;..
 .
DTSTART:20240307T143000
DTEND:20240307T163000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain Boulmé - Développement logiciel formellement vérifié: pourq
 uoi et comment ?
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3024c395Xx@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 February 2024 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nPaolo Ballarini\, CentraleSupélec - MCIS\nhttps://sites.google.com/
 site/pballarini/\n\n« Hybrid-Automata Specification Language: from express
 ive stochastic model checking to parametric stochastic model checking » \n
 \nAbstract:\n\nProbabilistic model checking is concerned with providing mo
 dellers with an effective means for automatically assessing with what prob
 ability a model exhibits a given behaviour formally expressed by a tempora
 l logic specification. The ability to capture relevant behaviours depends 
 on the...
DTSTART:20240222T140000
DTEND:20240222T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Ballarini - Hybrid-Automata Specification Language: from expr
 essive stochastic model checking to parametric stochastic model checking
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3024XtaX5u@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 12 February 2024 - Auditorium (Build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n10:00 - Salle : Auditorium (Building IMAG)\n\nAina Rasoldier\,
  Inria\nhttps://ainar.as\n\n« Comment évaluer le potentiel d'une solution 
 numérique face à l'urgence écologique ? Application aux plateformes de cov
 oiturage régulier à l'échelle locale » \n\nRésumé :\n\nAu vu de l'urgence 
 écologique actuelle\, il est légitime de se demander quel est le potentiel
  des solutions numériques pour faire face à cette situation. Actuellement\
 , nous manquons de fondements scientifiques permettant de décider si une s
 olution numérique devrait être développée ou mise en place en...
DTSTART:20240212T100000
DTEND:20240212T130000
DURATION:PT3H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Aina Rasoldier - Comment évaluer le potentiel d'une solution numéri
 que face à l'urgence écologique ? Application aux plateformes de covoitura
 ge régulier à l'échelle locale
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30259UJVwu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 February 2024 - Ensimag\, Amph
 i E\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Ensimag\, Amphi E\n\nSophie Morel\, CNRS - ENS-Lyon
 \nhttp://perso.ens-lyon.fr/sophie.morel\n\n« Formalisation d'un objet geom
 etrique dans l'assistant de preuve Lean: le cas des grassmanniennes. » \n
 \nRésumé :\n\nLean (https://lean-lang.org) est un logiciel pour formaliser
  et vérifier des théories mathématiques. L'exposé s'adressera à des néophy
 tes de Lean et des assistants de preuve. Si r est un entier positif et V e
 st un espace vectoriel (par exemple $\mathbb{R}^n$)\, la r-grassmannienne 
 de V est l'ensemble des sous-espaces de dimension r de V\, qu'on peut auss
 i...
DTSTART:20240208T140000
DTEND:20240208T160000
DURATION:PT2H0M0S
LOCATION:Ensimag\, Amphi E
SUMMARY:Sophie Morel - Formalisation d'un objet geometrique dans l'assistan
 t de preuve Lean: le cas des grassmanniennes.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3026VsBfmB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 December 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nAlessandro De Palma\, INRIA\nhttps://scholar.google.com/citations?u
 ser=IIx6YsQAAAAJ&hl=en\n\n« From Neural Network Verification to Efficient 
 Robust Training » \n\nAbstract:\n\nFundamental concerns exist on the trust
 worthiness of deep learning systems\, with examples including robustness\,
  fairness\, privacy and explainability. Phenomena like adversarial example
 s prompt the need to train robust networks and to provide formal guarantee
 s on their behaviour. In this talk\, we will first introduce the neural ne
 twork...
DTSTART:20231214T140000
DTEND:20231214T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alessandro De Palma - From Neural Network Verification to Efficient
  Robust Training
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3027siicto@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 12 December 2023 - Seminar Room 2\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n09:30 - Salle : Seminar Room 2\, ground fl
 oor (Building IMAG)\n\nLeo Gourdin\, VERIMAG\nhttps://lgourd.in/defense.ht
 ml\n\n« Validation Formelle de Transformations Intra-Procédurales par Simu
 lation Symbolique Défensive (Formal Validation of Intra-Procedural Transfo
 rmations by Defensive Symbolic Simulation) » \n\nRésumé :\n\nLes compilate
 urs sont des systèmes logiciels très complexes et peuvent donc contenir de
 s bogues. Ces bogues peuvent se traduire par des erreurs au cours du proce
 ssus de compilation ou\, plus ennuyeusement encore\, par la génération d’u
 n...
DTSTART:20231212T093000
DTEND:20231212T113000
DURATION:PT2H0M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:Leo Gourdin - Validation Formelle de Transformations Intra-Procédur
 ales par Simulation Symbolique Défensive (Formal Validation of Intra-Proce
 dural Transformations by Defensive Symbolic Simulation)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3027jb4UDP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 November 2023 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Yut
 aka Nagashima\, Huawei Technologies R&D (UK)
https://unitedreasoning.com/

« 
 AI-Enhanced Theorem Proving: Tactical Approaches for Induction Problems » 
 

Abstract:

The realm of formal verification\, particularly when engaging wit
 h proof assistants built on expressive logics\, has consistently grappled 
 with limited automation in proof search. This limitation becomes even more
  pronounced when addressing inductive problems\, which are integral to the
  verification of both software and hardware systems. \n\nTo...
DTSTART:20231130T140000
DTEND:20231130T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yutaka Nagashima - AI-Enhanced Theorem Proving: Tactical Approaches
  for Induction Problems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3028eGsPAt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 17 November 2023 - Maison du doctora
 t Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:30 - Salle : Maison du doctorat Jean Kuntzmann\n\nTh
 omas Mari\, VERIMAG (MOHYTOS)\, INRIA (SPADES)\n\n\n« Explications causale
 s pour les systèmes temps réel réactifs (Causal explanations for reactive 
 real-time systems) » \n\nRésumé :\n\nAvec la complexité croissante des sys
 tèmes embarqués\, expliquer de manière concise les défaillances des systèm
 es est crucial pour comprendre ce qu'il s'est passé. Dans cette thèse\, no
 us construisons des explications causales dont la formalisation est basée 
 sur le l'analyse contrefactuelle. Pour cela\, nous avons besoin d'un...
DTSTART:20231117T143000
DTEND:20231117T163000
DURATION:PT2H0M0S
LOCATION:Maison du doctorat Jean Kuntzmann
SUMMARY:Thomas Mari - Explications causales pour les systèmes temps réel ré
 actifs (Causal explanations for reactive real-time systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3029XOlad6@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 November 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nGidon Ernst\, Ludwig-Maximilians-University of Munich\nhttps://www.
 gidonernst.de/\n\n« Automating software verification with respect to stron
 g specifications » \n\nAbstract:\n\nProving functional correctness of soft
 ware with respect to specifications of application-specific requirements r
 equires one to define these specifications in the first place\, to come up
  with coupling relations that connect the concrete state space of the impl
 ementation to its abstract counterpart\, and to prove that this correspond
 ence is...
DTSTART:20231109T140000
DTEND:20231109T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Gidon Ernst - Automating software verification with respect to stro
 ng specifications
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3029urtorZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 October 2023 - zoom\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : zoom\n\nMichael Foster\, University of Sheffield\nhttps://staffwww
 .dcs.shef.ac.uk/people/M.Foster/\n\n« Active Inference of Extended Finite 
 State Machines Without Reset » \n\nAbstract:\n\nExtended finite state mach
 ines (EFSMs) model stateful systems with internal data variables\, and hav
 e many software engineering applications\, including system analysis and t
 est case generation. Where such models are not available\, it is desirable
  to reverse engineer them by observing system behaviour\, but existing app
 roaches are either limited to classical FSM models with no internal data s
 tate\, or...
DTSTART:20231019T140000
DTEND:20231019T160000
DURATION:PT2H0M0S
LOCATION:zoom
SUMMARY:Michael Foster - Active Inference of Extended Finite State Machines
  Without Reset
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3030zdxIc5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 12 October 2023 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Nico
 la Gigante\, Free University of Bozen-Bolzano\, Italy
https://www.inf.unibz
 .it/~gigante/

« Temporal Logics Modulo Theories for Infinite-State Verifica
 tion » 

Abstract:

Linear Temporal Logic (LTL) is one of the most common form
 alisms for expressing\nproperties of systems in formal verification and ot
 her fields. However\, its\npropositional nature limits its applicability t
 o finite-state systems\, whereas\nmany interesting scenarios often require
  reasoning in an infinite-state\nsettings. Indeed\, many...
DTSTART:20231012T140000
DTEND:20231012T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicola Gigante - Temporal Logics Modulo Theories for Infinite-State
  Verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3031aliPm0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 12 July 2023 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nDejan Nickovic\, AIT\, Vienna\n\n\n« Attribute Repair for Threat Preve
 ntion    » \n\nAbstract:\n\nWe propose a model-based procedure for prevent
 ing security threats using formal models. We encode system models and thre
 ats as satisfiability modulo theory (SMT) formulas. This model allows us t
 o ask security questions as satisfiability queries. We formulate threat pr
 evention as an optimization problem over the same formulas. The outcome of
  our threat prevention procedure is a suggestion of model attribute repair
  that...
DTSTART:20230712T140000
DTEND:20230712T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Dejan Nickovic - Attribute Repair for Threat Prevention   
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3032n633F1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  7 July 2023 - Room 206 (2nd floor\, b
 adged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =
10:00 - Salle : Room 206 (2nd floor\, badged access)

Akshay Mam
 bakam\, VERIMAG\, Université Grenoble Alpes


« Parametric timed formalisms f
 or specification and monitoring (PhD defense) » 

Abstract:

PhD Defense Frida
 y/7th of July 2023/Room 206\, VERIMAG\, IMAG Building\, 700 Av. Centrale\,
  38400 Saint-Martin-d'Hères\nTitle: Parametric timed formalisms for specif
 ication and monitoring (PhD defense)\nBy Akshay Mambakam\, VERIMAG\, Unive
 rsité Grenoble Alpes\nSupervised by Nicolas Basset (UGA\, VERIMAG)\, Thao 
 Dang (CNRS\, VERIMAG)\n\nCyber-Physical Systems (CPS) like smart...
DTSTART:20230707T100000
DTEND:20230707T120000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Akshay Mambakam - Parametric timed formalisms for specification and
  monitoring (PhD defense)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3033lnL1g7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  6 July 2023 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Nicola 
 Paoletti\, King's College London
https://nicolapaoletti.com/

« Causal Tempor
 al Reasoning for Markov Decision Processes » 

Abstract:

Abstract:\nWe introd
 uce PCFTL (Probabilistic CounterFactual Temporal Logic)\, a new probabilis
 tic temporal logic for the verification of Markov Decision Processes (MDP)
 . PCFTL is the first to include operators for causal reasoning\, allowing 
 us to express interventional and counterfactual queries. Given a path form
 ula phi\, an interventional property is concerned with the...
DTSTART:20230706T140000
DTEND:20230706T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Nicola Paoletti - Causal Temporal Reasoning for Markov Decision Pro
 cesses
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3033KZFVnz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 30 June 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nSayan Mitra\, University of Illinois Urbana-Champaign \n\n\n« Assuring S
 afety of Learning-Enabled Systems with Perception Contracts.  » \n\nAbstra
 ct:\n\nFormal verification of deep learning models remains challenging\, a
 nd yet they are becoming integral in many safety-critical autonomous syste
 ms. We present framework for certifying end-to-end safety of learning-enab
 led autonomous systems using perception contracts. The method flows from t
 he observation that learning-based perception is often used for state esti
 mation\, and...
DTSTART:20230630T140000
DTEND:20230630T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sayan Mitra - Assuring Safety of Learning-Enabled Systems with Perc
 eption Contracts. 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3034TjPgt2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - HDR - Friday  9 June 2023 - Auditorium\, ground floor 
 (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
15:00 - Salle : Auditorium\, ground floor (Building IMAG)

cla
 ire maiza\, GrenobleINP/ Ensimag\, Verimag


« Analyses matérielles et logici
 elles pour obtenir une analyse temporelle précise et efficace (Hardware an
 d software analyses for precise and efficient timing analysis) » 

Abstract:
 

***changement de salle: auditorium***\n\nJ'ai le plaisir de vous inviter à
  ma soutenance d'HDR qui aura lieu le 9 juin 2023 dans **l'auditorium** au
  rez-de-chaussée du bâtiment IMAG:\n\n'Hardware and software analyses for 
 precise and efficient timing analysis'\n\nAbstract:...
DTSTART:20230609T150000
DTEND:20230609T170000
DURATION:PT2H0M0S
LOCATION:Auditorium\, ground floor (Building IMAG)
SUMMARY:claire maiza - Analyses matérielles et logicielles pour obtenir une
  analyse temporelle précise et efficace (Hardware and software analyses fo
 r precise and efficient timing analysis)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3035VRAF0d@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  9 June 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nJean-Luc Scharbarg\, IRIT\n\n\n« Trends in real-time embedded networks: 
 towards TSN » \n\nAbstract:\n\nReal-time Ethernet has been used to deal wi
 th the always increasing communication needs of embedded systems and funct
 ions in different contexts\, e.g. automotive\, aeronautic or space. It can
  offer a deterministic networking service to a large amount of control and
  command flows. The determinism guarantee relies on a mathematical proof t
 hat leads to a lightly loaded network. Therefore a significant amount of w
 ork has been...
DTSTART:20230609T100000
DTEND:20230609T110000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jean-Luc Scharbarg - Trends in real-time embedded networks: towards
  TSN
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3035gEh9lg@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  8 June 2023 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Basile 
 Pesin\, Inria PARKAS - ENS-Ulm
https://vertmo.org/

« Verifying a compiler fo
 r a synchronous dataflow language with state machines in Coq » 

Abstract:

Th
 e Velus project is a formalization of a synchronous block-diagram language
 \, based on elements from Lustre and Scade 6\, in the Coq interactive theo
 rem prover. \n\nIt includes a relational formalization of the dataflow sem
 antics of the language\, a compiler that uses the CompCert C compiler as a
  backend to produce assembly code\, and an end-to-end proof...
DTSTART:20230608T140000
DTEND:20230608T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Basile Pesin - Verifying a compiler for a synchronous dataflow lang
 uage with state machines in Coq
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3036kbVCrg@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 25 May 2023 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Henri-Pi
 erre Charles\, CEA\, Grenoble


« Spécialisation de code binaire au run-time 
 : pour gagner du temps et de l'énergie\, il faut rouler à l'HybroGen » 

Rés
 umé :

La spécialisation de code permet de simplifier un code exécutable.\n
 \nRéaliser la spécialisation au run-time permet de profiter des valeurs co
 nnues uniquement à l'exécution.\n\nQuels outils sont nécessaires pour le r
 éaliser ?


= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
Other seminars at VERIMAG -...
DTSTART:20230525T140000
DTEND:20230525T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Henri-Pierre Charles - Spécialisation de code binaire au run-time :
  pour gagner du temps et de l'énergie\, il faut rouler à l'HybroGen
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3037Low5kr@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  4 May 2023 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Joseph S
 ifakis\, VERIMAG
http://www-verimag.imag.fr/~sifakis/

« Artificial Intellige
 nce and autonomous systems  » 

Abstract:

We discuss the adequacy of the crit
 eria for assessing the intelligent behavior of agents. We argue that the T
 uring test fails to capture the many facets of human intelligence and prop
 ose a 'replacement test' that relativizes the concept of intelligence base
 d on the ability of an agent to replace successfully another agent in perf
 orming a task. \nAutonomous systems incorporate the...
DTSTART:20230504T140000
DTEND:20230504T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - Artificial Intelligence and autonomous systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3037Pj9Pru@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 28 April 2023 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n11:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nThomas Jensen\, INRIA\nhttps://www.irisa.fr/lande/jensen/\n\n« An inform
 ation flow logic based on partial equivalence relations » \n\nAbstract:\n
 \nInformation flow control (IFC) is a key element for ensuring that progra
 ms do not leak confidential data\, and a number of enforcement mechanisms 
 (based on static analysis\, run-time monitoring\, or combinations thereof)
  have been proposed. In this talk we will present a logic for reasoning ab
 out information flow properties formalised in an assertion language based 
 on partial...
DTSTART:20230428T110000
DTEND:20230428T120000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Thomas Jensen - An information flow logic based on partial equivale
 nce relations
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3038o0jv2F@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 April 2023 - Room 206 (2nd floor\
 , badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nEtienne Boespflug\, Vérimag\n\n\n« Outils pour l’analyse de code et de c
 ontre-mesures pour l'injection de fautes multiples » \n\nRésumé :\n\nLes a
 ttaquants actifs sont capables d'intervenir sur le comportement du program
 me pendant son exécution. En particulier\, les attaques par injection de f
 autes\, qui ont émergé à l'origine en tant que méthode de test contre les 
 fautes matérielles accidentelles\, sont un vecteur d'attaque puissant dans
  lequel l'attaquant peut injecter des fautes pendant l'exécution à l'aide.
 ..
DTSTART:20230428T140000
DTEND:20230428T170000
DURATION:PT3H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Etienne Boespflug - Outils pour l’analyse de code et de contre-mesu
 res pour l'injection de fautes multiples
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3039JDZLtt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 March 2023 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Clemen
 tine Gritti\, University of Canterbury -- New Zealand
https://researchprofi
 le.canterbury.ac.nz/Researcher.aspx?Researcherid=5365673

« Internet of Thin
 gs: From modern cryptography to post-quantum cryptography » 

Abstract:

In th
 is presentation\, I will focus on security and privacy in the Internet of 
 Things (IoT)\, using modern asymmetric cryptography (e.g. RSA\, Diffie-Hel
 lman) and post-quantum cryptography (e.g.\, based on lattices).\n\nIoT is 
 an environment with its challenges and limitations. Application...
DTSTART:20230309T140000
DTEND:20230309T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Clementine Gritti - Internet of Things: From modern cryptography to
  post-quantum cryptography
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3040Ea2Por@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  6 March 2023 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
10:00 - Salle : Room 206 (2nd floor\, badged access)

Frederic
  Fort\, IRT Saint Exupery


« Programing adaptive real-time systems » 

Abstrac
 t:

A real-time system is a system whose correctness depends not only on the
  correctness of the values it produces\, but also on the time when it prod
 uces those values. The rate at which it must produce values is defined by 
 the environment it operates in.\n\nWhen programming such a system\, it is 
 important that the programming language allows to reason about the constra
 ints introduced by this context. Synchronous languages are...
DTSTART:20230306T100000
DTEND:20230306T110000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Frederic Fort - Programing adaptive real-time systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3040LvO66l@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 March 2023 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nArthur Perais\, TIMA\nhttp://aperais.fr/\n\n« Exploring Instruction Fu
 sion Opportunities in General Purpose Processors » \n\nAbstract:\n\nThe Co
 mplex Instruction Set Computer (CISC) paradigm has led to the introduction
  of instruction cracking in which an architectural instruction is divided 
 into multiple microarchitectural instructions (µ-ops). However\, the dual 
 concept\, instruction fusion is also prevalent in modern microarchitecture
 s to maximize resource utilization. In essence\, some architectural instru
 ctions are...
DTSTART:20230302T140000
DTEND:20230302T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Arthur Perais - Exploring Instruction Fusion Opportunities in Gener
 al Purpose Processors
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3041D38MWe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 23 February 2023 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
11:00 - Salle : Room 206 (2nd floor\, badged access)

Léo
  Robert\, LIMOS (Université Clermont Auvergne)
https://perso.limos.fr/~leor
 ober

« How fast do you heal? A taxonomy for post-compromise security in sec
 ure-channel establishment. » 

Abstract:

* WARNING: rescheduled because of st
 rikes with unusual time (11h) *\nPost-Compromise Security (PCS) is a prope
 rty of secure-channel establishment schemes\, which limits the security br
 each of an adversary that has compromised one of the endpoint to a certain
  number of messages\, after which the channel heals. An...
DTSTART:20230223T110000
DTEND:20230223T130000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Léo Robert - How fast do you heal? A taxonomy for post-compromise s
 ecurity in secure-channel establishment.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3042AlIR2V@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 February 2023 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n15:30 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nImen Sayar\, IRIT-SM@RT\nhttps://hal.science/search/index?q=imen+sa
 yar\n\n« Collaborative development of safe and secure cyber-physical syste
 ms » \n\nAbstract:\n\nOver the last decades\, the complexity of systems ha
 s significantly increased\, leading to a rise in the need for improving th
 e methodology and tools for developing such systems. The quality of cyber-
 physical systems (CPS) depends not only on their ability to meet customer 
 needs but also on their security against software attacks. In this present
 ation\, I...
DTSTART:20230223T153000
DTEND:20230223T173000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Imen Sayar - Collaborative development of safe and secure cyber-phy
 sical systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3042j824bU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 20 February 2023 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nanais durand\, univ. clermont auvergne\n\n\n« Exploration of 3D envir
 onments by swarms of luminous autonomous robots.  » \n\nAbstract:\n\nCoord
 inating swarms of luminous autonomous robots is an active branch of distri
 buted computing. These robots are equipped with motion actuators\, visibil
 ity sensors\, and a few lights of different colors. Despite their weak cap
 abilities (short-range visibility sensors\, limited memory\, no GPS\, ...)
 \, these robots can cooperate\, without any central control\, to achieve c
 omplex tasks. In...
DTSTART:20230220T140000
DTEND:20230220T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:anais durand - Exploration of 3D environments by swarms of luminous
  autonomous robots. 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3043OuKu1z@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  6 February 2023 - Room 206 (2nd floo
 r\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Bruno
  FERRES\, LIP (equipe CASH)


«  Using Model Checking for Electrical Rule Che
 cking of Integrated Circuits at Transistor Level » 

Abstract:

This seminar i
 ntroduces my research thematics\, which focus on high level\nmethodologies
  for design and verification of electronic circuits.\nAfter a small summar
 y of my past activities\, first as an engineering\nstudent and then as a P
 hD student\, this talk with present my current\nwork at LIP (Lyon).\n\nThi
 s work is done within a collaboration with Verimag (with...
DTSTART:20230206T140000
DTEND:20230206T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Bruno FERRES -  Using Model Checking for Electrical Rule Checking o
 f Integrated Circuits at Transistor Level
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30447fNvlm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 February 2023 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Cha
 rlie Jacomme\, Team Prosecco of Inria Paris
https://charlie.jacomme.fr/

« A 
 comprehensive\, formal and automated analysis of the EDHOC protocol.  » 

Ab
 stract:

We believe that formal methods in security should be leveraged in a
 ll the standardisation's of security protocols in order to strengthen thei
 r guarantees. To be effective\, such analyses should be:\n* maintainable: 
 the security analysis should be performed on every step of the way\, i.e. 
 each iteration of the draft\;\n* pessimistic: all possible...
DTSTART:20230202T140000
DTEND:20230202T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Charlie Jacomme - A comprehensive\, formal and automated analysis o
 f the EDHOC protocol. 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3044mjGGkS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 26 January 2023 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Son 
 Ho\, Team Prosecco of Inria Paris
https://www.sonho.fr/

« Aeneas: Rust Verif
 ication by Functional Translation » 

Abstract:

We present Aeneas\, a new ver
 ification toolchain for Rust programs based on a lightweight functional tr
 anslation. We leverage Rust's rich region-based type system to eliminate m
 emory reasoning for a large class of Rust programs by translating them to 
 a pure lambda-calculus\, as long as they do not rely on interior mutabilit
 y or unsafe code.\n\nDoing so\, we relieve the proof engineer...
DTSTART:20230126T140000
DTEND:20230126T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Son Ho - Aeneas: Rust Verification by Functional Translation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3045SHdnkZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 16 December 2022 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nVincent  Morice\, STMicroelectronics \n\n\n« Modèle haut niveau de mic
 rocontrôleurs basé sur les dépendances pour le développement de logiciel e
 mbarqué » \n\nRésumé :\n\nCette thèse s'intéresse au développement de logi
 ciel embarqué sur microcontrôleurs. La complexité croissante de ces circui
 ts rend le développement plus difficile\, de nombreuses tâches devant déso
 rmais être pilotées par le logiciel\, comme la gestion des horloges et de 
 l'alimentation électrique des différentes parties du circuit....
DTSTART:20221216T100000
DTEND:20221216T123000
DURATION:PT2H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Vincent  Morice - Modèle haut niveau de microcontrôleurs basé sur l
 es dépendances pour le développement de logiciel embarqué
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3046Us5loL@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 13 December 2022 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nEzio Bertocci\, TU Wien\n\n\n« Automatic Invariant Generations for P
 robabilistic Loops (Automatic Invariant Generations for Probabilistic Loop
 s) » \n\nRésumé :\n\nProbabilistic programs (PPs)\, originally employed in
  cryptographic/privacy protocols and randomized algorithms\, are now gaini
 ng momentum due to the several emerging applications in the areas of machi
 ne learning and AI. Probabilistic programming languages include native con
 structs for sampling distributions allowing to freely mix deterministic an
 d...
DTSTART:20221213T140000
DTEND:20221213T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Ezio Bertocci - Automatic Invariant Generations for Probabilistic L
 oops (Automatic Invariant Generations for Probabilistic Loops)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3046xGaumR@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  8 December 2022 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Koh
 ei SUENAGA\, Kyoto University
http://www.fos.kuis.kyoto-u.ac.jp/~ksuenaga/

«
  Oblivious Online Monitoring for Safety LTL Specification via Fully Homomo
 rphic Encryption » 

Abstract:

In many Internet of Things (IoT) applications\
 , data sensed by an IoT\ndevice are continuously sent to the server and mo
 nitored against a\nspecification. Since the data often contain sensitive i
 nformation\, and\nthe monitored specification is usually proprietary\, bot
 h must be kept\nprivate from the other end. We propose a...
DTSTART:20221208T140000
DTEND:20221208T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Kohei SUENAGA - Oblivious Online Monitoring for Safety LTL Specific
 ation via Fully Homomorphic Encryption
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3047GReWaV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nXavier Denis\, LRI\nhttps://www.lri.fr/~xldenis/\n\n« Deductive Ver
 ification of Higher-Order Rust Programs » \n\nAbstract:\n\nThe Rust langua
 ge aims to empower systems software programmers by offering them safe\, an
 d powerful linguistic abstractions to solve their problems. One of the mos
 t important are iterators which provide a composable mechanism to express 
 traversal and modification of structures. However when verifying code iter
 ators pose many problems\, they can be non-deterministic\, infinite\, high
 er-order\, and...
DTSTART:20221124T140000
DTEND:20221124T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Xavier Denis - Deductive Verification of Higher-Order Rust Programs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3048iu5wPo@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 November 2022 - Room 285 (badged
  access\, limited occupancy)
= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =
10:00 - Salle : Room 285 (badged access\, limit
 ed occupancy)

Jean-François Monin\, VERIMAG
https://www-verimag.imag.fr/~mon
 in/

« Programmation récursive en Coq et intensionalité : oh le beau cas ! (
 Recursive Programming in Coq and Intensionality : oh happy case !) » 

Résum
 é :

L'exposé porte sur une solution d'un exercice issu d'une discussion\nré
 cente avec David : donner un programme itératif (récursif terminal)\npour 
 l'aplatissement d'un arbre à embranchements non bornés et en\ndémontrer la
  correction.\n\nÉcrire un tel programme en...
DTSTART:20221124T100000
DTEND:20221124T113000
DURATION:PT1H30M0S
LOCATION:Room 285 (badged access\, limited occupancy)
SUMMARY:Jean-François Monin - Programmation récursive en Coq et intensional
 ité : oh le beau cas ! (Recursive Programming in Coq and Intensionality : 
 oh happy case !)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3049hEkj6P@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nArnaud Sangnier\, IRIF\n\n\n« Parameterized verification of Network
 s with selective broadcast » \n\nAbstract:\n\nWe study decision problems f
 or parameterized verification of a formal model of networks with broadcast
  communication in which the number of participants as the communication to
 poloby are paramters. The configuration of such a model can be represented
  thanks to graphs where nodes are labelled with states of individual proce
 sses. Adjacent nodes represent single-hop neighbors. Processes are finite 
 state...
DTSTART:20221117T140000
DTEND:20221117T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Arnaud Sangnier - Parameterized verification of Networks with selec
 tive broadcast
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3049hx9Pll@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 November 2022 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nStephan Plassart\, LCA2 EPFL\nhttps://plassart.github.io/\n\n« Equi
 valent Versions of Total Flow Analysis » \n\nAbstract:\n\nTotal Flow Analy
 sis (TFA) is a method for conducting the worst-case analysis of time sensi
 tive networks without cyclic dependencies. In networks with cyclic depende
 ncies\, Fixed-Point TFA introduces artificial cuts\, analyses the resultin
 g cycle-free network with TFA\, and iterates. If it converges\, it does pr
 ovide valid performance bounds. We show that the choice of the specific cu
 ts used by...
DTSTART:20221110T140000
DTEND:20221110T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Stephan Plassart - Equivalent Versions of Total Flow Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3050xuheUF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 27 October 2022 - Auditorium (Build
 ing IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
14:00 - Salle : Auditorium (Building IMAG)

Hugo Gimbert\, CNRS (LaB
 RI)
https://www.labri.fr/perso/gimbert/

« Les algorithmes de ParcourSup » 

Ré
 sumé :

'Parcoursup' est la plateforme nationale d’admission en première ann
 ée de l’enseignement supérieur\, mise en place en 2018 suite au vote de la
  loi ORE.\nCette plateforme assure la mise en relation des formations du s
 upérieur avec les candidats à ces formations\, plus de 900.000 en 2022.\nD
 es algorithmes envoient automatiquement et quotidiennement des proposition
 s aux candidats\, \nsur la base des voeux...
DTSTART:20221027T140000
DTEND:20221027T150000
DURATION:PT1H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hugo Gimbert - Les algorithmes de ParcourSup
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3051pr38C2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2022 - Seminar Room\
 , ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground flo
 or (Building IMAG)\n\nMerigoux Denis\, INRIA Prosecco\nhttps://merigoux.ov
 h/\n\n« Rules\, Computation and Politics: Scrutinizing Unnoticed Programmi
 ng Choices in French Housing Benefits » \n\nAbstract:\n\nSocial benefits a
 nd taxes are computed by machines in almost all developed countries. The s
 ize and complexity of the programs implementing these computations is big 
 enough that serious questions can be raised about their safety\, correctne
 ss and faithfulness to the law. In this presentation\, we will share our e
 xperience...
DTSTART:20220929T140000
DTEND:20220929T150000
DURATION:PT1H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Merigoux Denis - Rules\, Computation and Politics: Scrutinizing Unn
 oticed Programming Choices in French Housing Benefits
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3052EMxSXS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  9 September 2022 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Luca
 s Bueri\, Verimag


« On an Invariance Problem for Parameterized Concurrent S
 ystems » 

Abstract:

We consider concurrent systems consisting of replicated 
 finite-state\n  processes that synchronize via joint interactions in a net
 work with\n  user-defined topology. The system is specified using a resour
 ce\n  logic with a multiplicative connective and inductively defined\n  pr
 edicates\, reminiscent of Separation Logic \cite{Reynolds02}. The\n  probl
 em we consider is if a given formula in this logic defines...
DTSTART:20220909T140000
DTEND:20220909T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lucas Bueri - On an Invariance Problem for Parameterized Concurrent
  Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30528BofH7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 12 July 2022 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nDejan Nickovic\, AIT Vienna\n\n\n« Information-flow Interfaces » \n\nAbs
 tract:\n\nContract-based design is a promising methodology for taming the 
 complexity of developing sophisticated systems. A formal contract distingu
 ishes between assumptions\, which are constraints that the designer of a c
 omponent puts on the environments in which the component can be used safel
 y\, and guarantees\, which are promises that the designer asks from the te
 am that implements the component. A theory of formal contracts can be form
 alized as an...
DTSTART:20220712T140000
DTEND:20220712T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Dejan Nickovic - Information-flow Interfaces
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3053S8iuu7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 July 2022 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nFranz Meyer\, Universidad ORT Uruguay\n\n\n« Towards Efficient Active 
 Learning of PDFA » \n\nAbstract:\n\nWe propose a new active learning algor
 ithm for PDFA based on three main aspects: a congruence over states which 
 takes into account next-symbol probability distributions\, a quantization 
 that copes with differences in distributions\, and an efficient tree-based
  data structure. Experiments showed significant performance gains with res
 pect to reference implementations.\n\n\n= = = = = = = = = = = = = = = = = 
 = = = = = = = =...
DTSTART:20220707T140000
DTEND:20220707T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Franz Meyer - Towards Efficient Active Learning of PDFA
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3054gz2xSA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 21 June 2022 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Joel Goo
 ssens\, ULB\, Brussels
https://be.linkedin.com/in/joelygoossens

« Real-Time 
 Computing\, Multiprocessor scheduling problems » 

Abstract:

Tutorial on real
 -time computing: second seminar\n\nMultiprocessor scheduling problems \n\n
 - Partitioned vs. Global scheduling\n- First Fit Decreasing Utilization al
 gorithm\n- Negative results:\n    - No online optimal scheduler exists\n  
   - Scheduling anomalies\n- Positive results:\n    - PFAIR Scheduling\n   
  - Global EDF and EDF^K schedulers


= = = = = = = = = = = =...
DTSTART:20220621T140000
DTEND:20220621T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Real-Time Computing\, Multiprocessor scheduling pro
 blems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3054Ewu5Fs@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 16 June 2022 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Joel Go
 ossens\, ULB\, Brussels
https://be.linkedin.com/in/joelygoossens

« Periodici
 ty of real-time priority driven schedulers with preemption delay on unipro
 cessor » 

Abstract:

In this seminar\, we study a problem related to the sche
 dulability of systems with *preemptive* tasks for single-core architecture
 s.\nWe consider the notion of simulation interval for real-time priority d
 riven schedulers upon uniprocessor. Our study focuses on a model where *pr
 eemption costs* are explicitly considered\, i.e.\, the time...
DTSTART:20220616T140000
DTEND:20220616T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Periodicity of real-time priority driven schedulers
  with preemption delay on uniprocessor
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3055Hj9F35@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 14 June 2022 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Joel Goo
 ssens\, ULB\, Brussels
https://be.linkedin.com/in/joelygoossens

« Real-Time 
 Computing\, foundation » 

Abstract:

This seminar is the first part of a tuto
 rial on real-time computing.\n\nFoundations (1\,5 hours)\n\n- Introduction
  to embedded real-time computing and scheduling problems\n- Model of compu
 tation (periodic and sporadic tasks)\n- Fixed Task Priority: Rate Monotoni
 c & Deadline Monotonic\n- Fixed Job Priority: Earliest Deadline First (EDF
 )\n- Schedulability tests & main results


= = = = = = = = = =...
DTSTART:20220614T140000
DTEND:20220614T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joel Goossens - Real-Time Computing\, foundation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3056pzjm7s@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  3 June 2022 - Auditorium (Building I
 MAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
09:00 - Salle : Auditorium (Building IMAG)

CAPITAL Workshop \, sCalable 
 And PrecIse Timing AnaLysis for multicore
https://www-verimag.imag.fr/Works
 hop-CAPITAL-2022-sCalable-And.html?lang=fr

« Workshop CAPITAL 2022 : sCalab
 le And PrecIse Timing AnaLysis for multicore platforms (Workshop CAPITAL 2
 022 : sCalable And PrecIse Timing AnaLysis for multicore platforms) » 

Résu
 mé :

Free attendance but mandatory registration by May 1st\, 2022.\n\nFrida
 y\, June 3th\, 2022. Grenoble and possible remote attendance\n\nwith a key
 note of Renato Mancuso\,  Boston University 'From Memory...
DTSTART:20220603T090000
DTEND:20220603T150000
DURATION:PT6H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:CAPITAL Workshop  - Workshop CAPITAL 2022 : sCalable And PrecIse Ti
 ming AnaLysis for multicore platforms (Workshop CAPITAL 2022 : sCalable An
 d PrecIse Timing AnaLysis for multicore platforms)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3056uAHc8n@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Tuesday 31 May 2022 - Seminar Room\, ground f
 loor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
09:30 - Salle : Seminar Room\, ground floor (Building I
 MAG)

Matheus Schuh\, Verimag / Kalray
http://www-verimag.imag.fr/~schuhm/

« S
 afe Implementation of Hard Real-Time Applications on Many-Core Platforms »
  

Abstract:

Hard real-time systems are designed to be functionally correct\,
  but also require\nthe guarantee of timing constraints. Completing the tas
 k at hand within a given\ndeadline is part of the specification and failin
 g to accomplish this can lead to\nserious consequences. Some examples of s
 uch systems are the central command of\nan airplane\,...
DTSTART:20220531T093000
DTEND:20220531T113000
DURATION:PT2H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Matheus Schuh - Safe Implementation of Hard Real-Time Applications 
 on Many-Core Platforms
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3057Mj7m9z@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  5 May 2022 - https://bans.imag.fr/
 b/rad-ofn-9t8-rqc
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
10:00 - Salle : https://bans.imag.fr/b/rad-ofn-9t8-rqc

Nath
 alie Bertrand\, INRIA Rennes
http://people.rennes.inria.fr/Nathalie.Bertran
 d/

« Reconfigurable Parameterized Broadcast Networks: Minimal Size and Exec
 ution Length for Coverability » 

Abstract:

Broadcast networks allow one to m
 odel networks of identical nodes communicating\nthrough message broadcasts
 . Their parameterized verification aims at proving a\nproperty holds for a
 ny number of nodes\, under any communication topology\, and on\nall possib
 le executions. We focus on the coverability problem which...
DTSTART:20220505T100000
DTEND:20220505T120000
DURATION:PT2H0M0S
LOCATION:https://bans.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Nathalie Bertrand - Reconfigurable Parameterized Broadcast Networks
 : Minimal Size and Execution Length for Coverability
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30582mTibC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 April 2022 - https://bans.imag
 .fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n10:00 - Salle : https://bans.imag.fr/b/rad-ofn-9t8
 -rqc\n\nBenedikt Bollig\, LSV\, ENS Saclay\nhttps://www.benedikt-bollig.or
 g/\n\n« Identifiers in Registers - Describing Network Algorithms with Logi
 c » \n\nAbstract:\n\nWe propose a formal model of distributed computing ba
 sed on register automata that captures a broad class of synchronous networ
 k algorithms. The local memory of each process is represented by a finite-
 state controller and a fixed number of registers\, each of which can store
  the unique identifier of some process in the network. To underline the na
 turalness...
DTSTART:20220407T100000
DTEND:20220407T120000
DURATION:PT2H0M0S
LOCATION:https://bans.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Benedikt Bollig - Identifiers in Registers - Describing Network Alg
 orithms with Logic
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3058asu74W@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 March 2022 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

David 
 Monniaux\, VERIMAG
https://www-verimag.imag.fr/~monniaux/

« The trusted comp
 uting base of the CompCert verified compiler » 

Abstract:

(ESOP 2022 talk)\n
 \nCompCert is the first realistic formally verified compiler: it provides 
 a machine-checked mathematical proof that the code it generates matches th
 e source code.\n\nBut what do these impressive claims mean exactly?\n\nWe 
 comprehensively analyze aspects of CompCert where errors could lead to inc
 orrect code being generated.\nPossible issues range from...
DTSTART:20220324T140000
DTEND:20220324T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:David Monniaux - The trusted computing base of the CompCert verifie
 d compiler
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3059csZVea@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 March 2022 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nPaolo Torrini\, Inria Sardes\n\n\n« A CompCert Backend with Symbolic E
 ncryption » \n\nAbstract:\n\nIntrinSec is a secure cryptoprocessor\, desig
 ned by Oliver Savry's team of CEA-LETI\, that extends RISC-V with hardware
  support to monitor control-flow hijacks. We present our CompCert formal m
 odel of its assembly language\, the control-flow protections inserted by o
 ur CompCert backend\, and their associated formal proofs of correctness.\n
 \n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\nOther...
DTSTART:20220310T140000
DTEND:20220310T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Torrini - A CompCert Backend with Symbolic Encryption
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3060cAKVhr@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 March 2022 - Zoom link\n= = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:30
  - Salle : Zoom link\n\nXiaowei Huang\, University of Liverpool\nhttps://c
 gi.csc.liv.ac.uk/~xiaowei/\n\n« Machine Learning Safety » \n\nAbstract:\n
 \nMachine learning has been proven practical in solving complex problems t
 hat cannot be solved before\, but was also found to be not without any sho
 rtfall. This talk will address the safety and security risks of applying m
 achine learning to safety critical systems. We will provide an overview of
  the known risks in the machine learning development cycle\, discussing a 
 number of properties such as generalisation\, uncertainty\, robustness\, p
 oisoning\,...
DTSTART:20220303T143000
DTEND:20220303T163000
DURATION:PT2H0M0S
LOCATION:Zoom link
SUMMARY:Xiaowei Huang - Machine Learning Safety
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30605sTpew@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 January 2022 - Room 206\n= = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:0
 0 - Salle : Room 206\n\nBenjamin BLANC\, Prover Tech\nhttps://www.prover.c
 om/\n\n« Formal Methods in Practice: Model Checking in the Railway Industr
 y » \n\nAbstract:\n\nThe railway industry is a long term user of formal me
 thods\, especially in France. For more than 30 years\, both infrastructure
  managers and industrial suppliers are intensively using formal tools to i
 ncrease confidence in the critical parts of railway systems. This is stron
 gly encouraged by the certification authorities\, since the standard in th
 e area highly recommends such application. Most famous success stories in 
 this...
DTSTART:20220113T140000
DTEND:20220113T160000
DURATION:PT2H0M0S
LOCATION:Room 206
SUMMARY:Benjamin BLANC - Formal Methods in Practice: Model Checking in the 
 Railway Industry
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3061Vif7hF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 13 December 2021 - https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/b/ra
 d-ofn-9t8-rqc\n\nJoseph Sifakis\, VERIMAG\nhttps://www-verimag.imag.fr/PEO
 PLE/Joseph.Sifakis/\n\n« Specification and Validation of Autonomous Drivin
 g Systems: A Multilevel Semantic Framework » \n\nAbstract:\n\nAutonomous D
 riving Systems (ADS) are critical dynamic reconfigurable agent systems who
 se specification and validation raises extremely challenging problems. The
  paper presents a multilevel semantic framework for the specification of A
 DS and discusses associated validation problems. The framework relies on a
  formal...
DTSTART:20211213T140000
DTEND:20211213T160000
DURATION:PT2H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Joseph Sifakis - Specification and Validation of Autonomous Driving
  Systems: A Multilevel Semantic Framework
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3062ZEvRCU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday  7 December 2021 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Ales
 sio Mansutti\, University of Oxford
https://alessiomansutti.github.io/

« Eff
 icient complementation of semilinear sets and the VC dimension of Presburg
 er arithmetic » 

Abstract:

We discuss the issue of deciding the first-order 
 theory of integer linear arithmetic\, also known as Presburger arithmetic.
 \nWhereas optimal decision procedures based on either quantifier-eliminati
 on or automata constructions are known for this theory\,\nthe current proc
 edures based on manipulating semilinear sets (i.e. sets that...
DTSTART:20211207T140000
DTEND:20211207T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Alessio Mansutti - Efficient complementation of semilinear sets and
  the VC dimension of Presburger arithmetic
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3063xE91x1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  3 December 2021 - https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n10:00 - Salle : https://veri-bbb.imag.fr/b/ra
 d-ofn-9t8-rqc\n\nMiriam  Garci­a\, Institute of Science and Technology (IS
 T) of Austr\nhttps://pub.ist.ac.at/~mgarcias/\n\n« Design\, Verification a
 nd Synthesis of Hybrid Systems. » \n\nAbstract:\n\nWe have witnessed an in
 creasing interest and investment in safe autonomous systems such as self-d
 riving vehicles\, robots and medical devices. Critical aspects to be consi
 dered in the design of these complex systems are security\, reliability an
 d safety. For instance\, a single design bug can wreak havoc across thousa
 nd of...
DTSTART:20211203T100000
DTEND:20211203T120000
DURATION:PT2H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Miriam  Garci­a - Design\, Verification and Synthesis of Hybrid Sys
 tems.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3063VeVVCc@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 December 2021 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nLeo Exibard\, Reykjavik University\nhttp://www.icetcs.ru.is/leoe/\n
 \n« Reactive Synthesis over Infinite Data Domains with Machines with Regis
 ters » \n\nAbstract:\n\nIn reactive synthesis\, the goal is to automatical
 ly generate an implementation from a specification of the reactive and non
 -terminating input/output behaviours of a system. Specifications are usual
 ly modelled as logical formulas or automata over infinite sequences of sig
 nals (omega‑words)\, while implementations are represented as transducers.
  In the...
DTSTART:20211202T140000
DTEND:20211202T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Leo Exibard - Reactive Synthesis over Infinite Data Domains with Ma
 chines with Registers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30648s3Cku@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 29 November 2021 - Vidéo\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : Vidéo\n\nNicolas Basset\, VERIMAG\n\n\n« Uniform Sampling for Netw
 orks of Automata » \n\nAbstract:\n\nWe call network of automata a family o
 f partially synchronised automata\, i.e. a family of deterministic automat
 a which are synchronised via shared letters\, and evolve independently oth
 erwise. We address the problem of uniform random sampling of words recogni
 sed by a network of automata. To that purpose\, we define the reduced auto
 maton of the model\, which involves only the product of the synchronised p
 art of the component automata. We provide uniform sampling algorithms whic
 h are...
DTSTART:20211129T140000
DTEND:20211129T160000
DURATION:PT2H0M0S
LOCATION:Vidéo
SUMMARY:Nicolas Basset - Uniform Sampling for Networks of Automata
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30655OM6xv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 23 November 2021 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nPIERRE-LEO BEGAY\, Orange Labs & Verimag\n\n\n« Conception\, développ
 ement et certification dans Coq/MathComp d'optimisations Datalog pour la v
 érification réseau (Design\, Development and certification in Coq/MathComp
  of Datalog optimizations for network verification) » \n\nRésumé :\n\nNous
  introduisons une analyse statique et deux transformations de programmes p
 our Datalog dans le but de résoudre des problèmes de performance liés à l'
 implémentation de certaines primitives\, notamment dans le cadre de la...
DTSTART:20211123T140000
DTEND:20211123T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:PIERRE-LEO BEGAY - Conception\, développement et certification dans
  Coq/MathComp d'optimisations Datalog pour la vérification réseau (Design\
 , Development and certification in Coq/MathComp of Datalog optimizations f
 or network verification)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3066FeNoJF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  4 October 2021 -  https://veri-bbb
 .imag.fr/b/rad-ofn-9t8-rqc \n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n14:00 - Salle :  https://veri-bbb.imag.fr/b/
 rad-ofn-9t8-rqc \n\nHadi DAYEKH\, VERIMAG\, UGA\n\n\n« Learning Automata o
 ver Large Alphabets as an Alternative to Recurrent Neural Networks » \n\nA
 bstract:\n\nWe present an attempt toward learning automata and Moore machi
 nes to model Recurrent Neural Networks with real input and output. Our alg
 orithm is based on a combination of the Angluin's L*-variant algorithm of 
 learning Mealy machines\, as well as an improved version of Irini Mens' an
 d Oded Maler's algorithm for learning symbolic automata defined over a lar
 ge input...
DTSTART:20211004T140000
DTEND:20211004T160000
DURATION:PT2H0M0S
LOCATION: https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc 
SUMMARY:Hadi DAYEKH - Learning Automata over Large Alphabets as an Alternat
 ive to Recurrent Neural Networks
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3067nHuVin@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Monday 27 September 2021 - Video\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : Video\n\nSylvain Boulmé\, Verimag\nhttp://www-verimag.imag.fr/~boulme
 /\n\n« Formally Verified Defensive Programming (efficient Coq-verified com
 putations from untrusted ML oracles)  » \n\nAbstract:\n\nSee abstract\, ju
 ry details\, and pdf on http://www-verimag.imag.fr/~boulme/hdr.html\n\n\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 Other seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,6
 2.html?lang=en\nLocation/Vision: Video - http://www-verimag.imag.fr/~boulm
 e/boulme_hdr_rehearsal.webm\nTo unsubscribe\, reply to this mail with UNSU
 BSCRIBE in the...
DTSTART:20210927T150000
DTEND:20210927T170000
DURATION:PT2H0M0S
LOCATION:Video
SUMMARY:Sylvain Boulmé - Formally Verified Defensive Programming (efficient
  Coq-verified computations from untrusted ML oracles) 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3068r7VIJl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 20 September 2021 - https://veri-bbb.
 imag.fr/b/rad-ofn-9t8-rqc
= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =
14:00 - Salle : https://veri-bbb.imag.fr/b/rad-ofn
 -9t8-rqc

Lucas Bueri\, VERIMAG


« Décidabilité de la rationalité des VAS » 

Ré
 sumé :

Obtenir la rationalité d'un système d'addition de vecteurs (VAS) per
 met de simplifier les problèmes associés en utilisant les résultats des au
 tomates finis. Ce travail vise donc à approfondir l'identification des VAS
  rationnels en se tournant vers les configurations de départ.\nAprès avoir
  corrigé une preuve de décidabilité de la rationalité des VAS\, proposé en
  1980 par Ginzburg et Yoeli\, nous...
DTSTART:20210920T140000
DTEND:20210920T160000
DURATION:PT2H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc
SUMMARY:Lucas Bueri - Décidabilité de la rationalité des VAS
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3069jgLiON@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 30 August 2021 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Yannick
  Zakowski\, LIP
https://perso.ens-lyon.fr/yannick.zakowski/

« Sémantique de 
 Vellvm (Vellvm semantics) » 

Résumé :

Formalisation de la sémantique de LLVM
 .\nNouvelle sémantique de Vellvm (ICFP 2021) via les interaction trees.

Abs
 tract:

Formalization of VellVM semantics using interaction trees


= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
Other semina
 rs at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html?lang=
 en
Location/Vision: Room 206 (2nd floor\, badged...
DTSTART:20210830T140000
DTEND:20210830T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Zakowski - Sémantique de Vellvm (Vellvm semantics)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3070k0d31J@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Tuesday 13 July 2021 - Auditorium (Building I
 MAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
15:00 - Salle : Auditorium (Building IMAG)

Cyril Six\, Kalray & Verimag


«
  Compilation optimisante et formellement prouvÃƒÂ©e pour un processeur VLI
 W (Optimized and formally-verified compilation for a VLIW processor) » 

Abs
 tract:

Software programs are used for many critical roles. A bug in those c
 an\nhave a devastating cost\, possibly leading to the loss of human lives.
 \nSuch bugs are usually found at a source level (which can be ruled out\nw
 ith source-level verification methods)\, but they can also be inserted\nby
  the compiler unknowingly. CompCert is the first...
DTSTART:20210713T150000
DTEND:20210713T170000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Cyril Six - Compilation optimisante et formellement prouvÃƒÂ©e pour
  un processeur VLIW (Optimized and formally-verified compilation for a VLI
 W processor)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3071a4GFhA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 June 2021 - bbb\, code d'accès
  394787\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n14:00 - Salle : bbb\, code d'accès 394787\n\nPierre Courtieu\, C
 NAM-CEDRIC\nhttp://cedric.cnam.fr/~courtiep/\n\n« [FormalProofs] Gestion d
 'un environment de preuve 'moche' ([FormalProofs] Dealing with ugly proof 
 environment.) » \n\nRésumé :\n\nPrésentation informelle\, principalement u
 ne démo\, de quelques petites améliorations de Coq et proofgeneral dédiées
  à la gestion des environnements de preuve 'moche'.  Ces améliorations se 
 basent en grande partie sur un petit tactical '\;\;' qui permet d'applique
 r une tactique à chacune des hypothèses créées par une autre tactique....
DTSTART:20210617T140000
DTEND:20210617T160000
DURATION:PT2H0M0S
LOCATION:bbb\, code d'accès 394787
SUMMARY:Pierre Courtieu - [FormalProofs] Gestion d'un environment de preuve
  'moche' ([FormalProofs] Dealing with ugly proof environment.)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3072uUajwZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 June 2021 - Room 206 et BBB (c
 ode d'accès 506793)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n15:00 - Salle : Room 206 et BBB (code d'accès 506793
 )\n\nJean-François Monin\, Verimag\nhttp://www-verimag.imag.fr/~monin/\n\n
 « [FormalProofs] Petites inversion et récursion débridée en Coq\, la métho
 de de Braga ([FormalProofs] Small inversions and unleashed recursion in Co
 q\, the Braga method) » \n\nRésumé :\n\nComment raisonner en Coq sur des f
 onctions récursives dont la terminaison n'est pas gagnée d'avance ? Voire 
 sont manifestement partielles\, avec un domaine de définition complexe ou 
 même inconnu ? Comment les écrire sous forme de fonctions Coq qui à...
DTSTART:20210610T150000
DTEND:20210610T170000
DURATION:PT2H0M0S
LOCATION:Room 206 et BBB (code d'accès 506793)
SUMMARY:Jean-François Monin - [FormalProofs] Petites inversion et récursion
  débridée en Coq\, la méthode de Braga ([FormalProofs] Small inversions an
 d unleashed recursion in Coq\, the Braga method)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3073tXrCIu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 23 April 2021 - Zoom\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n09:00 - Sall
 e : Zoom\n\nSchoitsch Erwin \, AIT Austrian Institute of Technology\n\n\n«
  Ethical aspects and recommendations for trustworthy highly automated/auto
 nomous systems » \n\nAbstract:\n\nThe FOCETA project (Foundations for Cont
 inuous Engineering Trustworthy Autonomy) was requested to appoint an Ethic
 al Advisor. This activity should particularly address not only the involve
 ment of human subjects in the research activities\, but also how to avoid 
 negative social\, cognitive and ethical bias throughout the project phases
 \, from design\, development\, verification and validation\, maintenance a
 nd dismissal...
DTSTART:20210423T090000
DTEND:20210423T110000
DURATION:PT2H0M0S
LOCATION:Zoom
SUMMARY:Schoitsch Erwin  - Ethical aspects and recommendations for trustwor
 thy highly automated/autonomous systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3074UEvvUx@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  1 April 2021 - BBB room access cod
 e 349356
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 = = = =
14:00 - Salle : BBB room access code 349356

Lionel Rieg\, VERIMAG / 
 IIM Grenoble INP
http://www-verimag.imag.fr/~riegl/

« [FormalProofs] A forma
 lly-verified compiler from Esterel to circuits » 

Abstract:

Esterel is a syn
 chronous programming language (like Lustre or Signal) which can be compile
 d down to digital circuits\, as described for instance in G. Berry's draft
  book: 'The Constructive Semantics of Pure Esterel'. The goal of this work
  is to provide a mechanized proof of the correctness of this compilation s
 cheme.\nIn this talk\, after a brief description of the...
DTSTART:20210401T140000
DTEND:20210401T160000
DURATION:PT2H0M0S
LOCATION:BBB room access code 349356
SUMMARY:Lionel Rieg - [FormalProofs] A formally-verified compiler from Este
 rel to circuits
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30759mCumI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 March 2021 - https://barbarate
 .imag.fr/b/dav-ygp-g07-gi0\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : https://barbarate.imag.fr/b/d
 av-ygp-g07-gi0\n\nDavid Monniaux\, Verimag\nhttp://www-verimag.imag.fr/~mo
 nniaux/\n\n« [SharedResources] CompCert for Risc-V on FPGA » \n\nAbstract:
 \n\nRisc-V is a “new” instruction set architecture that is gaining tractio
 n in both the academic and industrial worlds. On the academic side\, there
  are many free designs of CPU that implement that architecture\; they may 
 be simulated or implemented into FPGAs for fast execution. On the industri
 al side\, many consider Risc-V as an alternative to licensed designs such 
 as...
DTSTART:20210311T140000
DTEND:20210311T150000
DURATION:PT1H0M0S
LOCATION:https://barbarate.imag.fr/b/dav-ygp-g07-gi0
SUMMARY:David Monniaux - [SharedResources] CompCert for Risc-V on FPGA
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3076TUV7IW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 26 February 2021 - Visioconference
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:00 - Salle : Visioconference\n\nEmma AHRENS\, Verimag\, Mohytos\n\n
 \n« Local Reasoning for Reconfigurable Distributed Systems » \n\nAbstract:
 \n\nThis work investigates the use of separation logic for reasoning about
  dynamically reconfigurable behavior\, interaction\, priority (DR-BIP) sys
 tems and allows the verification of reconfiguration programs on certain di
 stributed systems. Separation logic extends Hoare logic to enable the veri
 fication of programs on resources. It makes use of local reasoning and pro
 vides a frame rule. Static BIP systems represent component-based systems\,
  where a...
DTSTART:20210226T100000
DTEND:20210226T110000
DURATION:PT1H0M0S
LOCATION:Visioconference
SUMMARY:Emma AHRENS - Local Reasoning for Reconfigurable Distributed System
 s
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3077FsPGSb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 25 February 2021 - BBB : Room acces
 s code 756979
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =
14:00 - Salle : BBB : Room access code 756979

Cyril SIX\, Kalra
 y / Verimag


« Certified Superblock Scheduling for the CompCert Compiler » 

A
 bstract:

CompCert is a C to assembly compiler\, with a formal proof of sema
 ntic preservation written in Coq.\nIt already features a number of simple 
 optimizations such as constant propagation or common subexpression elimina
 tion\, however to this day it lacks more advanced optimizations such as in
 struction scheduling\, loop invariant code motion or strength reduction.\n
 We previously introduced postpass list scheduling in...
DTSTART:20210225T140000
DTEND:20210225T160000
DURATION:PT2H0M0S
LOCATION:BBB : Room access code 756979
SUMMARY:Cyril SIX - Certified Superblock Scheduling for the CompCert Compil
 er
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3078FLXxiF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 11 February 2021 - https://barbarat
 e.imag.fr/b/jac-ehy-mnq-4cf
= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =
14:00 - Salle : https://barbarate.imag.fr/b/jac-
 ehy-mnq-4cf

Franck POMMEREAU\, University of Évry
https://www.ibisc.univ-evr
 y.fr/~fpommereau/

« Formal Modelling and Symbolic Analysis of Ecosystems » 
 

Abstract:

Joint work with : Cédric Gaucherel\, Colin Thomas\, Stefan Haar\,
  Giann Karlo Aguirre Samboni\n\nAbstract : Several concepts have recently 
 been proposed to understand long-term ecosystem dynamics. These include ba
 sins of attraction expressing resilience and tipping points expressing sha
 rp changes in ecosystemâ€™s behavior\, which are...
DTSTART:20210211T140000
DTEND:20210211T160000
DURATION:PT2H0M0S
LOCATION:https://barbarate.imag.fr/b/jac-ehy-mnq-4cf
SUMMARY:Franck POMMEREAU - Formal Modelling and Symbolic Analysis of Ecosys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3079LvIuHZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 28 January 2021 - https://veri-bbb.
 imag.fr/b/rad-ofn-9t8-rqc   
= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =
14:00 - Salle : https://veri-bbb.imag.fr/b/rad-
 ofn-9t8-rqc   

Etienne André\, Université de Lorraine


« Symbolic Monitoring 
 against Specifications Parametric in Time and Data  » 

Abstract:

https://ver
 i-bbb.imag.fr/b/rad-ofn-9t8-rqc\nAccess Code: 031456\n\nMonitoring consist
 s in deciding whether a log meets a given specification. In this work\, we
  propose an automata-based formalism to monitor logs in the form of action
 s associated with time stamps and arbitrarily data values over infinite do
 mains. Our formalism uses both timing parameters and...
DTSTART:20210128T140000
DTEND:20210128T160000
DURATION:PT2H0M0S
LOCATION:https://veri-bbb.imag.fr/b/rad-ofn-9t8-rqc   
SUMMARY:Etienne André - Symbolic Monitoring against Specifications Parametr
 ic in Time and Data 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3080Vuibb9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 21 January 2021 - https://univ-gren
 oble-alpes-fr.zoom.us/j/932168111
= = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = =
14:00 - Salle : https://univ-grenoble-alpe
 s-fr.zoom.us/j/932168111

Etienne Andre\, UniversitÃƒÆ’Ã‚Â© de Lorraine


« Sym
 bolic Monitoring against Specifications Parametric in Time and Data » 

Abst
 ract:

Join Zoom Meeting\nhttps://univ-grenoble-alpes-fr.zoom.us/j/932168111
 23?pwd=MFVjWDlQblRncEU3T2dLblNEV01Cdz09\n\nMeeting ID: 932 1681 1123\nPass
 code: 985719\n\nAbstract: Monitoring consists in deciding whether a log me
 ets a given specification. In this work\, we propose an automata-based for
 malism to monitor logs in the form of actions...
DTSTART:20210121T140000
DTEND:20210121T160000
DURATION:PT2H0M0S
LOCATION:https://univ-grenoble-alpes-fr.zoom.us/j/932168111
SUMMARY:Etienne Andre - Symbolic Monitoring against Specifications Parametr
 ic in Time and Data
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3081dniPtC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 January 2021 - https://veri-bb
 b.imag.fr/b/mic-1x2-b8m-ama\n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n14:00 - Salle : https://veri-bbb.imag.fr/b/m
 ic-1x2-b8m-ama\n\nOlivier RIDOUX\, IRISA\, Université de Rennes I\nhttp://
 www.irisa.fr/lande/ridoux/\n\n« Limite de Landauer et calcul réversible : 
 une introduction (Landauer limit and reversible calculus: an introduction)
  » \n\nRésumé :\n\nLe calcul réversible est une idée développée d’abord su
 r un plan physique par des chercheurs comme Landauer\, Bennet\, et Feynman
 \, puis sur un plan informatique par des chercheurs comme Lutz\, Baker\, Y
 okoyama et Glück\, puis plus récemment Demaine. Dans le même temps\,...
DTSTART:20210114T140000
DTEND:20210114T160000
DURATION:PT2H0M0S
LOCATION:https://veri-bbb.imag.fr/b/mic-1x2-b8m-ama
SUMMARY:Olivier RIDOUX - Limite de Landauer et calcul réversible : une intr
 oduction (Landauer limit and reversible calculus: an introduction)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3082lLZ9u2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 December 2020 - By zoom (details 
 below)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n10:00 - Salle : By zoom (details below)\n\nGuo Xiaojie\, INRIA/VE
 RIMAG\n\n\n« Certified Tools for Schedulability Analyses » \n\nRésumé :\n
 \nL'analyse d'ordonnançabilité vise à garantir le respect des échéances da
 ns les systèmes temps réel durs. Cette propriété est cruciale pour les sys
 tèmes utilisés dans les domaines critiques tels que l'avionique\, car une 
 échéance manquée peut avoir des conséquences catastrophiques. Dans cette t
 hèse\, nous utilisons l'assistant de preuves Coq afin d'assurer la correct
 ion des analyses d'ordonnançabilité des systèmes temps réel...
DTSTART:20201218T100000
DTEND:20201218T120000
DURATION:PT2H0M0S
LOCATION:By zoom (details below)
SUMMARY:Guo Xiaojie - Certified Tools for Schedulability Analyses
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3082larC96@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 17 December 2020 - Amphithéâtre de la
  Maison Jean Kuntzmann \n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n13:00 - Salle : Amphithéâtre de la Maison Jean K
 untzmann \n\nStéphane Devismes\, UGA/VERIMAG\nhttp://www-verimag.imag.fr/~
 devismes\n\n« Versatility and Efficiency in Self-Stabilizing Distributed S
 ystems » \n\nAbstract:\n\nIn this defense\, I will summarize the research 
 activities I have led over the last seventeen years. My research focuses o
 n self-stabilization and its variants. Self-stabilization is a general pro
 perty enabling a distributed system to tolerate transient faults. In most 
 of my works on self-stabilization I have tried to conciliate two a priori.
 ..
DTSTART:20201217T130000
DTEND:20201217T150000
DURATION:PT2H0M0S
LOCATION:Amphithéâtre de la Maison Jean Kuntzmann 
SUMMARY:Stéphane Devismes - Versatility and Efficiency in Self-Stabilizing 
 Distributed Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3083w18twV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 11 December 2020 - virtual seminar 
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:
 30 - Salle : virtual seminar 

Marius Bozga\, VERIMAG


« Compositional Generat
 ion of Invariants for Timed Systems » 

Abstract:

zoom link\nhttps://univ-gre
 noble-alpes-fr.zoom.us/j/99529870648?pwd=b04vSUpyRmJDL2k3OUZxWHRSc3R0dz09
 \nMeeting ID: 995 2987 0648\nPasscode: 932215\n(Note that this seminar was
  previously announced for Friday Dec 4. It is now rescheduled for Friday D
 ec 11)\n\n\nThis presentation recalls our compositional method developed t
 o address the state space explosion inherent in verification of timed syst
 ems with a large number of components. The main challenge...
DTSTART:20201211T103000
DTEND:20201211T123000
DURATION:PT2H0M0S
LOCATION:virtual seminar 
SUMMARY:Marius Bozga - Compositional Generation of Invariants for Timed Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3084VMjfED@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 December 2020 - Séminaire virt
 uel via BigBlueButton\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n15:15 - Salle : Séminaire virtuel via BigBlueButto
 n\n\nJacques Combaz\, CNRS / VERIMAG / ETiCS\n\n\n« Introduction aux effet
 s rebond [lien visio: https://veri-bbb.imag.fr/b/jac-lxa-inn-hnq] » \n\nRé
 sumé :\n\nFace à la crise climatique et écologique en cours\, les nouvelle
 s technologies de l'information et de la communication (NTIC) sont souvent
  présentées comme ayant un fort potentiel pour réduire nos impacts environ
 nementaux\, de par leur capacité à optimiser et dématérialiser les autres 
 secteurs (transport\, bâtiment\, agriculture\, énergie\, industrie\,...
DTSTART:20201203T151500
DTEND:20201203T164500
DURATION:PT1H30M0S
LOCATION:Séminaire virtuel via BigBlueButton
SUMMARY:Jacques Combaz - Introduction aux effets rebond [lien visio: https:
 //veri-bbb.imag.fr/b/jac-lxa-inn-hnq]
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3086vNTFou@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 20 November 2020 - virtual seminar on
  zoom (see below) 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =
10:30 - Salle : virtual seminar on zoom (see below) 

Radu 
 Iosif\, VERIMAG/CNRS


« Structural Invariants for the Verification of System
 s with (Recursively Defined) Parameterized Architectures » 

Abstract:

MOHYTO
 S Seminar\n\nZoom link https://us04web.zoom.us/j/76351337050?pwd=Z3JibVkw
 \nPasscode: 7kFz1i \n\n\n\n\nJoint work with Marius Bozga\, Joseph Sifakis
  (VERIMAG)\, Javier Esparza  and Christoph Welzel (TU Munich)\n\nWe consid
 er parameterized concurrent systems consisting of a finite but unknown num
 ber of components\, obtained by replicating a given set of...
DTSTART:20201120T103000
DTEND:20201120T123000
DURATION:PT2H0M0S
LOCATION:virtual seminar on zoom (see below) 
SUMMARY:Radu Iosif - Structural Invariants for the Verification of Systems 
 with (Recursively Defined) Parameterized Architectures
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30870GFuPO@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2020 - Séminaire virt
 uel via BigBlueButton\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n16:00 - Salle : Séminaire virtuel via BigBlueButto
 n\n\nAina Rasoldier\, INRIA / Spades - VERIMAG / ETiCS\n\n\n« Les méthodol
 ogies d'évaluation des impacts environnementaux des technologies de l'info
 rmation et de la communication (TIC) à l'échelle mondiale » \n\nRésumé :\n
 \nLes solutions numériques sont souvent présentées comme indispensables po
 ur répondre à l'évolution des besoins individuels et collectifs\, et des i
 mpacts environnementaux associés. Des rapports récents comme ceux de The S
 hift Project ou de GreenIt ont suscité l'intérêt du grand...
DTSTART:20201119T160000
DTEND:20201119T171500
DURATION:PT1H15M0S
LOCATION:Séminaire virtuel via BigBlueButton
SUMMARY:Aina Rasoldier - Les méthodologies d'évaluation des impacts environ
 nementaux des technologies de l'information et de la communication (TIC) à
  l'échelle mondiale
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3088OUplOC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 17 November 2020 - zoom
= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle 
 : zoom

Schuh Matheus\, Kalray/Verimag


« A study of predictable execution mod
 els implementation for industrial data-flow applicationson a multi-core pl
 atform with shared banked memory » 

Abstract:

-- to appear in RTSS 2020 ---
 \nWe study the implementation of data-flow applications on multi-core proc
 essor with on-chip shared multi-banked memory. Specifically\, we consider 
 the Kalray MPPA2 processor and three applications coded using the industri
 al toolchain SCADE Suite.We focus on the runtime environment assuming glob
 al static scheduling\, time-triggered and non-preemptive...
DTSTART:20201117T140000
DTEND:20201117T160000
DURATION:PT2H0M0S
LOCATION:zoom
SUMMARY:Schuh Matheus - A study of predictable execution models implementat
 ion for industrial data-flow applicationson a multi-core platform with sha
 red banked memory
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30893xnTKB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  6 November 2020 - Virtual seminar 
 (the link will be sent later) \n= = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = =\n10:30 - Salle : Virtual seminar (the link
  will be sent later) \n\nAkshay Mambakam\, VERIMAG\n\n\n« Learning Specifi
 cations for Labelled Patterns » \n\nAbstract:\n\nWe present a supervised l
 earning framework for inferring temporal logic specifications from labelle
 d patterns in signals\, so that the formulae can then be used to correctly
  detect the same patterns in unlabelled samples. The input patterns that a
 re fed to the training process are labelled by a Boolean signal that captu
 res their occurrences. To express the patterns with quantitative features\
 , we use...
DTSTART:20201106T103000
DTEND:20201106T120000
DURATION:PT1H30M0S
LOCATION:Virtual seminar (the link will be sent later) 
SUMMARY:Akshay Mambakam - Learning Specifications for Labelled Patterns
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3090kub6CS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 October 2020 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n14:15 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nCyril Six\, Kalray - Verimag\nhttps://hal.archives-ouvertes.fr/hal-0
 2185883\n\n« Certified and Efficient Instruction Scheduling. Application t
 o Interlocked VLIW Processors.  » \n\nAbstract:\n\nCompCert is a moderatel
 y optimizing C compiler with a formal\, machine-checked\, proof of correct
 ness: after successful compilation\, the assembly code has a behavior fait
 hful to the source code. Previously\, it only supported target instruction
  sets with sequential semantics\, and did not attempt reordering instructi
 ons for...
DTSTART:20201022T141500
DTEND:20201022T151500
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Cyril Six - Certified and Efficient Instruction Scheduling. Applica
 tion to Interlocked VLIW Processors. 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30916JbVeP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 30 June 2020 - Online : https://ve
 ri-bbb.imag.fr/b/pie-zc2-ji9\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Online : https://veri-bbb.i
 mag.fr/b/pie-zc2-ji9\n\nSébastien Michelland\, ENS de Lyon\nhttps://veri-b
 bb.imag.fr/b/pie-zc2-ji9\n\n« Une Procédure de Décision pour les Relations
  d'Équivalence (A Decision Procedure for Equivalence Relations) » \n\nAbst
 ract:\n\nEquality or equivalence between objects is a typical kind of Coq 
 goal that regularly appears in theories. When it is a consequence of the c
 ontext\, one can simply rewrite their way through\, but it is more conveni
 ent to handle it with a tactic. The congruence tactic by Pierre Corbineau 
 is a...
DTSTART:20200630T140000
DTEND:20200630T150000
DURATION:PT1H0M0S
LOCATION:Online : https://veri-bbb.imag.fr/b/pie-zc2-ji9
SUMMARY:Sébastien Michelland - Une Procédure de Décision pour les Relations
  d'Équivalence (A Decision Procedure for Equivalence Relations)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-30925iX7fX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 12 March 2020 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Mathia
 s  RAMPARISON\, University of Luxemburg


« Updatable Parametric Timed Automa
 ta: Decidability\, Algorithms\, and Application to Security (Updatable Par
 ametric Timed Automata: Decidability\, Algorithms\, and Application to Sec
 urity) » 

Abstract:

As cyber-physical systems become more and more complex\,
  human debugging\nis not sufficient anymore to cover the huge range of pos
 sible\nbehaviours. For costly critical systems where human lives can be\ne
 ndangered\, formally proving the safety of a system is even...
DTSTART:20200312T140000
DTEND:20200312T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mathias  RAMPARISON - Updatable Parametric Timed Automata: Decidabi
 lity\, Algorithms\, and Application to Security (Updatable Parametric Time
 d Automata: Decidability\, Algorithms\, and Application to Security)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3093iblVOJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday  9 March 2020 - Auditorium (Building I
 MAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
15:30 - Salle : Auditorium (Building IMAG)

Rémy Boutonnet\, VERIMAG
http:
 //www-verimag.imag.fr/~boutonne/

« Modular Analysis of Numerical Properties
  by Abstract Interpretation » 

Abstract:

Jury\n\n- Andreas Podelski     Prof
 esseur\, Université de Freiburg       Rapporteur\n- Antoine Miné         P
 rofesseur\, Sorbonne Université          Rapporteur\n- Cesare Tinelli     
   Professeur\, University of Iowa           Examinateur\n- Corinne Ancourt
       Maître de recherche\, Mines ParisTech     Examinatrice\n- Olivier Bo
 uissou     Ingénieur\, Mathworks                    ...
DTSTART:20200309T153000
DTEND:20200309T173000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Rémy Boutonnet - Modular Analysis of Numerical Properties by Abstra
 ct Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3094EhCDMK@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 21 February 2020 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n10:30 - Salle : Room 206 (2nd floor\, badged access
 )\n\nMichael Marcozzi\, Imperial College (London)\nhttps://sites.google.co
 m/view/michaelmarcozzi\n\n« Compiler Fuzzing: How Much Does It Matter? » 
 \n\nAbstract:\n\nDespite much recent interest in randomised testing (fuzzi
 ng) of compilers\, the practical impact of fuzzer-found compiler bugs on r
 eal-world applications has barely been assessed. We present the first quan
 titative and qualitative study of the tangible impact of miscompilation bu
 gs in a mature compiler. We follow a rigorous methodology where the bug im
 pact over...
DTSTART:20200221T103000
DTEND:20200221T113000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michael Marcozzi - Compiler Fuzzing: How Much Does It Matter?
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3095Cr01Ux@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday 13 February 2020 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
10:30 - Salle : Room 206 (2nd floor\, badged access)

Jona
 than Salwan\, Quarkslab


« L'exécution symbolique pour l'aide à la rétro-ing
 énierie dans un  cadre industriel » 

Résumé :

Cette thèse a été faite dans u
 n cadre industriel où les activités principales sont la rétro-ingénierie p
 our la recherche de vulnérabilités et la vérification de certaines proprié
 tés de sécurité sur des programmes déjà compilés. La première partie de ce
 tte thèse porte sur la\ncollecte et le partage des problématiques industri
 elles lors de l’analyse de...
DTSTART:20200213T103000
DTEND:20200213T123000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jonathan Salwan - L'exécution symbolique pour l'aide à la rétro-ing
 énierie dans un  cadre industriel
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3095ZhS0dR@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 12 February 2020 - Room 206 (2nd f
 loor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Sé
 bastien  Bardin\, CEA-LIST
http://sebastien.bardin.free.fr/

« From Safety to
  Security: The Case of Binary-level Code Analysis » 

Abstract:

Several major
  classes of security analysis have to be performed on raw executable files
 \, such as vulnerability analysis of mobile code or commercial off-the-she
 lf\, deobfuscation or malware\ninspection. These analysis are highly chall
 enging\, due to the very low-level and intricate nature of binary code\, a
 nd there is a clear need for more sophisticated and automated...
DTSTART:20200212T140000
DTEND:20200212T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sébastien  Bardin - From Safety to Security: The Case of Binary-lev
 el Code Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3096vdIHnC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  6 February 2020 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Jul
 es Chouquet\, IRIF 


« Lower bounds for probabilistic k-set agreement throug
 h combinatorial topology » 

Abstract:

Herlihy and Shavit (1999) introduced a
  powerful method for the analysis of distributed algorithms (in a shared m
 emory with immediate snapshot model) that uses topological properties of s
 implicial complexes. This methods allows to prove impossibility results of
  some problems in distributed computing\, like consensus\, or k-set agreem
 ent (which is a generalization of consensus).\n\nBeyond the...
DTSTART:20200206T140000
DTEND:20200206T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jules Chouquet - Lower bounds for probabilistic k-set agreement thr
 ough combinatorial topology
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3097wA60E8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  3 February 2020 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n11:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nMatthieu Jan and Asavoae Mihail\, CEA\n\n\n« Towards Automatic Extrac
 tion of Timing models from HDL designs (Mihail Asavoae) - Tracking timing 
 anomalies (Matthieu Jan) » \n\nAbstract:\n\nMihail Asavoae and Matthieu Ja
 n present their work on the topic of timing models and timing anomalies.\n
 \n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semina
 rs\,62.html?lang=en\nLocation/Vision: Room 206 (2nd floor\, badged access)
  -...
DTSTART:20200203T110000
DTEND:20200203T120000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Matthieu Jan and Asavoae Mihail - Towards Automatic Extraction of T
 iming models from HDL designs (Mihail Asavoae) - Tracking timing anomalies
  (Matthieu Jan)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3098ghWwWE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 27 January 2020 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
10:30 - Salle : Room 206 (2nd floor\, badged access)

Margus
  Veanes\, Microsoft Research Lab
https://www.microsoft.com/en-us/research/p
 eople/margus/

« Symbolic Regexes & Matching » 

Abstract:

Symbolic regex based
  matching and use of symbolic derivatives is a new topic with interesting 
 theoretical and practical challenges driven by concrete applications. I wi
 ll discuss some of the recent research and some of the applications in Azu
 re. I will also discuss some future and ongoing work and other potential a
 pplications in related domains.\n \nThere is a new open...
DTSTART:20200127T103000
DTEND:20200127T113000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Margus Veanes - Symbolic Regexes & Matching
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3098b3sEal@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday 27 January 2020 - Auditorium (Building
  IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =
14:00 - Salle : Auditorium (Building IMAG)

Xiao XU\, VERIMAG


« Thesis D
 efence - Xiao XU - Generalisation of Alternating Automata over Infinite Al
 phabets » 

Abstract:

The language inclusion problem is recognised as being c
 entral to verification in different domains\, such as hardware\, communica
 tion protocols\, software systems\, etc. There we might face two challenge
 s: non-determinism and infinite alphabets.\n\nWe propose two models of alt
 ernating automata over infinite alphabets: (i) alternating data automata (
 ADA) and (ii) first-order alternating data automata (FOADA)....
DTSTART:20200127T140000
DTEND:20200127T180000
DURATION:PT4H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Xiao XU - Thesis Defence - Xiao XU - Generalisation of Alternating 
 Automata over Infinite Alphabets
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-309948h2vz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 19 December 2019 - Seminar Room\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n10:00 - Salle : Seminar Room\, ground floor
  (Building IMAG)\n\nHang Yu\, VERIMAG\n\n\n« Towards an Efficient Parallel
  Parametric Linear Programming Solver » \n\nAbstract:\n\nVPL (Verified Pol
 yhedra Library) is an abstract polyhedra domain using constraint-only desc
 ription. Allmain operators boiled down to polyhedral projection\, which ca
 n be computed using Fourier-Motzkinelimination [20].  This method generate
 s many redundant constraints which must be eliminated at ahigh cost. A nov
 el algorithm was implemented in VPL for computing the polyhedral projectio
 n...
DTSTART:20191219T100000
DTEND:20191219T130000
DURATION:PT3H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Hang Yu - Towards an Efficient Parallel Parametric Linear Programmi
 ng Solver
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3100kmBbx1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 December 2019 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Yan
 nick Zakowski\, University of Pennsylvania
https://www.seas.upenn.edu/~zako
 wski/

« From representing recursive and impure programs in Coq to a modular
  formal semantics of LLVM IR » 

Abstract:

The DeepSpec research project is a
  cross institution\, cross project investigation to push further the scien
 ce of specification and verification of software artifacts. Its ambition i
 s crystallized into four qualities that specifications should have: they s
 hould be rich\, live\, two-sided and formal.\n\nIn this talk\,...
DTSTART:20191219T140000
DTEND:20191219T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Yannick Zakowski - From representing recursive and impure programs 
 in Coq to a modular formal semantics of LLVM IR
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-310182A2nc@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 25 November 2019 - Auditorium (Buildi
 ng IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =
14:00 - Salle : Auditorium (Building IMAG)

Moshe Vardi\, Rice Univer
 sity
https://www.cs.rice.edu/~vardi/

« Technology is Driving the Future\, Bu
 t Who Is Steering?  » 

Abstract:

\nThe benefits of computing are intuitive. 
 Computing yields tremendous\nsocietal benefits\; for example\, the life-sa
 ving potential of\ndriverless cars is enormous. But computing is not a gam
 e--it is\nreal--and it brings with it not only societal benefits\, but als
 o\nsignificant societal costs\, such as labor polarization\,\ndisinformati
 on\, and smart-phone addiction. The common reaction to\nthis...
DTSTART:20191125T140000
DTEND:20191125T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Moshe Vardi - Technology is Driving the Future\, But Who Is Steerin
 g? 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3101VgGheC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 November 2019 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nSophie Tourret\, Max-Planck-Institut für Informatik\, Saarbrücken\n
 https://www.mpi-inf.mpg.de/departments/automation-of-logic/people/sophie-t
 ourret/\n\n« Stronger Higher-order Automation » \n\nAbstract:\n\nAutomated
  reasoning in first-order logic (FOL) is becoming a mature research domain
 . It has led to the development of powerful tools such as superposition-ba
 sed theorem provers and SMT solvers (Satisfiability Modulo Theory solvers)
 \, that have found and continue to find many applications in industry and.
 ..
DTSTART:20191121T140000
DTEND:20191121T153000
DURATION:PT1H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sophie Tourret - Stronger Higher-order Automation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3102MLBkjB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 10 October 2019 - Room 206 (2nd f
 loor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =\n15:00 - Salle : Room 206 (2nd floor\, badged acces
 s)\n\nJan Reineke\, Universität des Saarlandes\nhttp://embedded.cs.uni-saa
 rland.de/reineke.php\n\n« Spectector: Principled detection of speculative 
 information flows » \n\nAbstract:\n\nSince the advent of SPECTRE\, a numbe
 r of countermeasures have been proposed and deployed. Rigorously reasoning
  about their effectiveness\, however\, requires a well-defined notion of s
 ecurity against speculative execution attacks\, which has been missing unt
 il now. In this paper (1) we put forward speculative non-interference\, th
 e first...
DTSTART:20191010T150000
DTEND:20191010T160000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jan Reineke - Spectector: Principled detection of speculative infor
 mation flows
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3103LE2M9V@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  8 October 2019 - Seminar Room\, gr
 ound floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n16:00 - Salle : Seminar Room\, ground floor (
 Building IMAG)\n\nValentin TOUZEAU\, Verimag\n\n\n« Static Analysis of Lea
 st Recently Used Caches: Complexity\, Optimal Analysis\, and Applications 
 to Worst-Case Execution Time and Security » \n\nAbstract:\n\nThe certifica
 tion of real-time safety critical programs requires bounding their executi
 on time. Due to the high impact of cache memories on memory access latency
 \, modern Worst-Case Execution Time estimation tools include a cache analy
 sis. The aim of this analysis is to statically predict if memory accesses 
 result in a...
DTSTART:20191008T160000
DTEND:20191008T180000
DURATION:PT2H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Valentin TOUZEAU - Static Analysis of Least Recently Used Caches: C
 omplexity\, Optimal Analysis\, and Applications to Worst-Case Execution Ti
 me and Security
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3104LE7jdm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 September 2019 - Room 206 (2nd
  floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acc
 ess)\n\nPierre-Jean Meyer\, University of California\, Berkeley\nhttp://ch
 apal.eu/pierre-jean_meyer/\n\n« Reachability analysis and decompositions f
 or abstraction-based control synthesis » \n\nAbstract:\n\nThis talk gives 
 an overview of three recent results in the field of abstraction-based cont
 rol synthesis\, where we create a finite abstraction of a continuous dynam
 ical system to synthesize a high-level controller with respect to some tem
 poral logic specification. First\, we introduce new results on reachabilit
 y analysis...
DTSTART:20190926T140000
DTEND:20190926T153000
DURATION:PT1H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Pierre-Jean Meyer - Reachability analysis and decompositions for ab
 straction-based control synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-310548UghX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 20 September 2019 - Auditorium (Build
 ing IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
09:00 - Salle : Auditorium (Building IMAG)

-- Oded Maler Memorial D
 ay\, Organized by VERIMAG


« Oded Maler Memorial Day » 

Abstract:

The laborato
 ry VERIMAG is organizing a one-day workshop on 20 September 2019 in Grenob
 le to celebrate the life and scientific legacy of Oded Maler\, who sadly l
 eft us last year. \n\nInformation on this event is available at\n\nhttps:/
 /odedmalerday.sciencesconf.org/


= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =
Other seminars at VERIMAG -...
DTSTART:20190920T090000
DTEND:20190920T110000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:-- Oded Maler Memorial Day - Oded Maler Memorial Day
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3106c9Jt7E@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 September 2019 - Auditorium (Bui
 lding IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
14:00 - Salle : Auditorium (Building IMAG)

Martin Franzle\, Carl 
 von Ossietzky Universitat Oldenburg\, Germany
https://uol.de//hs/mitarbeite
 rinnen-und-mitarbeiter/prof-dr-martin-fraenzle

« What’s to Come is Still Un
 sure: Automatically Synthesizing and Verifying Controllers Resilient to De
 layed Interaction » 

Abstract:

The advent of systems of cooperative cyber-ph
 ysical systems draws\nattention to a central problem of networked and dist
 ributed control\nsystems: the ubiquity of delay in feedback loops between 
 logically or\nspatially distributed components\, which is...
DTSTART:20190919T140000
DTEND:20190919T153000
DURATION:PT1H30M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Martin Franzle - What’s to Come is Still Unsure: Automatically Synt
 hesizing and Verifying Controllers Resilient to Delayed Interaction
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3107mgrV2X@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 11 July 2019 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Eric Ga
 scard\, SCOP\, Polytech Grenoble


«  Quantitative Analysis of Dynamic Fault 
 Trees by means of Monte Carlo Simulations: Event-Driven Simulation Approac
 h ( Quantitative Analysis of Dynamic Fault Trees by means of Monte Carlo S
 imulations: Event-Driven Simulation Approach) » 

Résumé :

The reliability an
 alysis of complex and dynamic systems is often achieved by a quantitative 
 analysis of dynamic\nfault trees (DFT)\, which model the system failure\, 
 i.e. a specific undesired event called top event\, in terms...
DTSTART:20190711T140000
DTEND:20190711T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Eric Gascard -  Quantitative Analysis of Dynamic Fault Trees by mea
 ns of Monte Carlo Simulations: Event-Driven Simulation Approach ( Quantita
 tive Analysis of Dynamic Fault Trees by means of Monte Carlo Simulations: 
 Event-Driven Simulation Approach)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3107IJTuG4@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  9 July 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nLionel Rieg\, VERIMAG\n\n\n« Integrating Formal Schedulability Analysis 
 into a Verifed OS Kernel » \n\nAbstract:\n\nFormal verification of real-ti
 me systems is attractive because these systems often perform critical oper
 ations. Unlike non real-time systems\, latency and response time guarantee
 s are of critical importance in this setting\, as much as functional corre
 ctness. Nevertheless\, formal verification of real-time OSes usually stops
  the scheduling analysis at the policy level: they only prove that the sch
 eduler (or...
DTSTART:20190709T140000
DTEND:20190709T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Lionel Rieg - Integrating Formal Schedulability Analysis into a Ver
 ifed OS Kernel
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3108i2R1ri@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  4 July 2019 - Room 206 (2nd floor\
 , badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Radu IO
 SIF\, VERIMAG
http://nts.imag.fr/index.php/Radu_Iosif

« Alternating Automata
  Modulo First Order Theories » 

Abstract:

We introduce first order alternati
 ng automata\, a generalization of\nboolean alternating automata\, in which
  transition rules are described\nby multisorted first order formulae\, wit
 h states and internal\nvariables given by uninterpreted predicate terms. T
 he model is closed\nunder union\, intersection and complement\, and its em
 ptiness problem is\nundecidable\, even for the simplest data...
DTSTART:20190704T140000
DTEND:20190704T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - Alternating Automata Modulo First Order Theories
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3109gNJpoF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  2 July 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nIndranil Saha \, IIT Kanpur\, India\n\n\n« Developing Autonomous Multi-R
 obot Systems for Complex Missions » \n\nAbstract:\n\n Autonomous multi-rob
 ot systems have tremendous potential to be useful in various applications\
 , including search and rescue\, surveillance\, law enforcement\, precision
  agriculture\, and warehouse management. Given a high-level mission specif
 ication for a multi-robot system\, it is technically challenging to determ
 ine the responsibilities of the individual robots and a plan for them to e
 xecute their...
DTSTART:20190702T140000
DTEND:20190702T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Indranil Saha  - Developing Autonomous Multi-Robot Systems for Comp
 lex Missions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31106PlUGk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 June 2019 - Seminar Room\, ground
  floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (Buil
 ding IMAG)\n\nBraham Lotfi Mediouni\, Verimag (RSD)\n\n\n« Modeling and An
 alysis of Stochastic Real-Time Systems » \n\nAbstract:\n\nIn this thesis\,
  we address the problem of modeling and verification of complex systems ex
 hibiting both probabilistic and timed behaviors. Designing such systems ha
 s become increasingly complex due to the heterogeneity of the involved com
 ponents\, the uncertainty resulting from open environment and the real-tim
 e constraints inherent to their application domains. Handling both softwar
 e and...
DTSTART:20190628T140000
DTEND:20190628T180000
DURATION:PT4H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Braham Lotfi Mediouni - Modeling and Analysis of Stochastic Real-Ti
 me Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3111ukSwtu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 26 June 2019 - Seminar Room Part 
 1\, ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room Part 1\, g
 round floor (Building IMAG)\n\nRany Kahil\, Verimag\, Université Grenoble 
 Alpes\nhttps://www.linkedin.com/in/rany-kahil/\n\n« Schedulability in Mixe
 d- criticality Systems » \n\nRésumé :\n\nLes systèmes temps-réel critiques
  doivent exécuter  leurs tâches dans les délais impartis. En cas de défail
 lance\, des événements peuvent  avoir des catastrophes économiques. Dans c
 ertain cas une atteinte à des vies humaines. Des classifications des défai
 llances par rapport aux niveaux des risques encourus ont été...
DTSTART:20190626T140000
DTEND:20190626T160000
DURATION:PT2H0M0S
LOCATION:Seminar Room Part 1\, ground floor (Building IMAG)
SUMMARY:Rany Kahil - Schedulability in Mixed- criticality Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31129DIzOS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 25 June 2019 - Auditorium (Building 
 IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =
14:00 - Salle : Auditorium (Building IMAG)

Hernan Ponce de Leon \, Fort
 iss\, Munich\, Germany
https://www.fortiss.org/en/about-us/people/hernan-po
 nce-de-leon/

« BMC with Weak Memory Models » 

Abstract:

In this talk I'll rep
 ort progress in verification tool engineering for\nweak memory models. I w
 ill present Dartagnan\, a bounded model checking\ntools for concurrent pro
 grams. Its distinguishing feature is the memory\nmodel as part of the inpu
 t. Dartagnan reads CAT\, the standard language\nfor memory models which al
 lows to define x86/TSO\, ARMv7\, ARMv8\, Power\,\nC/C++\, and...
DTSTART:20190625T140000
DTEND:20190625T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Hernan Ponce de Leon  - BMC with Weak Memory Models
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3112lz1NI9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 14 June 2019 - Room 206 (2nd floor\, 
 badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Benoit Ba
 rbot\, LACL\, Universite Paris Est\, Creteil


« Cosmos a quantitative verifi
 cation tool for large stochastic systems » 

Abstract:

Large family of system
 s can be modeled with stochastic processes\, for example: waiting queue fo
 r network infrastructure\, biological systems\, road traffic flow\, ...\nD
 ue to combinatorial explosion\, analysis using exhaustive methods of such 
 systems is intractable. More over it is often necessary to answer both\; q
 ualitative question like 'Does an unsafe state is reachable is the...
DTSTART:20190614T140000
DTEND:20190614T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Benoit Barbot - Cosmos a quantitative verification tool for large s
 tochastic systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3113dVI51Z@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 June 2019 - Room 206 (2nd floo
 r\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nSimon IOSTI\, Verimag\n\n\n« Using neural networks to improve performa
 nces of correct-by-construction controllers » \n\nAbstract:\n\nThe use of 
 neural networks is usually considered as antinomic with correct-by-constru
 ction paradigms. This situation can be thought of as illustrating the trad
 e-off between performance and accuracy. Recent researches and ideas have n
 evertheless been put forth to investigate mixed approaches allowing for th
 e use of deep learning methods in correct-by-construction controller synth
 esis (see\,...
DTSTART:20190613T140000
DTEND:20190613T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Simon IOSTI - Using neural networks to improve performances of corr
 ect-by-construction controllers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3114SJNF3G@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 May 2019 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Saddek  
 Bensalem\, Verimag 
https://www-verimag.imag.fr/~bensalem/

«  Engineering Tr
 ustworthy Learning-Enabled Autonomous Systems » 

Abstract:

ETLAS is a new H2
 020 project submitted last March.  \nThe ETLAS proposal gathers prominent 
 academic \nresearch groups and leading industrial partners  (12 partners f
 rom 6 European and 2 associated countries).\n\nThe targeted breakthrough i
 s to achieve cost-effectively higher Safety\, Security and \nPerformance b
 y developing a novel mixed design approach combining the...
DTSTART:20190509T140000
DTEND:20190509T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Saddek  Bensalem -  Engineering Trustworthy Learning-Enabled Autono
 mous Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3115AV6gAZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 May 2019 - Room 206 (2nd floor\,
  badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Michael 
 PERIN\, Verimag / UGA
http://www-verimag.imag.fr/~perin/

« Découvrir AMC en 
 45 Questions a Choix Multiples » 

Résumé :

Le logiciel AMC (Auto-Multiple-Ch
 oice) permet de générer et de corriger automatiquement des QCM (Questionna
 ires à Choix Multiples).\nIl accepte des formats texte et LaTeX\, et produ
 it en sortie une feuille de calcul de tableur qui associe une note à un nu
 méro d'étudiant.\n\nAMC est fonctionnel et d'une utilisation relativement 
 aisée à l'exception du réglage des 8 paramètres...
DTSTART:20190502T140000
DTEND:20190502T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michael PERIN - Découvrir AMC en 45 Questions a Choix Multiples
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3117UcHxt9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 29 April 2019 - Seminar Room\, ground
  floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =
09:45 - Salle : Seminar Room\, ground floor (Building
  IMAG)

Invited Speakers\, Onera\, Kalray\, INRIA\, Verimag ...


« Journée thé
 matique Verimag : Many-core Kalray MPPA\, implementation and verification 
 » 

Abstract:

Program :\n\n9.45: welcome\n10.00:\n    - Nicolas Tollenaere\, 
 INRIA: 'KaNN (Kalray Neural Network)'\n    - Cyril Six\, Verimag/Kalray 'C
 ertified and modular postpass-scheduling for VLIW processors in Compcert'
 \n    - Dumitru Potop\, INRIA 'Implementation of parallel real-time applic
 ation on MPPA'\n    - Guillaume Iooss\, INRIA\, 'Front End for the...
DTSTART:20190429T094500
DTEND:20190429T154500
DURATION:PT6H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Invited Speakers - Journée thématique Verimag : Many-core Kalray MP
 PA\, implementation and verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3118ffuBGK@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  5 April 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nRadu IOSIF\, VERIMAG\n\n\n« On the Expressive Completeness and Complexit
 y of Prenex Separation Logic » \n\nAbstract:\n\nThis talk investigates the
  satisfiability problem for Separation Logic\, with unrestricted nesting o
 f separating conjunctions and implications\, for prenex formulae\, in the 
 cases where the universe of possible locations is either countably infinit
 e or finite. If the quantifier prefix is in the language \exists*\forall*\
 , we call this fragment Bernays-SchÃ¶nfinkel-Ramsey Separation Logic [BSR(
 SLk)]....
DTSTART:20190405T140000
DTEND:20190405T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - On the Expressive Completeness and Complexity of Prene
 x Separation Logic
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31189mibJW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  4 April 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nRadu IOSIF\, VERIMAG\n\n\n« Checking Deadlock-Freedom of Parametric Co
 mponent-Based Systems » \n\nAbstract:\n\nWe consider concurrent systems co
 nsisting of a finite but unknown number of components\, that are replicate
 d instances of a given set of finite state automata. The components commun
 icate by executing interactions which are simultaneous atomic state change
 s of a set of components. We specify both the type of interactions (e.g.\ 
 rendez-vous\, broadcast) and the topology (i.e.\ architecture) of the syst
 em (e.g.\...
DTSTART:20190404T140000
DTEND:20190404T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Radu IOSIF - Checking Deadlock-Freedom of Parametric Component-Base
 d Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3119MAxUux@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  1 April 2019 - Auditorium (Building 
 IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =
10:00 - Salle : Auditorium (Building IMAG)

Edward A. Lee\, UC Berkeley
h
 ttps://ptolemy.berkeley.edu/~eal/

« Living Digital Beings » 

Abstract:

Richar
 d Dawkins famously said that a chicken is an egg's way of making\nanother 
 egg.  Is a human a computer's way of making another computer?\nQuite possi
 bly\, the digital devices and services that are taking over so\nmany aspec
 ts of our lives should themselves be viewed as living beings\,\npart of th
 e natural evolutionary process of life. I call these beings\n'eldebees\,' 
 short for living digital beings. They are creatures...
DTSTART:20190401T100000
DTEND:20190401T120000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Edward A. Lee - Living Digital Beings
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3120GZAFAE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 March 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nOlivier VIDAL\, ISTerre\, Universite Grenoble-Alpes\n\n\n« Matières pr
 emières et énergie à l’échelle mondiale dans le contexte de la transition 
 énergétique » \n\nRésumé :\n\nLes accords de Paris (COP21) prévoient d’att
 eindre la neutralité carbone au niveau mondial en 2050. Pour ce faire\, no
 us devons bâtir de nouvelles infrastructures de production\, stockage\, tr
 ansport et utilisation d’énergie qui consomment de nombreuses matières pre
 mières « de base » et des substances plus rares. Ces matières...
DTSTART:20190328T140000
DTEND:20190328T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Olivier VIDAL - Matières premières et énergie à l’échelle mondiale 
 dans le contexte de la transition énergétique
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31214fIvmN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 20 March 2019 - Rim El Ballouli\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n14:00 - Salle : Rim El Ballouli\n\nRim El Ballouli\, Universite Grenoble
  Alpes\n\n\n« Modeling Self-configuration in Architecture-based Self-adapt
 ive systems » \n\nAbstract:\n\nModern systems are pressured to adapt in re
 sponse to their constantly changing environment to remain useful. Traditio
 nally\, this adaptation has been handled at down times of the system. ther
 e is an increased demand to automate this process and achieve it whilst th
 e system is running. Self-adaptive systems were introduced as a realizatio
 n of continuously adapting systems. Self-adaptive systems are able to modi
 fy at...
DTSTART:20190320T140000
DTEND:20190320T160000
DURATION:PT2H0M0S
LOCATION:Rim El Ballouli
SUMMARY:Rim El Ballouli - Modeling Self-configuration in Architecture-based
  Self-adaptive systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3121bCC8NE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  8 March 2019 - Room 206 (2nd floor
 \, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n10:00 - Salle : Room 206 (2nd floor\, badged access)\n
 \nMathias Bourgoin\, Nomadic Labs\nhttps://tezos.com/\n\n« An overview of 
 the Tezos blockchain » \n\nAbstract:\n\nBlockchains\, such as Bitcoin or E
 thereum\, are distributed and decentralized ledgers. Bitcoin was\, in 2009
 \,  the first blockchain\, allowing financial transactions using a cryptoc
 urrency. Then new blockchains such as Ethereum introduced smart contracts\
 , small computer programs running in the blockchain and Dapps\, distribute
 d applications running on the blockchain (through smart contracts). These 
 blockchains are...
DTSTART:20190308T100000
DTEND:20190308T110000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Mathias Bourgoin - An overview of the Tezos blockchain
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3122m1mW9X@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 22 February 2019 - Auditorium (Build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n13:30 - Salle : Auditorium (Building IMAG)\n\nMoustapha Lo\, V
 erimag\n\n\n« Implementing a Real-time Avionic application on a Manycore P
 rocessor » \n\nAbstract:\n\nTraditional  single-cores are no longer suffic
 ient to meet the growing needs of performance in avionics domain. Multi-co
 re and many-core processors have emerged in the recent years in order to i
 ntegrate several functions thanks to the resource sharing. In contrast\, a
 ll multi-core and many-core processors do not necessarily satisfy the avio
 nic constraints. We prefer to have more determinism than computing power b
 ecause...
DTSTART:20190222T133000
DTEND:20190222T163000
DURATION:PT3H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Moustapha Lo - Implementing a Real-time Avionic application on a Ma
 nycore Processor
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3123V5Ztt5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 18 February 2019 - IMAG Auditorium
= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:0
 0 - Salle : IMAG Auditorium

Guillaume Baudart\, IBM T. J. Watson Research C
 enter\, Yorktown Heights
https://researcher.watson.ibm.com/researcher/view.
 php?person=ibm-Guillaume.Baudart

« Probabilistic Reactive Programming (Prob
 abilistic Reactive Programming) » 

Abstract:

Modeling reactive systems with 
 uncertainty is challenging because\nreactive systems typically run without
  terminating\, interact with an\nexternal environment\, and evolve during 
 execution. To facilitate the\nmodeling of such systems\, we propose a prog
 ramming language that mixes\nfeatures from both probabilistic...
DTSTART:20190218T140000
DTEND:20190218T160000
DURATION:PT2H0M0S
LOCATION:IMAG Auditorium
SUMMARY:Guillaume Baudart - Probabilistic Reactive Programming (Probabilist
 ic Reactive Programming)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31243bzWH6@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 14 February 2019 - Auditorium (grou
 nd floor)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
14:00 - Salle : Auditorium (ground floor)

Nikos Gorogiannis\, Faceb
 ook
https://ngorogiannis.bitbucket.io/

« Concurrency bug detection at scale 
 with Infer » 

Abstract:

Concurrency bugs are notoriously difficult to reason
  about in program verification. \nI will present two static analyses deplo
 yed at Facebook for detecting (a) data races and (b) deadlocks\, both for 
 Java code. These analyses have low-FP rates as a core design goal\, and ar
 e implemented in the open-source Infer analyser. I will discuss the design
  trade-offs of these analyses\, our experience from...
DTSTART:20190214T140000
DTEND:20190214T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (ground floor)
SUMMARY:Nikos Gorogiannis - Concurrency bug detection at scale with Infer
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3125WziD2x@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  7 February 2019 - Room 206 (2nd fl
 oor\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Jac
 ques COMBAZ\, CNRS\, Verimag


« L'assemblage des composants en BIP (Assembli
 ng Components in BIP) » 

Résumé :

L'infrastructure BIP (Behavior\, Interacti
 ons\, Priorities) a pour objectif la conception et l'analyse d'application
 s embarquées complexes et hétérogènes. Elle permet la construction de modè
 les structurés en coordonnant les composants à l'aide d'opérateurs d'assem
 blage très expressifs (les connecteurs/interactions et les priorités).\nDa
 ns cet exposé nous revisitons d'abord la notion...
DTSTART:20190207T140000
DTEND:20190207T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Jacques COMBAZ - L'assemblage des composants en BIP (Assembling Com
 ponents in BIP)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3126vx7crf@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 25 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nTom Yamaguchi\, TOYOTA  \n\n\n« Application of Abstract Interpretation
  to the Automotive Electronic Control System » \n\nAbstract:\n\nApplicatio
 n of Abstract Interpretation to the Automotive Electronic Control System\n
 \n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Semina
 rs\,62.html?lang=en\nLocation/Vision: Room 206 (2nd floor\, badged access)
  - https://batiment.imag.fr/fr/contact-adresses-plan-dacces\nTo unsubscrib
 e\, reply to this...
DTSTART:20190125T140000
DTEND:20190125T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Tom Yamaguchi - Application of Abstract Interpretation to the Autom
 otive Electronic Control System
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3127ZnV01u@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 January 2019 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Maiz
 a Claire\, VERIMAG
http://www-verimag.imag.fr/~maiza

« WCET  and  interferen
 ce  analysis  for  multicore systems » 

Abstract:

In this talk\, we present 
 a survey on multi-core timing analyses including delays due to\ninterferen
 ces (shared memory\, shared bus).\nWe show that interference analysis is p
 ossible (scalability and precision).\nWe illustrate this point with our in
 terference analysis where the delay is integrated into schedulability anal
 ysis.\nWe show that applying this analysis to a real platform...
DTSTART:20190124T140000
DTEND:20190124T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Maiza Claire - WCET  and  interference  analysis  for  multicore sy
 stems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3127KHtPjz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 22 January 2019 - Room 206 (2nd fl
 oor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access
 )\n\nGeorg Struth\, University of Sheffield\n\n\n« Verifying Hybrid System
 s with Modal Kleene Algebra » \n\nAbstract:\n\nHybrid Systems integrate co
 ntinuous dynamics and discrete control. Their verification\, in domains li
 ke the control of chemical plants\, finance and traffic systems\, the coor
 dination of autonomous vehicles or robots\, and the optimisation of mechan
 ical systems or bio systems engineering\, is increasingly important. A pro
 minent approach is differential dynamic logic (dL)\, a modal logic for rea
 soning about...
DTSTART:20190122T140000
DTEND:20190122T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Georg Struth - Verifying Hybrid Systems with Modal Kleene Algebra
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3128dWlraK@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 21 January 2019 - Room 206 (2nd floor
 \, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Sergio
   Yovine\, Universidad ORT Uruguay


« Formal specification and implementatio
 n of an automated pattern-based parallel-code generation framework » 

Abstr
 act:

Formal specification and implementation of an automated pattern-based 
 parallel-code generation framework\nGervasio PÃ©rez and Sergio Yovine\n\nA
 bstract \nProgramming correct parallel software in a cost-effective way is
  a\nchallenging task requiring a high degree of expertise. As an attempt t
 o\novercoming the pitfalls undermining parallel...
DTSTART:20190121T140000
DTEND:20190121T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sergio  Yovine - Formal specification and implementation of an auto
 mated pattern-based parallel-code generation framework
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3129Bg79dA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 18 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nChi-Hong Cheng\, Fortiss\nhttps://www.fortiss.org/ueber-uns/mitarbeite
 r/chih-hong-cheng/\n\n« When neural networks meet dependability » \n\nAbst
 ract:\n\nNeural networks are instrumental in developing automated driving 
 components such as perception or intention prediction. The safety-critical
  aspect of such a domain makes dependability of neural networks a central 
 concern. In this talk\, I highlight our initial steps towards engineering 
 dependable neural networks by considering approaches such as testing\, con
 straint...
DTSTART:20190118T140000
DTEND:20190118T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Chi-Hong Cheng - When neural networks meet dependability
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3129gDxuu5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 17 January 2019 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Paol
 o Torrini\, Verimag / PACSS


« Reifying and translating a monadic fragment o
 f Gallina » 

Abstract:

We present ongoing work on verified compilation of im
 perative\nfunctional code in Coq\, relying on the CompCert C compiler and 
 using a\nreflective approach. Here we focus on the reflection of a monadic
 \nfragment of Gallina\, corresponding to a first-order imperative\nlanguag
 e with primitive recursion\, in a deeply embedded extensible\nlanguage tha
 t we call DEC2 and which can be translated to the CompCert\nC...
DTSTART:20190117T140000
DTEND:20190117T153000
DURATION:PT1H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Paolo Torrini - Reifying and translating a monadic fragment of Gall
 ina
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3130MgxZA5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  8 January 2019 - Auditorium (Buil
 ding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMichal Valko\, 
 SequeL\, Inria Lille - Nord Europe\nhttp://researchers.lille.inria.fr/~val
 ko/hp/\n\n« The power of graphs in speeding up online learning and decisio
 n making » \n\nAbstract:\n\n I will describe adaptive solutions of using g
 raphs for efficiently encoding\, discovering\, and using the (extra) infor
 mation that is either explicitly or implicitly present in a given environm
 ent. This information can be\, smoothness\, side observations\, state-spac
 es similarities\, or a favorable reward structure which makes the learning
  faster or...
DTSTART:20190108T140000
DTEND:20190108T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Michal Valko - The power of graphs in speeding up online learning a
 nd decision making
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3131NXKUS5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  7 January 2019 - Room 206 (2nd flo
 or\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged access)
 \n\nMichal Valko\,  SequeL\, Inria Lille - Nord Europe\n\n\n« A simple par
 ameter-free and adaptive approach to optimization under a minimal local sm
 oothness assumption » \n\nAbstract:\n\nWe will describe the history and th
 e most recent results in the bandit approach black-box optimization with p
 rovable global guarantees. In particular\,  we will study the problem of o
 ptimizing a function under a budgeted number of evaluations. We only assum
 e that the function is locally smooth around one of its global optima. The
  difficulty...
DTSTART:20190107T140000
DTEND:20190107T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Michal Valko - A simple parameter-free and adaptive approach to opt
 imization under a minimal local smoothness assumption
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-313275T13c@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 19 December 2018 - Room 248\, IM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Room 248\, IMAG\n\nKhalil Ghorbal\, INRIA\nhttp://kha
 lilghorbal.info/\n\n« Simulating and Verifying Cyber-Physical Systems: Cur
 rent Challenges and Novel Research Directions » \n\nAbstract:\n\nModeling 
 real-life applications require the ability to combine continuous and discr
 ete behaviors at once. The behavior of physical components\, governed by e
 lectrical and kinetic laws\, are naturally represented as continuous solut
 ions of differential equations. It contrasts with several inherently discr
 ete phenomenon such as...
DTSTART:20181219T140000
DTEND:20181219T160000
DURATION:PT2H0M0S
LOCATION:Room 248\, IMAG
SUMMARY:Khalil Ghorbal - Simulating and Verifying Cyber-Physical Systems: C
 urrent Challenges and Novel Research Directions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3133vVIkFU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 17 December 2018 - Seminar Room 2\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room 2\, ground flo
 or (Building IMAG)\n\nNIKOLAOS KEKATOS\, Verimag Laboratory\, University o
 f Grenoble Alpes\n\n\n« Vérification formelle des systèmes cyber-physiques
  dans le processus industriel de la conception basée sur modèle (Formal Ve
 rification of Cyber-Physical Systems in the Industrial Model-Based Design 
 Process) » \n\nRésumé :\n\nLes systèmes cyber-physiques sont une classe de
  systèmes complexes\, de grande échelle\, souvent critiques enlever de sûr
 eté\, qui apparaissent dans des applications industrielles variées. Des...
DTSTART:20181217T140000
DTEND:20181217T160000
DURATION:PT2H0M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:NIKOLAOS KEKATOS - Vérification formelle des systèmes cyber-physiqu
 es dans le processus industriel de la conception basée sur modèle (Formal 
 Verification of Cyber-Physical Systems in the Industrial Model-Based Desig
 n Process)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3133l497ow@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 11 December 2018 - Room 206 (2nd flo
 or\, badged access)
= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =
14:00 - Salle : Room 206 (2nd floor\, badged access)

Bibe
 k Kabi\, LIX 
http://www.lix.polytechnique.fr/Labo/Bibek.Kabi/

« Combining Z
 onotope Abstraction and Constraint Programming for Synthesizing Inductive 
 Invariants » 

Abstract:

We propose to extend an existing framework combining
  ab-\nstract interpretation and continuous constraint programming for nume
 r-\nical invariant synthesis\, by using more expressive underlying abstrac
 t\ndomains\, such as zonotopes. The original method\, which relies on iter
 a-\ntive refinement\, splitting and tightening a collection of...
DTSTART:20181211T140000
DTEND:20181211T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Bibek Kabi - Combining Zonotope Abstraction and Constraint Programm
 ing for Synthesizing Inductive Invariants
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3134eSutvk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2018 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nJoseph Sifakis\, Verimag\nhttp://www-verimag.imag.fr/PEOPLE/Joseph.
 Sifakis/\n\n« On the Nature of Autonomy: A Rigorous Architectural Characte
 rization  » \n\nAbstract:\n\nThe concept of autonomy is key to the IoT vis
 ion promising increasing integration of smart services and systems minimiz
 ing human intervention. This vision challenges our capability to build com
 plex open trustworthy autonomous systems. We lack a rigorous common semant
 ic framework for autonomous systems. There is currently a lot of confusion
 ...
DTSTART:20181206T140000
DTEND:20181206T153000
DURATION:PT1H30M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Joseph Sifakis - On the Nature of Autonomy: A Rigorous Architectura
 l Characterization 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31356GRsxS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 November 2018 - Room 206 (2nd 
 floor\, badged access)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, badged acce
 ss)\n\nSylvain Boulmé\, Verimag\nhttps://github.com/boulme/ImpureDemo\n\n«
  Importation d'oracles ML impératifs dans du code Coq vérifié » \n\nRésumé
  :\n\nL'utilisation d'oracles dans du code Coq est une des clés du succès 
 de CompCert (le premier compilateur C formellement vérifié). Un tel oracle
  correspond à du code non vérifié développé en OCaml\, et qui produit des 
 résultats qui sont vérifiés par du code prouvé en Coq. Cependant\, dans Co
 mpCert\, les oracles sont actuellement déclarés à travers une...
DTSTART:20181129T140000
DTEND:20181129T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (2nd floor\, badged access)
SUMMARY:Sylvain Boulmé - Importation d'oracles ML impératifs dans du code C
 oq vérifié
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3135BrpZ2j@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 22 November 2018 - Auditorium (Buil
 ding IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =
10:00 - Salle : Auditorium (Building IMAG)

analyse et verif. leger
 es Une journee de reflexion\, 5 exposes  10h - 16h30
https://mensuel.framap
 ad.org/p/programme-lightweight-verification

« Techniques d'analyse et de ve
 rification legeres  (Lightweight analysis and verification techniques) » 

R
 ésumé :

PROGRAMME : 5 seminaires de 45 min suivi de 10 min de question\n\n*
  10h-10h55 : Julia LAWALL\, Directrice de Recherche INRIA/LIP6 (Source-Cod
 e Evolution and Bug Finding in OS)\n\n   TITLE : Software evolution and bu
 g finding using Coccinelle\n\n   ABSTRACT : Coccinelle...
DTSTART:20181122T100000
DTEND:20181122T163000
DURATION:PT6H30M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:analyse et verif. legeres Une journee de reflexion - Techniques d'a
 nalyse et de verification legeres  (Lightweight analysis and verification 
 techniques)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3136tZMpkh@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday 16 November 2018 - Auditorium (Buildin
 g IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =
10:30 - Salle : Auditorium (Building IMAG)

Amaury Graillat\, VERIMAG/
 KALRAY


« Parallel Code Generation of Synchronous Programs for a Many-core A
 rchitecture » 

Résumé :

La plupart des systèmes critiques sont dits temps-ré
 el durs\npuisqu'ils requièrent des garanties temporelle fortes. Ces\nsystè
 mes sont de plus en plus complexes et les processeurs\nmono-cœurs traditio
 nnels ne sont plus assez puissants. Les\nmulti-cœurs et les pluri-cœurs so
 nt des alternatives plus\npuissantes\, cependant ils contiennent des resso
 urces partagées.\nLes accès concurrents à ces...
DTSTART:20181116T103000
DTEND:20181116T123000
DURATION:PT2H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Amaury Graillat - Parallel Code Generation of Synchronous Programs 
 for a Many-core Architecture
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3137EAU6ok@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 31 October 2018 - Auditorium (Bui
 lding IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n14:00 - Salle : Auditorium (Building IMAG)\n\nMahieddine DEL
 LABANI\, Verimag\n\n\n« Formal Methods for Distributed Real-Time Systems »
  \n\nAbstract:\n\nNowadays\, real-time systems are ubiquitous in several a
 pplication domains. Such an emergence led to an increasing need of perform
 ance (resources\, availability\, concurrency\, etc.) and initiated a shift
  from the use of single processor based hardware platforms\, to large sets
  of interconnected and distributed computing nodes. This trend introduced 
 the birth of a new family of systems that are intrinsically distributed\, 
 namely...
DTSTART:20181031T140000
DTEND:20181031T170000
DURATION:PT3H0M0S
LOCATION:Auditorium (Building IMAG)
SUMMARY:Mahieddine DELLABANI - Formal Methods for Distributed Real-Time Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31385GsFuv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 23 October 2018 - Room 206 (2nd fl
 oor\, restricted access)\n= = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = =\n14:00 - Salle : Room 206 (2nd floor\, restricte
 d access)\n\nThusitha Asela Bandara\, Verimag\n\n\n« Un protocole de charg
 e adaptatif pour les batteries Lithium-lon (An Adaptive Charge Protocol fo
 r Lithium-lon Batteries) » \n\nRésumé :\n\nLes batteries secondaires au li
 thium-ion (Li-ion) sont devenues la technologie prédominante pour une gamm
 e d'appareils électroniques allant des gadgets de consommation aux locomot
 ives haut de gamme et aux stockages d'énergie dans les réseaux intelligent
 s. La prolifération des appareils mobiles et les développements récents...
DTSTART:20181023T140000
DTEND:20181023T150000
DURATION:PT1H0M0S
LOCATION:Room 206 (2nd floor\, restricted access)
SUMMARY:Thusitha Asela Bandara - Un protocole de charge adaptatif pour les 
 batteries Lithium-lon (An Adaptive Charge Protocol for Lithium-lon Batteri
 es)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3139cfW1Vb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 October 2018 - Amphi D1\, DLST
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Amphi D1\, DLST\n\nFlorent Chevrou\, IRIT\n\n\n« Formal
 isation of Asynchronous Interactions » \n\nAbstract:\n\nLarge computing sy
 stems are generally built by connecting several distributed subsystems. Th
 e way these entities communicate is crucial to the proper functioning of t
 he overall composed system. Therefore\, in the context of the formal devel
 opment and verification of such systems\, an in-depth study of these inter
 actions makes sense\, especially when it comes to decomposition an substit
 utability. There are two categories: synchronous and asynchronous communic
 ation. In...
DTSTART:20181011T140000
DTEND:20181011T160000
DURATION:PT2H0M0S
LOCATION:Amphi D1\, DLST
SUMMARY:Florent Chevrou - Formalisation of Asynchronous Interactions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3139Mfed5V@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  4 October 2018 - Salle Séminaire (
 rez-de-chaussée Bât IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =
15:30 - Salle : Salle Séminaire (rez-de-chaussée B
 ât IMAG)

Erwan Jahier\, verimag


« [Technical Seminar] A gentle introduction 
 to Gitlab-CI and docker » 

Abstract:

The first edition of the 'Verimag Techn
 ical Seminars' (we plan to organize around 4 such seminars per year) deals
  with gitlab-CI and docker.\n\nThe objective is to rough out the subject\,
  and explain why (and how) those tools can help with\n  - the development 
 and the maintenance of research prototypes\n  - install/try new software w
 ithout polluting its .bashrc\n  - distribute...
DTSTART:20181004T153000
DTEND:20181004T173000
DURATION:PT2H0M0S
LOCATION:Salle Séminaire (rez-de-chaussée Bât IMAG)
SUMMARY:Erwan Jahier - [Technical Seminar] A gentle introduction to Gitlab-
 CI and docker
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-314075Gj4d@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 20 September 2018 - Salle 206\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Salle 206\n\nCyril Six\, Kalray & Verimag\nhttps://www.kalr
 ayinc.com/\n\n« Compilateur CompCert certifié pour processeur VLIW Kalray 
 (Extending the CompCert certified compiler for a VLIW processor of Kalray)
  » \n\nRésumé :\n\nLes processeurs VLIW [Fisher\, 1983]\, acronyme de « Ve
 ry Long Instruction Word »\, sont conçus pour donner aux programmes assemb
 leurs du contrôle sur la façon de paralléliser les ressources de processeu
 r à chaque instruction. Autrement dit\, une instruction VLIW représente un
  certain agrégat de calculs atomiques à exécuter en parallèle sur les...
DTSTART:20180920T140000
DTEND:20180920T153000
DURATION:PT1H30M0S
LOCATION:Salle 206
SUMMARY:Cyril Six - Compilateur CompCert certifié pour processeur VLIW Kalr
 ay (Extending the CompCert certified compiler for a VLIW processor of Kalr
 ay)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3141uur81T@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 September 2018 - Salle 206 (sa
 lle Chamois)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = =\n14:00 - Salle : Salle 206 (salle Chamois)\n\nFranz Mayr\, U
 niversidad ORT Uruguay\n\n\n« Regular inference on artificial neural netwo
 rks » \n\nAbstract:\n\nThis paper explores the general problem of explaini
 ng the behavior of artificial neural networks (ANN). The goal is to constr
 uct a representation which enhances human understanding of an ANN as a seq
 uence classifier\, with the purpose of providing insight on the rationale 
 behind the classification of a sequence as positive or negative\, but also
  to enable performing further analyses\, such as automata-theoretic formal
 ...
DTSTART:20180913T140000
DTEND:20180913T150000
DURATION:PT1H0M0S
LOCATION:Salle 206 (salle Chamois)
SUMMARY:Franz Mayr - Regular inference on artificial neural networks
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3142t8uvL6@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 25 June 2018 - Room 206\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - S
 alle : Room 206\n\nStefano Berardi\, University of Torino\nhttp://www.di.u
 nito.it/~stefano/\n\n« Martin-Lof's Inductive Definitions Are Not Equivale
 nt to Cyclic Proofs » \n\nAbstract:\n\nCyclic proofs (Brotherston\, Simpso
 n) are an alternative formalization of induction on data bases\, suitable 
 for proof search and for Separation Logic\, it is interesting to know what
  tehy are able to prove. Brotherston-Simpson Conjecture (2011) says  that 
 cyclic proofs are equivalent to LKID\, Martin-Lof's Theory of (finitary) I
 nductive Definitions. Brotherston-Simpson Conjecture is false (Fossacs 201
 7): the...
DTSTART:20180625T100000
DTEND:20180625T120000
DURATION:PT2H0M0S
LOCATION:Room 206
SUMMARY:Stefano Berardi - Martin-Lof's Inductive Definitions Are Not Equiva
 lent to Cyclic Proofs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3142xnMZRm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 22 June 2018 - Seminar Room\, groun
 d floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = =\n11:00 - Salle : Seminar Room\, ground floor (Bui
 lding IMAG)\n\nPallab Dasgupta\, IIT Kharagpur\nhttp://cse.iitkgp.ac.in/~p
 allab/\n\n« Verification challenges in the Power Management fabric of Inte
 grated Circuits » \n\nAbstract:\n\nPower is one of the primary criteria fo
 r design optimization. Modern SOCs have extremely complex power management
  fabric which is responsible for orchestrating the delivery of power to va
 rious power domains inside the integrated circuit. Messing up the power ma
 nagement is not uncommon\, and often the errors are manifested through cor
 ruption in...
DTSTART:20180622T110000
DTEND:20180622T120000
DURATION:PT1H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Pallab Dasgupta - Verification challenges in the Power Management f
 abric of Integrated Circuits
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3143MWV0Cv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 31 May 2018 - Auditorium (IMAG)\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 14:00 - Salle : Auditorium (IMAG)\n\nCristina Serban\, VERIMAG\, Universit
 é Grenoble Alpes\n\n\n« Raisonnement automatisé pour la Logique de Séparat
 ion avec des définitions inductives (Automated Reasoning in Separation Log
 ic with Inductive Definitions) » \n\nRésumé :\n\nLa contribution principal
 e de cette thèse est un système de preuve correct et complet pour les impl
 ications entre les prédicats inductifs\, fréquemment rencontrées lors de l
 a vérification des programmes qui utilisent des structures de données récu
 rsives allouées dynamiquement. Nous introduisons un système de...
DTSTART:20180531T140000
DTEND:20180531T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Cristina Serban - Raisonnement automatisé pour la Logique de Sépara
 tion avec des définitions inductives (Automated Reasoning in Separation Lo
 gic with Inductive Definitions)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3144OJ4rUB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 17 May 2018 - salle 206
= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle
  : salle 206

Michael PERIN\, VERIMAG / UniversitÃ© Grenoble-Alpes
http://www
 -verimag.imag.fr/~perin/

« Automatic Grading: take a CEGAR and let the mach
 ine do your work » 

Abstract:

Working as an assistant professor is great\, b
 ut with one dark side: grading exams is boring and takes time. The unavoid
 able consequence is non-uniform marking due to the weariness of a human co
 rrector. Moreover\, it provides few and delayed feedbacks to students.\n\n
 Nowadays almost all students work on their own laptops and it thus becomes
  feasible to use these for digital exams. For teaching...
DTSTART:20180517T140000
DTEND:20180517T150000
DURATION:PT1H0M0S
LOCATION:salle 206
SUMMARY:Michael PERIN - Automatic Grading: take a CEGAR and let the machine
  do your work
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3144DUdpKk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 16 May 2018 - Auditorium (IMAG)\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \n14:00 - Salle : Auditorium (IMAG)\n\nArvind Adimoolam\, VERIMAG\nhttps:/
 /sites.google.com/site/arvind23adi/\n\n« A Calculus of Complex Zonotopes f
 or Computing Invariants of Affine Hybrid Systems » \n\nAbstract:\n\nComput
 ing reachable sets is a de facto approach used in many formal verification
  methods for hybrid systems. But exact computation of the reachable set is
  an intractable problem for many kinds of hybrid systems\, either due to u
 ndecidability or high computational complexity. Alternatively\, quite a lo
 t of research has been focused on using set representations that can be ef
 ficiently...
DTSTART:20180516T140000
DTEND:20180516T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Arvind Adimoolam - A Calculus of Complex Zonotopes for Computing In
 variants of Affine Hybrid Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3145iCvSVT@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 15 May 2018 - Batiment IMAG\, Sall
 e 206\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Batiment IMAG\, Salle 206\n\nLuc Jaulin\, Lab-STIC
 C\, ENSTA-Bretagne\nhttp://www.ensta-bretagne.fr/jaulin/\n\n« Computing in
 ner and outer approximations of forward reach sets of a nonlinear dynamica
 l system » \n\nAbstract:\n\nGiven a nonlinear continous-time system and an
  initial set X0\, the forward reach set corresponds to the set of all stat
 es that can be reached for some given time t>0\, assuming that the initial
  state belongs to X0. In the presentation\, I will show that guaranteed in
 ner and outer approximations of the forward reach set can be computed by u
 sing a fixed...
DTSTART:20180515T140000
DTEND:20180515T160000
DURATION:PT2H0M0S
LOCATION:Batiment IMAG\, Salle 206
SUMMARY:Luc Jaulin - Computing inner and outer approximations of forward re
 ach sets of a nonlinear dynamical system
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3146fOSVbX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  7 May 2018 - Auditorium (IMAG)\n= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13
 :30 - Salle : Auditorium (IMAG)\n\nAlexandre Rocca\, Verimag\n\n\n« Méthod
 es formelles pour la modélisation et la validation de modèles biologiques 
 (Formal methods for modelling and validation of biological models) » \n\nR
 ésumé :\n\nL'objectif de cette thèse est la modélisation et l'étude de sys
 tèmes biologiques par l'intermédiaire de méthodes formelles. Les systèmes 
 biologiques démontrent des comportements continues mais sont aussi suscept
 ibles de montrer des changements abruptes dans  leur dynamiques. Les équat
 ions différentielles ordinaires\, ainsi que les systèmes...
DTSTART:20180507T133000
DTEND:20180507T170000
DURATION:PT3H30M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Alexandre Rocca - Méthodes formelles pour la modélisation et la val
 idation de modèles biologiques (Formal methods for modelling and validatio
 n of biological models)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3147px24kN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 17 April 2018 - Meeting room 206 (IM
 AG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
11:00 - Salle : Meeting room 206 (IMAG)

Jim Kapinski\, TEMA Toyota\, USA


«
  Verification of Learning-Enabled\, Cyber-Physical Systems   » 

Résumé :

 \n
 

Abstract:

Cyber-physical systems (CPSs) are used in many mission critical a
 pplications\, such as automobiles\, aircraft\, and medical devices\; there
 fore\, it is vital to ensure that these systems behave correctly. Designs 
 for modern CPSs often include learning-enabled (LE) components\, such as n
 eural networks and support vector machines\, whose behaviors emerge as a r
 esult of processing training data\; however\, verifying...
DTSTART:20180417T110000
DTEND:20180417T120000
DURATION:PT1H0M0S
LOCATION:Meeting room 206 (IMAG)
SUMMARY:Jim Kapinski - Verification of Learning-Enabled\, Cyber-Physical Sy
 stems  
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3147nu9Z1T@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 April 2018 - IMAG 206\n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 
 - Salle : IMAG 206\n\nMaria Méndez Real\, ATER IETR Nantes - équipe SYSCOM
 \nhttp://www-labsticc.univ-ubs.fr/~mendez/\n\n« Cache-based attacks and sp
 atial isolation countermeasure on multi and many-core architectures » \n\n
 Abstract:\n\nLogic Side-Channel Attacks (SCA) allow an attacker which has 
 no physical access to the system to perform powerful attacks against sensi
 tive operations including cryptographic implementations. Indeed\, when a v
 ictim and an attacker processes share physical resources\, the attacker is
  able to deduce sensitive information about the victim by monitoring its o
 wn...
DTSTART:20180412T140000
DTEND:20180412T150000
DURATION:PT1H0M0S
LOCATION:IMAG 206
SUMMARY:Maria Méndez Real - Cache-based attacks and spatial isolation count
 ermeasure on multi and many-core architectures
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3148ETg4Jd@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 22 March 2018 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
15:00 - Salle : 2
 06

Anastasia Volkova\, LIP\, ENS de Lyon
https://avolkova.org/

« Towards reli
 able implementation of digital filters. How digital signal processing and 
 computer arithmetic meet (candidate poste MCF) » 

Abstract:

This work focuse
 s on the improvement of numerical algorithms for the rigorous design of li
 near digital filters for signal processing. \nAssuming exact real arithmet
 ic\, the theory of these filters has been firmly established for a long ti
 me.\nHowever\, many problems arise when confronted with the practice: the 
 coefficients of the filters are represented on a small...
DTSTART:20180322T150000
DTEND:20180322T160000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Anastasia Volkova - Towards reliable implementation of digital filt
 ers. How digital signal processing and computer arithmetic meet (candidate
  poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3149nlei3a@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 22 March 2018 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
16:00 - Salle : 2
 06

Guilhem Jaber\, ENS Lyon/LIP Plume
http://guilhem.jaber.fr/

« Model-checki
 ng contextual equivalence of higher-order programs with references (candid
 at poste MCF) » 

Abstract:

This talk will present SyTeCi\, the first general
  automated tool to check contextual equivalence for programs written in an
  higher-order language with references (i.e. local mutable states)\, corre
 sponding to a fragment of OCaml.\n\nAfter introducing the notion of contex
 tual equivalence\, we will see on some examples why it is hard to prove su
 ch equivalences (reentrant calls\, private states). As we...
DTSTART:20180322T160000
DTEND:20180322T170000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Guilhem Jaber - Model-checking contextual equivalence of higher-ord
 er programs with references (candidat poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3150VVZUoM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 19 March 2018 - salle 206\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : salle 206\n\nBenjamin Farinier\, CEA_LIST-SaClay\n\n\n« Model Gen
 eration for Quantified Formulas: A Taint-Based Approach » \n\nAbstract:\n
 \nAbstract : We focus in this paper on generating models of quantified fir
 st-order formulas over built-in theories\, which is paramount in software 
 verification and bug finding. While standard methods are either geared tow
 ard proving the absence of solution or targeted to specific theories\, we 
 propose a generic approach based on a reduction to the quantifier-free cas
 e. Our technique allows thus to reuse all the efficient machinery develope
 d for that...
DTSTART:20180319T140000
DTEND:20180319T150000
DURATION:PT1H0M0S
LOCATION:salle 206
SUMMARY:Benjamin Farinier - Model Generation for Quantified Formulas: A Tai
 nt-Based Approach
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31501DSfr4@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 March 2018 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Sal
 le : 206\n\nAyoub  Nouri\, VERIMAG\nhttp://www-verimag.imag.fr/~nouri/\n\n
 « ASTROLABE: A Rigorous Approach for System-Level Performance Modeling  an
 d Analysis (candidat poste MCF) » \n\nAbstract:\n\nBuilding abstract syste
 m-level models that faithfully capture performance and functional behavior
  for embedded systems design is challenging. Unlike functional aspects\, p
 erformance details are rarely available during the early design phases\, a
 nd no clear method is known to characterize them. Moreover\, once such mod
 els are built\, they are inherently complex as they mix software models\, 
 hardware...
DTSTART:20180315T150000
DTEND:20180315T160000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Ayoub  Nouri - ASTROLABE: A Rigorous Approach for System-Level Perf
 ormance Modeling  and Analysis (candidat poste MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3151VWDpxe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 15 March 2018 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 2
 06

Lionel Rieg\, Yale University 
https://cpsc.yale.edu/people/lionel-rieg

« 
 Extending a verified OS kernel for real-time » 

Abstract:

The CertiKOS opera
 ting system is a verified OS kernel\, written in C and proven in Coq.  Lev
 eraging CompCert\, it provides end-to-end correctness proofs all the way d
 own to the generated assembly code. It is designed into many abstraction l
 ayers that isolate the various components of the OS and permit to abstract
  reasoning on the actual code into reasoning on its specification.\nMy cur
 rent work aims at extending it into a real-time kernel.  In...
DTSTART:20180315T140000
DTEND:20180315T150000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Lionel Rieg - Extending a verified OS kernel for real-time
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3152tg2svr@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  8 March 2018 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 2
 06

Ivan  Gazeau\, LORIA\, Nancy 
https://members.loria.fr/IGazeau/

« Automate
 d verification of privacy-type properties for security protocols (MCF Cand
 idate) » 

Abstract:

\n  The applied pi-calculus is a powerful framework to m
 odel protocols and to\ndefine security properties. In this symbolic model\
 , it is possible to\nverify automatically complex security properties such
  as strong secrecy\,\nanonymity and unlinkability properties which are bas
 ed on equivalence of processes.\n  In this talk\, we will see an overview 
 of a verification method used by a\ntool\, Akiss. The tool is...
DTSTART:20180308T140000
DTEND:20180308T160000
DURATION:PT2H0M0S
LOCATION:206
SUMMARY:Ivan  Gazeau - Automated verification of privacy-type properties fo
 r security protocols (MCF Candidate)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31530uLjiC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 15 February 2018 - Room 204\n= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:
 00 - Salle : Room 204\n\nGheorghe Stefanescu\, University of Bucharest\nht
 tp://fmi.unibuc.ro/ro/stefanescu_gheorghe/\n\n« Adaptive systems made by s
 elf-assembling heterogeneous components within regular 2D patterns » \n\nA
 bstract:\n\nThis talk focuses on extensions of regular ​languages/​express
 ions in 2- and 3-dimensions\, with applications to interactive programming
  and adaptive systems. We start with a new model of adaptive systems\, cal
 led ``virtual organisms''\; then we briefly present Agapia\, a structured 
 HPC programming environment ​here ​used for getting quick implementations 
 for...
DTSTART:20180215T140000
DTEND:20180215T160000
DURATION:PT2H0M0S
LOCATION:Room 204
SUMMARY:Gheorghe Stefanescu - Adaptive systems made by self-assembling hete
 rogeneous components within regular 2D patterns
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3154InlbfB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday  5 February 2018 - Auditorium (IMAG)
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:
 30 - Salle : Auditorium (IMAG)

Maxime Puys\, Verimag
https://maxime.puys.nam
 e

« Sécurité des systèmes industriels : filtrage applicatif et recherche de
  scénarios d’attaques (Cybersecurity of Industrial Systems: Applicative Fi
 ltering and Generation of Attack Scenarios) » 

Résumé :

Les systèmes industr
 iels sont depuis peu la cible d'attaques informatiques. Dû\nà leurs intera
 ctions avec le monde réel\, ils peuvent être dangereux pour\nl'environneme
 nt et les humains. Ces systèmes ont longtemps été isolés\nd'Internet et on
 t été protégés par construction...
DTSTART:20180205T103000
DTEND:20180205T123000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Maxime Puys - Sécurité des systèmes industriels : filtrage applicat
 if et recherche de scénarios d’attaques (Cybersecurity of Industrial Syste
 ms: Applicative Filtering and Generation of Attack Scenarios)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3155HvwWtp@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 18 January 2018 - ENSIMAG Amphi E 
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : ENSIMAG Amphi E 

David Monniaux\, CNRS / VERIMAG
http://www-ve
 rimag.imag.fr/~monniaux

« SPECTRE + MELTDOWN » 

Abstract:

* Cache timing atta
 cks\n* Branch predictor attacks\n* Attack on KASLR\n* MELTDOWN\n* SPECTRE


=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
Ot
 her seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.
 html?lang=en
Location/Vision: ENSIMAG Amphi E  - http://ensimag.grenoble-in
 p.fr/acces/
To unsubscribe\, reply to this mail with UNSUBSCRIBE in the sub
 ject
= = = = = = = = = = = = = = = = = = = = = = = =...
DTSTART:20180118T140000
DTEND:20180118T150000
DURATION:PT1H0M0S
LOCATION:ENSIMAG Amphi E 
SUMMARY:David Monniaux - SPECTRE + MELTDOWN
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3156a60Hen@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 15 January 2018 - Seminar Room\, gro
 und floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (B
 uilding IMAG)\n\nDogan Ulus\, Verimag / UGA\n\n\n« Filtrage par Motif Temp
 orisé: Théorie et Applications (Pattern Matching with Time: Theory and App
 lications) » \n\nRésumé :\n\nLes systèmes dynamiques présentent des compor
 tements temporels qui peuvent être exprimés sous diverses formes séquentie
 lles telles que des signaux\, des ondes\, des séries chronologiques et des
  suites d’événements. Détecter des motifs sur de tels comportements tempor
 els est une tâche fondamentale pour comprendre et évaluer ces...
DTSTART:20180115T140000
DTEND:20180115T170000
DURATION:PT3H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Dogan Ulus - Filtrage par Motif Temporisé: Théorie et Applications 
 (Pattern Matching with Time: Theory and Applications)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3157V9NxIx@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 December 2017 - 206\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - 
 Salle : 206\n\nMirco Giacobbe\, IST Austria\nhttp://pub.ist.ac.at/~mgiacob
 be/\n\n« Counterexample-guided Refinement of Template Polyhedra » \n\nAbst
 ract:\n\nTemplate polyhedra generalize intervals and octagons to polyhedra
  whose facets are orthogonal to a given set of arbitrary directions. They 
 offer a very powerful framework for the reachability analysis of hybrid au
 tomata\, as an appropriate choice of directions allows an effective tuning
  between accuracy and precision. In this talk\, I will present a method fo
 r the automatic discovery of directions that generalize and eliminate spur
 ious...
DTSTART:20171221T140000
DTEND:20171221T150000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Mirco Giacobbe - Counterexample-guided Refinement of Template Polyh
 edra
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31572PTi91@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 11 December 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nAlexandre Maréchal\, Verimag\n\n\n
 « New Algorithmics for Polyhedral Calculus via Parametric Linear Programmi
 ng » \n\nAbstract:\n\nThis thesis presents the design and implementation o
 f the Verified Polyhedra Library (VPL)\, a scalable library for polyhedral
  calculus. It provides Coq-certified polyhedral operators that work on con
 straints-only representation. The previous version was inefficient on cruc
 ial operations\, namely variable elimination and convex hull. In this work
 \, I present major improvements that have been made in scalability\, modul
 arity and...
DTSTART:20171211T140000
DTEND:20171211T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Alexandre Maréchal - New Algorithmics for Polyhedral Calculus via P
 arametric Linear Programming
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3158zzuC4O@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 11 December 2017 - Seminar Room\, gr
 ound floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor (
 Building IMAG)\n\nDenis Becker\, Verimag / STMicroelectronics\n\n\n« Simul
 ation SystemC/TLM Parallèle de Composants Matériels Décrits pour la Synthè
 se de Haut Niveau (Parallel SystemC/TLM Simulation of Hardware Components 
 Described for High-Level Synthesis) » \n\nRésumé :\n\nLes systèmes sur puc
 e sont constitués d’une partie matérielle (un circuit intégré) et d’une pa
 rtie logicielle (un programme) qui utilise les ressources matérielles de l
 a puce. La conséquence de cela est que le logiciel d’un système...
DTSTART:20171211T140000
DTEND:20171211T170000
DURATION:PT3H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Denis Becker - Simulation SystemC/TLM Parallèle de Composants Matér
 iels Décrits pour la Synthèse de Haut Niveau (Parallel SystemC/TLM Simulat
 ion of Hardware Components Described for High-Level Synthesis)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3159caJkUC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 December 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nDe Oliviera  Steven\, CEA-List/Verimag\n\n\n« Synthes
 izing Invariants by Solving Solvable Loops » \n\nAbstract:\n\nThe complexi
 ty of program verification is directly dependent of the ability of analyze
 rs to soundly handle loops. One way to overapproximate loops is to provide
  them inductive invariants\, summing up their behavior and often providing
  enough information to provers.  Unfortunately\, even in very simple loops
  like linear loops (i.e. loops composed of linear assignments only) there 
 exist no...
DTSTART:20171207T140000
DTEND:20171207T160000
DURATION:PT2H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:De Oliviera  Steven - Synthesizing Invariants by Solving Solvable L
 oops
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3160XaOp8j@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  1 December 2017 - Salle 206 IMAG
= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
15:00
  - Salle : Salle 206 IMAG

Reineke Jan\, Saarland University
http://embedded.
 cs.uni-saarland.de/reineke.php

« On the Smoothness of Paging Algorithms » 

A
 bstract:

We study the smoothness of paging algorithms. How much can the num
 ber of page faults increase due to a perturbation of the request sequence?
  We call a paging algorithm smooth if the maximal increase in page faults 
 is proportional to the number of changes in the request sequence. We also 
 introduce quantitative smoothness notions that measure the smoothness of a
 n algorithm.\nWe derive lower and upper bounds on the...
DTSTART:20171201T150000
DTEND:20171201T160000
DURATION:PT1H0M0S
LOCATION:Salle 206 IMAG
SUMMARY:Reineke Jan - On the Smoothness of Paging Algorithms
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3160tc5loA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  1 December 2017 - Amphi H\, Ensimag
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:
 00 - Salle : Amphi H\, Ensimag

Hamza RIHANI\, Univ. Grenoble Alpes / Verima
 g


« Analyse temporelle des systèmes temps-réels sur architectures pluri-cœu
 rs avec application à un processeur industriel (Many-Core Timing Analysis 
 of Real-Time Systems and its Application to an Industrial Processor) » 

Rés
 umé :

La prédictibilité est un aspect important des systèmes temps-réel cri
 tiques. Garantir la fonctionnalité de ces systèmes\npasse par la prise en 
 compte des contraintes temporelles.  Les architectures mono-cœurs traditio
 nnelles ne sont plus\nsuffisantes pour...
DTSTART:20171201T100000
DTEND:20171201T120000
DURATION:PT2H0M0S
LOCATION:Amphi H\, Ensimag
SUMMARY:Hamza RIHANI - Analyse temporelle des systèmes temps-réels sur arch
 itectures pluri-cœurs avec application à un processeur industriel (Many-Co
 re Timing Analysis of Real-Time Systems and its Application to an Industri
 al Processor)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3161wac6P3@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 November 2017 - Salle de sémin
 aire (rez-de-chaussée)\n= = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = =\n14:00 - Salle : Salle de séminaire (rez-de-chauss
 ée)\n\nJoseph Sifakis\, VERIMAG\nhttp://www-verimag.imag.fr/PEOPLE/Joseph.
 Sifakis/\n\n« How Much Hard is System Design? » \n\nAbstract:\n\nThe ICT r
 evolution is dominated by the IoT vision which promises increasingly inter
 connected smart objects providing autonomous services for the optimal mana
 gement of resources and enhanced quality of life. These include smart grid
 s\, smart transport systems\, smart health care services\, automated banki
 ng services\, smart factories\, etc. Their coordination will be achieved u
 sing a...
DTSTART:20171123T140000
DTEND:20171123T160000
DURATION:PT2H0M0S
LOCATION:Salle de séminaire (rez-de-chaussée)
SUMMARY:Joseph Sifakis - How Much Hard is System Design?
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3162jWvuaN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 20 October 2017 - Ensimag Amphi H\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 10:15 - Salle : Ensimag Amphi H\n\nFranck De Goer\, LIG/VASCO et VERIMAG/P
 ACSS\n\n\n« Rétro-ingénierie de programmes binaires en une exécution - une
  analyse dynamique légère basée au niveau des fonctions (Reverse Engineeri
 ng binary code in one execution - A lightweight function based dynamic exe
 cution.) » \n\nRésumé :\n\nDans cette thèse\, nous proposons une nouvelle 
 approche d’analyse dynamique de programmes binaires. Ce travail se place d
 ans un contexte de rétro-conception de binaires avec des motivations liées
  à la sécurité : compréhension de logiciels malveillants\,...
DTSTART:20171020T101500
DTEND:20171020T121500
DURATION:PT2H0M0S
LOCATION:Ensimag Amphi H
SUMMARY:Franck De Goer - Rétro-ingénierie de programmes binaires en une exé
 cution - une analyse dynamique légère basée au niveau des fonctions (Rever
 se Engineering binary code in one execution - A lightweight function based
  dynamic execution.)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3163Vp494S@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 October 2017 - Seminar Room 2\, 
 ground floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = =
10:30 - Salle : Seminar Room 2\, ground floor (
 Building IMAG)

   \,  


« COQ en STOCK » 

Résumé :

Cette journée est ouverte à 
 tous ceux et celles qui souhaitent en savoir plus sur l’assistant de preuv
 e COQ. Les exposés sont à destination d’un public novice en COQ et mettent
  l’accent sur les motivations pour utiliser COQ\, l’approche utilisée\, pl
 us que sur les détails techniques de la conduite des preuves. (Le premier 
 exposé de la journée commencera par une brève introduction à Coq.)\n\nL’ob
 jectif est qu’à travers 5 retours...
DTSTART:20171019T103000
DTEND:20171019T170000
DURATION:PT6H30M0S
LOCATION:Seminar Room 2\, ground floor (Building IMAG)
SUMMARY:    - COQ en STOCK
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3163xVkzZk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 10 October 2017 - Seminar Room 1\, g
 round floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =
10:30 - Salle : Seminar Room 1\, ground floor (B
 uilding IMAG)

Frits Vaandrager\, Radboud University\, Netherlands
http://www
 .cs.ru.nl/~fvaan/

« Learning Mealy Machines with Timers » 

Abstract:

(joint w
 ork with Bengt Jonsson)\n\nActive automata learning is emerging as a highl
 y effective bug finding technique\, with applications in areas such as ban
 king cards\, network protocols and legacy software. Timing often plays a c
 rucial role in these applications\, but cannot be handled adequately by ex
 isting algorithms. Even though there has been significant...
DTSTART:20171010T103000
DTEND:20171010T123000
DURATION:PT2H0M0S
LOCATION:Seminar Room 1\, ground floor (Building IMAG)
SUMMARY:Frits Vaandrager - Learning Mealy Machines with Timers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3164pGXE91@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 10 October 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nIrini Eleftheria Mens\, Verimag\, 
 Université Grenoble Alpes\n\n\n« Learning Regular Languages over Large Alp
 habets » \n\nAbstract:\n\nLearning regular languages is a branch of machin
 e learning\, which has been proved useful in many areas\, including artifi
 cial intelligence\, neural networks\, data mining\, verification\, etc. On
  the other hand\, interest in languages defined over large and infinite al
 phabets has increased in recent years. Although many theories and properti
 es generalize well from the finite case\, learning such languages is not a
 n easy task. As...
DTSTART:20171010T140000
DTEND:20171010T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Irini Eleftheria Mens - Learning Regular Languages over Large Alpha
 bets
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3165LfTHOd@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 September 2017 - 206 \n= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 
 - Salle : 206 \n\nAdrien Guatto\, Inria\nhttp://www.di.ens.fr/~guatto/\n\n
 « A Functional Language with Time Warps » \n\nAbstract:\n\nSynchronous dat
 aflow languages in the vein of Lustre combine a high-level programming mod
 el with strong safety guarantees enforced at compile time. They are built 
 on the idea of logical time: programs manipulate infinite streams of data 
 which unfold progressively as time passes. Whether a stream unfolds at any
  given time step is determined by a type-like formula\, its _clock_. Clock
 s are an essential ingredient of synchronous compilation\; for instance\, 
 they are...
DTSTART:20170928T140000
DTEND:20170928T150000
DURATION:PT1H0M0S
LOCATION:206 
SUMMARY:Adrien Guatto - A Functional Language with Time Warps
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3165ID2jfs@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 14 September 2017 - Room 106\, 1st 
 floor
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =
14:00 - Salle : Room 106\, 1st floor

Joël Goossens\, Université libre d
 e Bruxelles
http://parts.ulb.ac.be/

« Feasibility & Simulation Intervals of 
 Schedules for Recurrent Real-Time Tasks » 

Abstract:

We will consider in thi
 s talk the design of real-time embedded systems\, in particular we will fo
 cus the study on the _scheduler_ for real-time recurrent (mainly periodic)
  activities. We will introduce the notion of feasibility and simulation in
 tervals to prove the system feasibility and to have a safe time-window for
  its analysis\, respectively.\n\nWe will start the study by...
DTSTART:20170914T140000
DTEND:20170914T160000
DURATION:PT2H0M0S
LOCATION:Room 106\, 1st floor
SUMMARY:Joël Goossens - Feasibility & Simulation Intervals of Schedules for
  Recurrent Real-Time Tasks
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31669Xtn9L@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday  1 September 2017 - Auditorium (IMAG
 )\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n09:30 - Salle : Auditorium (IMAG)\n\nAnaïs Durand\, Verimag\nhttp://ww
 w-verimag.imag.fr/~adurand/\n\n« Algorithmes distribués efficaces adaptés 
 à un contexte incertain (Efficient Distributed Algorithms Suited for Uncer
 tain Context) » \n\nRésumé :\n\nLes systèmes distribués sont de plus en pl
 us grands et complexes\, alors que leur utilisation s'étend à de nombreux 
 domaines (par exemple\, les communications\, la domotique\, la surveillanc
 e\, le ``cloud''). Par conséquent\, les contextes d'exécution des systèmes
  distribués sont très divers. Dans cette thèse\, nous nous focalisons...
DTSTART:20170901T093000
DTEND:20170901T113000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Anaïs Durand - Algorithmes distribués efficaces adaptés à un contex
 te incertain (Efficient Distributed Algorithms Suited for Uncertain Contex
 t)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31677jX8Eb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 August 2017 - Seminar Room\, g
 round floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =\n10:15 - Salle : Seminar Room\, ground floor 
 (Building IMAG)\n\n \, \n\n\n« Workshop ESTATE/VERIMAG 'Distributed Algori
 thms' » \n\nAbstract:\n\nIn the context of the ANR project ESTATE\, we org
 anize a workshop on distributed algorithms.\n\n\nProgramme\n\n\nTalks ANR 
 ESTATE\n\n\n10:15-11h00 : Preuves de terminaison par variants\, Pierre Cas
 téran\n\n\n11:00-11h30 : Composition certifiée d'algorithmes autostabilisa
 nts silencieux\, Pierre Corbineau\n\n\n11:30 12:00 : Asynchronous approach
  in the plane: A deterministic polynomial algorithm\, Sébastien Bouchard\n
 \n\n12:15-13:30 Repas...
DTSTART:20170831T101500
DTEND:20170831T170000
DURATION:PT6H45M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:  - Workshop ESTATE/VERIMAG 'Distributed Algorithms'
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3168mjGEEf@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 12 July 2017 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nManuel Barragan\, TIMA\nhttp://tim
 a.imag.fr/tima/fr/timalaboratory/persopage_id1609.html\n\n« Feature select
 ion and design for machine learning-based test of analog\, mixed-signal an
 d RF circuits » \n\nAbstract:\n\nThe test of analog\, mixed-signal and RF 
 (AMS-RF) blocks embedded in a complex system has become a challenging\, co
 stly and time consuming task that has been identified as one of the main b
 ottlenecks in the production of current and future integrated systems. Mac
 hine learning-based test is a promising strategy for overcoming these issu
 es....
DTSTART:20170712T140000
DTEND:20170712T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Manuel Barragan - Feature selection and design for machine learning
 -based test of analog\, mixed-signal and RF circuits
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3169lSU44V@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 26 June 2017 - Auditorium (IMAG)\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Auditorium (IMAG)\n\nHosein Nazarpour\, Verimag\nhttp://www
 -verimag.imag.fr/~nazarpou/\n\n« Surveillance de systèmes à composants mul
 ti-threads et distribués (Monitoring Multi-Threaded and Distributed (Compo
 nent-Based) Systems) » \n\nRésumé :\n\nLa conception à base de composants 
 est le processus qui permet à partir d’exigences et un ensemble de composa
 nts prédéfinis d’aboutir à un système respectant les exigences. Les compos
 ants sont des blocs de construction encapsulant du comportement. Ils peuve
 nt être composés afin de former des composants composites. Leur...
DTSTART:20170626T140000
DTEND:20170626T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Hosein Nazarpour - Surveillance de systèmes à composants multi-thre
 ads et distribués (Monitoring Multi-Threaded and Distributed (Component-Ba
 sed) Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3170Cn1Mvp@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  8 June 2017 - Seminar Room\, groun
 d floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = =
14:00 - Salle : Seminar Room\, ground floor (Buildin
 g IMAG)

Assalé ADJE\, Université de Perpignan


« Itérations sur les politique
 s pour la vérification de systèmes dynamiques en temps discret. » 

Résumé :
 

Dans cet exposé\, nous nous intéressons à la vérification formelle de prop
 riétés numériques sur des systèmes dynamiques en temps discret par\nanalys
 e statique. Pour valider ces propriétés et garantir la sureté de la vérifi
 cation\,  nous cherchons à calculer une sur-approximation précise des\néta
 ts atteignables. Ce calcul est...
DTSTART:20170608T140000
DTEND:20170608T160000
DURATION:PT2H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Assalé ADJE - Itérations sur les politiques pour la vérification de
  systèmes dynamiques en temps discret.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3170p5ZaND@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Tuesday  6 June 2017 - Amphi E Ensimag 681\, 
 rue de la passerelle - Campus
= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =
14:00 - Salle : Amphi E Ensimag 681\, rue de l
 a passerelle - Campus

Laurent Lemke\, UGA
https://www.linkedin.com/in/lauren
 tlemke/

« Modèles partagés et infrastructure ouverte pour l’internet des ob
 jets de la ville intelligente » 

Résumé :

Les villes contemporaines font fac
 e à de nombreux enjeux : énergétiques\, écolo-\ngiques\, démographiques ou
  encore économiques. Pour y répondre\, des moyens tech-\nnologiques sont m
 is en place dans les villes via l’utilisation de capteurs et d’action-\nne
 urs. Ces villes sont dites...
DTSTART:20170606T140000
DTEND:20170606T160000
DURATION:PT2H0M0S
LOCATION:Amphi E Ensimag 681\, rue de la passerelle - Campus
SUMMARY:Laurent Lemke - Modèles partagés et infrastructure ouverte pour l’i
 nternet des objets de la ville intelligente
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31710LOGV4@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 10 May 2017 - Auditorium (IMAG)
= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
09:00
  - Salle : Auditorium (IMAG)

Yuliia Romenska\, Univ. Grenoble Alpes


« Compos
 ants abstraits pour la vérification fonctionnelle des systèmes sur puce (H
 igh-Level Component-Based Models for Functional Verification of Systems-on
 -a-Chip) » 

Résumé :

Les travaux présentés dans cette thèse portent sur la m
 odélisation\, la\nspécification et la vérification des modèles des Système
 s sur Puce\n(SoCs) au niveau d’abstraction transactionnel et à un niveau\n
 d’abstraction plus élevé. Les SoCs sont hétérogènes: ils comprennent\ndes 
 composants matériels et des...
DTSTART:20170510T090000
DTEND:20170510T110000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Yuliia Romenska - Composants abstraits pour la vérification fonctio
 nnelle des systèmes sur puce (High-Level Component-Based Models for Functi
 onal Verification of Systems-on-a-Chip)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3172a6UC8Z@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 20 April 2017 - Room 206 (Buildin
 g IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n14:00 - Salle : Room 206 (Building IMAG)\n\nVincent Penelle\, Un
 iversite de Varsovie\nhttp://igm.univ-mlv.fr/~penelle/?l=en\n\n« On the co
 ntext-freeness problem for vector addition systems. (candidat MCF) » \n\nA
 bstract:\n\nPetri nets\, or equivalently vector addition systems (VAS)\, a
 re widely recognized as a central model for concurrent systems. Many inter
 esting properties are decidable for this class\, such as boundedness\, rea
 chability\, regularity\, as well as context-freeness\, which is the focus 
 of this talk. The context-freeness problem asks whether the trace language
  of a given...
DTSTART:20170420T140000
DTEND:20170420T160000
DURATION:PT2H0M0S
LOCATION:Room 206 (Building IMAG)
SUMMARY:Vincent Penelle - On the context-freeness problem for vector additi
 on systems. (candidat MCF)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3172tlonbM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 19 April 2017 - 206
= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 
 206

Liliana Andrade\, Verimag
http://www-verimag.imag.fr/~andrade/fr/index.h
 tml

« High Level Modeling and Simulation of Heterogeneous Systems: A focus 
 on the SystemC-AMS Synchronization Problem » 

Abstract:

\nModeling and simul
 ation of multi-disciplinary systems is currently an increasingly complex p
 roblem. These systems tend to be heterogeneous in the sense that they requ
 ire the integration of components described by means of different physical
 /engineering disciplines (electrical\, thermal\, mechanical\, …). To addre
 ss this problem\, designers require tools to describe the...
DTSTART:20170419T140000
DTEND:20170419T153000
DURATION:PT1H30M0S
LOCATION:206
SUMMARY:Liliana Andrade - High Level Modeling and Simulation of Heterogeneo
 us Systems: A focus on the SystemC-AMS Synchronization Problem
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3173zgZ2VJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 11 April 2017 - 206\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n11:00 - Sall
 e : 206\n\nIulia Dragomir\, Verimag\nhttp://www-verimag.imag.fr/~dragomir/
 \n\n« Compositional Design and Analysis of Embedded Systems » \n\nAbstract
 :\n\nThe development of error-free safety critical systems is a challengin
 g task. Several key factors need to be considered: (1) what is the best me
 thod for designing large and complex systems with minimal effort and costs
 \, (2) how to guarantee that the designed system is correct with respect t
 o its requirements and (3) how to adapt any theoretical solution to the in
 dustrial practice of system design with high-level modeling languages such
  as...
DTSTART:20170411T110000
DTEND:20170411T123000
DURATION:PT1H30M0S
LOCATION:206
SUMMARY:Iulia Dragomir - Compositional Design and Analysis of Embedded Syst
 ems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3174cT3g4S@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 March 2017 - IMAG 206
= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Sall
 e : IMAG 206

Helmut Seidl\, Technische Universitaet Muenchen
http://www2.in.
 tum.de/hp/Main?nid=23

« Enforcing Termination of Interprocedural Analysis »
  

Abstract:

Interprocedural analysis by means of partial tabulation of summa
 ry\nfunctions may not terminate when the same procedure is analyzed for\ni
 nfinitely many abstract calling contexts or when the abstract domain\nhas 
 infinite strictly ascending chains.\n\nAs a remedy\, we present a novel lo
 cal solver for general abstract\nequation systems\, be they monotonic or n
 ot\, and prove that this solver\nfails to terminate only...
DTSTART:20170330T140000
DTEND:20170330T150000
DURATION:PT1H0M0S
LOCATION:IMAG 206
SUMMARY:Helmut Seidl - Enforcing Termination of Interprocedural Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3175UNO6Cs@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 March 2017 - IMAG 206
= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:00 - Sall
 e : IMAG 206

Dirk Beyer\, Ludwig-Maximilians-Universitaet Muenchen
https://w
 ww.sosy-lab.org/~dbeyer/

« Correctness Witnesses: Exchanging Verification R
 esults between Verifiers » 

Abstract:

Standard verification tools provide a 
 counterexample to witness a specification violation\,\nand\, since a few y
 ears\, such a witness can be validated by an independent validator\nusing 
 an exchangeable witness format.\nThis way\, information about the violatio
 n can be shared across verification tools\nand the user can use standard t
 ools to visualize and explore witnesses.\nThis technique is...
DTSTART:20170330T100000
DTEND:20170330T120000
DURATION:PT2H0M0S
LOCATION:IMAG 206
SUMMARY:Dirk Beyer - Correctness Witnesses: Exchanging Verification Results
  between Verifiers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31755PGdld@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 29 March 2017 - Auditorium (IMAG)
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:
 30 - Salle : Auditorium (IMAG)

Josselin FEIST\, VERIMAG / PACSS


« Finding th
 e Needle in the Heap: Combining Binary Analysis Techniques to Trigger Use-
 After-Free » 

Abstract:

Security is becoming a major concern in software dev
 elopment\, both for\nsoftware editors\, end-users\, and government agencie
 s. A typical problem is \nvulnerability detection\, which consists in find
 ing in a code bugs able to \nlet an attacker gain some unforeseen privileg
 es like reading or writing\nsensible data\, or even hijacking the program 
 execution. \n\nThis thesis proposes a practical approach to...
DTSTART:20170329T103000
DTEND:20170329T123000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Josselin FEIST - Finding the Needle in the Heap: Combining Binary A
 nalysis Techniques to Trigger Use-After-Free
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31762W8Ref@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 29 March 2017 - Auditorium (IMAG)
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : Auditorium (IMAG)

Egor Karpenkov\, VERIMAG
http://metaworld.me

«
  Finding Inductive Invariants using SMT Solving and Convex Optimization » 
 

Abstract:

Static analysis concerns itself with deriving program properties 
 which hold\nuniversally for all program executions.\nSuch properties are u
 sed for proving program properties (e.g. there never\noccurs an overflow o
 r other runtime error regardless of a particular execution) and are almost
 \ninvariably established using inductive invariants: properties which hold
 \nfor the initial state and imply themselves under the...
DTSTART:20170329T140000
DTEND:20170329T170000
DURATION:PT3H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Egor Karpenkov - Finding Inductive Invariants using SMT Solving and
  Convex Optimization
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3177ZlpVrl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 28 March 2017 - IMAG 206
= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle
  : IMAG 206

Nikolaj Bjorner\, Microsoft Research
https://www.microsoft.com/e
 n-us/research/people/nbjorner/

« Network Verification for Microsoft Azure »
  

Abstract:

Modern large-scale cloud infrastructures are inherently complex 
 to \nconfigure and deploy: Network access restrictions are enforced at \nm
 ultiple points\, forwarding and filtering policies are programmed or \ncon
 figured in various formats targeting devices that span different \nvendors
  and generations. On the other hand\, well-designed \ninfrastructures\, su
 ch as Microsoft Azure\, are based on a set of \ntransparent...
DTSTART:20170328T140000
DTEND:20170328T150000
DURATION:PT1H0M0S
LOCATION:IMAG 206
SUMMARY:Nikolaj Bjorner - Network Verification for Microsoft Azure
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31771HhVna@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 23 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
15:30 - Salle : 2
 06

Romaric Ludinard\, ENSAI
http://www.ensai.fr/enseignant/alias/romaric-lud
 inard.html

« Bitcoin\, la blockchain et le problème de la double dépense : 
 état des lieux et analyse de propositions d'améliorations (Bitcoin\, its b
 lockchain and the double spending problem : Bitcoin in a nutshell and safe
 ty analysis of recent improvement proposals) » 

Résumé :

Le système Bitcoin 
 permet les transferts monétaires entre utilisateurs\ndistants sans recours
  à un tiers de confiance. Cette possibilité est\nofferte au travers de la 
 blockchain\, une structure de donnée\ndistribuée...
DTSTART:20170323T153000
DTEND:20170323T163000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Romaric Ludinard - Bitcoin\, la blockchain et le problème de la dou
 ble dépense : état des lieux et analyse de propositions d'améliorations (B
 itcoin\, its blockchain and the double spending problem : Bitcoin in a nut
 shell and safety analysis of recent improvement proposals)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3178I082RN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 23 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 2
 06

Hugues Evrard\, Imperial College\, London
http://hevrard.org/

« Automated 
 generation of a distributed implementation from a formal model of concurre
 nt processes interacting via multiway rendezvous. » 

Abstract:

Formal verifi
 cation often targets the model of a system\, although the\nactual implemen
 tation may still be written by hand\, in which case even a\nsmall semantic
 s difference between the model and its implementation can\nruin the verifi
 cation effort. Such risky discrepancies are avoided by\nusing automatic co
 de generator from models.\n\nIn this talk\, we focus on the...
DTSTART:20170323T140000
DTEND:20170323T153000
DURATION:PT1H30M0S
LOCATION:206
SUMMARY:Hugues Evrard - Automated generation of a distributed implementatio
 n from a formal model of concurrent processes interacting via multiway ren
 dezvous.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3179dNhMsS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 16 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
15:00 - Salle : 2
 06

Manuel Selva\, Inria
https://manuelselva.github.io/

« Exécution efficace s
 ur machine multi-cœur (Efficient execution on multi-core systems) » 

Résumé
  :

Afin d'exploiter pleinement les machines multi-cœur\, trois\nproblématiq
 ues principales doivent être adressées:\n- trouver où et comment découper 
 les applications\n- équilibrer la charge de travail sur les ressources de 
 la machine\n- s'assurer que les performances sont à la hauteur des possibi
 lités du\nmatériel\n\nCet exposé sera composé de deux parties. Je présente
 rai dans un premier\ntemps mes travaux...
DTSTART:20170316T150000
DTEND:20170316T160000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Manuel Selva - Exécution efficace sur machine multi-cœur (Efficient
  execution on multi-core systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3180eBrtvU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  9 March 2017 - 206\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:30 - Sal
 le : 206\n\nLionel Rieg\, Yale university\, Flint group \nhttp://perso.ens
 -lyon.fr/lionel.rieg/\n\n« Formal Proofs of Safety in Coq: Mobile Robot Ne
 tworks and Lustre Compilation » \n\nAbstract:\n\nIn the first part\, I wil
 l look into the verified compilation of the synchronous language Lustre. T
 he objective of this work is to build a proven compiler from Lustre to C a
 nd connect it to CompCert\, a proven compiler from C to assembly\, to have
  a fully verified compilation chain toward assembly code. Although the com
 piler is straightforward to write\, the difficulties are in the proof of c
 orrectness...
DTSTART:20170309T153000
DTEND:20170309T163000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Lionel Rieg - Formal Proofs of Safety in Coq: Mobile Robot Networks
  and Lustre Compilation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3180MIWomn@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 2
 06

Arthur Milchior\, Université Paris Diderot IRIF 
https://www.irif.fr/user
 s/milchior/index

« Deterministic  Automaton and logically definable sets of
  numbers. » 

Abstract:

For a fixed base b\, any integer can be encoded as a 
 finite word of \nalphabet of digits.  In dimension d>0\, a vector of d int
 egers is encoded \nas a word of alphabet of vector of d digits. A set of v
 ector of integers \nis thus encoded as a language whose alphabet is the se
 t of vector of \ndigits. Thus\, an automaton whose alphabet is the set of 
 vector of digits \nrecognizes a set of integers. Similarly\,...
DTSTART:20170309T140000
DTEND:20170309T150000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Arthur Milchior - Deterministic  Automaton and logically definable 
 sets of numbers.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31816ARZjC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
16:45 - Salle : 2
 06

Paulin Fournier\, LABRI\, Bordeaux


« Verification of infinite probabilist
 ic systems » 

Abstract:

In a first part\, I'll give an overview of my phd th
 esis results on parameterized verification of networks composed of many id
 entical processes. In those networks the number of processes is a paramete
 r\, and the processes are modeled by finite probabilistic state machines w
 hich interact with messages.\nIn particular I'll present\, with more detai
 ls\, the decidability of the parameterized reachability problem in selecti
 ve networks\, where the messages only reach a subset of the...
DTSTART:20170302T164500
DTEND:20170302T181500
DURATION:PT1H30M0S
LOCATION:206
SUMMARY:Paulin Fournier - Verification of infinite probabilistic systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3182tZG93o@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 March 2017 - 206
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
15:30 - Salle : 2
 06

Nicolas Basset\, Université Libre de Bruxelles
https://www.irif.fr/users/
 nbasset/index

« Uniform Sampling for Timed Automata with Application to Lan
 guage Inclusion Measurement » 

Abstract:

(joint work with B. Barbot\, B. Beu
 nardeau and M. Kwiatkowska)\n\nIn this talk\, I will present Monte Carlo m
 odel checking techniques to evaluate quantitative properties of timed lang
 uages. Our approach is based on uniform random sampling of behaviours\, th
 e uniformity being defined with respect to volume measure of timed languag
 es previously studied by Asarin\, Degorre and me. We...
DTSTART:20170302T153000
DTEND:20170302T163000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Nicolas Basset - Uniform Sampling for Timed Automata with Applicati
 on to Language Inclusion Measurement
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31836urV66@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 March 2017 - Seminar Room 1\, gr
 ound floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = =
14:00 - Salle : Seminar Room 1\, ground floor (Bu
 ilding IMAG)

Loïc Correnson\, CEA - Equipe LIST
https://frama-c.com/

« « De F
 rama-C à Lustre » (« From Frama-C to Lustre ») » 

Résumé :

La plateforme Fra
 ma-C permet de prouver des propriétés fonctionnelles et des propriétés de 
 robustesse sur des fonctions C\, grâce au langage de spécifications ACSL\,
  et grâce aux plugins WP et EVA déjà bien rodés.\n\nCependant\, ACSL n'est
  pas adapté à la spécification de propriétés temporelles des programmes ré
 actifs synchrones écrits en C. Au...
DTSTART:20170302T140000
DTEND:20170302T160000
DURATION:PT2H0M0S
LOCATION:Seminar Room 1\, ground floor (Building IMAG)
SUMMARY:Loïc Correnson - « De Frama-C à Lustre » (« From Frama-C to Lustre 
 »)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3183UvUuHM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 February 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n10:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nNaor Seffi\, Technion Haifa \nhttp://www.cs.technion.
 ac.il/~naor/\n\n« Multi-label Classification with Pairwise Relations » \n
 \nAbstract:\n\nMotivated by applications in multi-label learning\, we intr
 oduce the metric multi-labeling problem. The objective here is to classify
  objects by labels while optimizing a linear cost function of both assignm
 ent costs and separation costs\, which are deduced from pairwise relations
  between objects. Each object can be classified by multiple labels\, which
  may have...
DTSTART:20170216T100000
DTEND:20170216T110000
DURATION:PT1H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Naor Seffi - Multi-label Classification with Pairwise Relations
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3184GNvFHz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 16 February 2017 - Seminar Room\, 
 ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = = = = = = =\n14:00 - Salle : Seminar Room\, ground floor
  (Building IMAG)\n\nAbhinav Srivastav\, Verimag\n\n\n« Trade-offs in Resou
 rce Allocation Problems  » \n\nAbstract:\n\nThe thesis is focused on the s
 tudy of trade-offs in resource allocation problems.  The first part of thi
 s thesis deals with the study of heuristic based approaches for the approx
 imation of Pareto fronts. We propose a new stochastic local search algorit
 hm for solving multi-objective combinatorial optimization problems. We emb
 ed our technique into a genetic framework and show that this method improv
 es upon...
DTSTART:20170216T140000
DTEND:20170216T144500
DURATION:PT0H45M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Abhinav Srivastav - Trade-offs in Resource Allocation Problems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3185gcoOwp@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 February 2017 - Seminar Room\,
  ground floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = =\n11:00 - Salle : Seminar Room\, ground floo
 r (Building IMAG)\n\nMastrolilli Monaldo\, IDSIA Lugano \nhttp://people.id
 sia.ch/~monaldo/\n\n« High Degree Sum of Squares Proofs/Hierarchy for 0/1 
 Problems » \n\nAbstract:\n\nThe Lasserre/Sum-of-Squares (SOS) hierarchy is
  a systematic procedure for constructing a sequence of increasingly tight 
 semidefinite relaxations. It is known that the hierarchy converges to the 
 0/1 polytope in n levels and captures the convex relaxations used in the b
 est available approximation algorithms for a wide variety of optimization.
 ..
DTSTART:20170216T110000
DTEND:20170216T120000
DURATION:PT1H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Mastrolilli Monaldo - High Degree Sum of Squares Proofs/Hierarchy f
 or 0/1 Problems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3185tlcsTr@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 February 2017 - Salle 206
= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - 
 Salle : Salle 206

    \,  


« Second Year PhD Students Seminars - week 2/2 » 
 

Abstract:

* 14:00-14:40 Rim El-Ballouli (Team RSD): Modeling and Analysis o
 f Systems with Dynamic Architectures\n\nIn general\, architecture is essen
 tial for mastering the complexity of computer systems and to facilitate th
 eir analysis and evolution. Architecture allows the separation between det
 ailed behavior of components and their overall coordination.  Although man
 y formalisms were already proposed to describe and reason about dynamic ar
 chitectures\, they are facing serious challenges:\n-...
DTSTART:20170209T140000
DTEND:20170209T170000
DURATION:PT3H0M0S
LOCATION:Salle 206
SUMMARY:     - Second Year PhD Students Seminars - week 2/2
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31860uO4sB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 February 2017 - Seminar Room\, g
 round floor (Building IMAG)
= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =
14:00 - Salle : Seminar Room\, ground floor (Bui
 lding IMAG)

   \,  
http:// 

« Second Year PhD Students Seminars - week 1/2 »
  

Abstract:

* 14:00-14:40 Braham Lotfi Mediouni (Team RSD): Rigorous System 
 Design and Performance Evaluation\n\nIn embedded systems\, designing funct
 ional models has become very popular thanks to the powerful verification t
 echniques that have been developed these years. But it is still very diffi
 cult to build models gathering both functional and non-functional techniqu
 es. Some techniques exist in which authors propose manual...
DTSTART:20170202T140000
DTEND:20170202T162000
DURATION:PT2H20M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:    - Second Year PhD Students Seminars - week 1/2
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3187sFDSdB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday  5 December 2016 - Auditorium (IMAG
 ) \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n17:00 - Salle : Auditorium (IMAG) \n\nPaul FEAUTRIER\, LIP\, Ecole No
 rmale Supérieure de Lyon \nhttp://perso.ens-lyon.fr/paul.feautrier \n\n« N
 ew Architectures\, New Compilation Problems » \n\nAbstract:\n\nIn the past
 \, performance improvements were due mostly to a steady increase in proces
 sors clock frequency. Nowadays\, due to physical problems realated to powe
 r dissipation\, clock frequencies are limited to about 3Ghz\, and better p
 erformance can only be found in more parallelism. Parallel architectures c
 ome in many varieties -- multicores\, vector processors and GPU\, FPGAs an
 d ASICs -- and...
DTSTART:20161205T170000
DTEND:20161205T183000
DURATION:PT1H30M0S
LOCATION:Auditorium (IMAG) 
SUMMARY:Paul FEAUTRIER - New Architectures\, New Compilation Problems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3188nfLIKz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 17 November 2016 - Salle 106
= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:30 - 
 Salle : Salle 106

Robin David\, CEA LIST


« Formal Approaches for Automatic D
 eobfuscation and Reverse-engineering of Protected Codes » 

Abstract:

This wo
 rk has been presented à BlackHat Europe 2016: https://www.blackhat.com/eu-
 16/briefings.html#code-deobfuscation-intertwining-dynamic-static-and-symbo
 lic-approaches\n\n \n\nMalware analysis is a growing research field due to
  the criticity and variety of assets\ntargeted as well as the increasing i
 mplied costs. These softwares frequently use evasion\ntricks aiming at hin
 dering detection and analysis techniques. Among these\,...
DTSTART:20161117T143000
DTEND:20161117T153000
DURATION:PT1H0M0S
LOCATION:Salle 106
SUMMARY:Robin David - Formal Approaches for Automatic Deobfuscation and Rev
 erse-engineering of Protected Codes
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3189w2RLzf@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  7 November 2016 - Auditorium (IMAG)
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Auditorium (IMAG)\n\nNajah BEN SAID\, Verimag\, Grenobl
 e Alpes University\nhttp://www-verimag.imag.fr/~bensaid/\n\n« Sécurité de 
 Flux d'Information dans les Modèles à Base de Composant: De la Vérificatio
 n à l'Implementation (Information Flow Security in Component Based Models:
  From Verification to Implementation) » \n\nRésumé :\n\nIl est reconnu que
  garantir une sécurité de bout-en-bout pour les systèmes distribués est un
  problème très complexe. En effet\, la communication bas niveau entre les 
 différentes parties du programme demande l'implémentation d'un...
DTSTART:20161107T140000
DTEND:20161107T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Najah BEN SAID - Sécurité de Flux d'Information dans les Modèles à 
 Base de Composant: De la Vérification à l'Implementation (Information Flow
  Security in Component Based Models: From Verification to Implementation)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3189dMJkNL@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  4 November 2016 - Souha Ben Rayana
= =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:0
 0 - Salle : Souha Ben Rayana

Souha Ben Rayana\, Verimag\, Grenoble Alpes Un
 iversity


« Vérification compositionnelle des systèmes temps-réels à base de
  compsants et applications. (Compositional Verification of Component-Based
  Real-time Systems and Applications.) » 

Résumé :

Dans le cadre de cette thè
 se\, on s'intéresse à  la vérification formelle des propriétés de sûreté p
 our les systèmes temps-réels à base de composants. \nLe but est de propose
 r une alternative aux techniques d’exploration où le produit de tous les c
 omposants d’un système donné est...
DTSTART:20161104T140000
DTEND:20161104T170000
DURATION:PT3H0M0S
LOCATION:Souha Ben Rayana
SUMMARY:Souha Ben Rayana - Vérification compositionnelle des systèmes temps
 -réels à base de compsants et applications. (Compositional Verification of
  Component-Based Real-time Systems and Applications.)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3190WPh4Ss@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday  2 November 2016 - ROOM 206
= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - 
 Salle : ROOM 206

Nikos Gorogiannis\, University of Middlesex
http://ngorogia
 nnis.bitbucket.org/

« Biabduction (and Related Problems) in Array Separatio
 n Logic » 

Abstract:

We investigate Array Separation Logic\, a variant of sy
 mbolic-heap separation logic in which the primary data structures are not 
 pointers or lists but arrays.  This logic can be used for proving memory s
 afety for array-manipulating imperative programs.\n\nWe focus on the biabd
 uction problem for this logic\, which has been established as the key to a
 utomatic specification inference at the industrial scale in...
DTSTART:20161102T140000
DTEND:20161102T150000
DURATION:PT1H0M0S
LOCATION:ROOM 206
SUMMARY:Nikos Gorogiannis - Biabduction (and Related Problems) in Array Sep
 aration Logic
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3191Fiz8zp@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 28 October 2016 - VERIMAG (Room 206\,
  2nd floor)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
10:00 - Salle : VERIMAG (Room 206\, 2nd floor)

J. Esparza\, A. Bo
 uajjani\,  and D. Nickovic\, TU Munich\, IRIF\, Austrian IT


« Verification:
  Theory and Practice  » 

Abstract:

      \n\n10:00 Javier Esparza\, Technica
 l University of Munich\, Germany\n\nLimit-Deterministic Automata for Proba
 bilistic Model Checking\n\nLimit-deterministic Büchi automata can replace 
 deterministic Rabin automata in probabilistic model checking algorithms\, 
 and can be significantly smaller. We present a direct construction from an
  LTL formula to a limit-deterministic Büchi automaton. Our...
DTSTART:20161028T100000
DTEND:20161028T120000
DURATION:PT2H0M0S
LOCATION:VERIMAG (Room 206\, 2nd floor)
SUMMARY:J. Esparza\, A. Bouajjani\,  and D. Nickovic - Verification: Theory
  and Practice 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31913LpnPx@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 28 October 2016 - Seminar Room\, gro
 und floor (Building IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = =\n15:00 - Salle : Seminar Room\, ground floor (B
 uilding IMAG)\n\nThomas FERRERE\, Verimag\nhttp://www-verimag.imag.fr/~fer
 rere/\n\n« Assertion and Measurements for Mixed-Signal Simulation » \n\nAb
 stract:\n\nThis thesis is concerned with the monitoring of mixed-signal ci
 rcuit simulations. In the field of hardware verification\, the use of decl
 arative property languages in combination with simulation is now standard 
 practice. However the lack of features to specify asynchronous behaviors\,
  or the insufficient integration of verification results\, makes existing 
 assertion...
DTSTART:20161028T150000
DTEND:20161028T170000
DURATION:PT2H0M0S
LOCATION:Seminar Room\, ground floor (Building IMAG)
SUMMARY:Thomas FERRERE - Assertion and Measurements for Mixed-Signal Simula
 tion
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31929MC1jv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 27 October 2016 - Auditorium (IMAG)
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : Auditorium (IMAG)

Joseph Sifakis\, VERIMAG
http://www-verimag
 .imag.fr/~sifakis/

« Modeling architectures and their properties in BIP » 

A
 bstract:

Architectures are mechanisms for ensuring global properties charac
 terizing the coordination between components. Using architectures largely 
 accounts for our ability to master complexity and develop systems cost-eff
 ectively.\n\nIn BIP\, architectures are generic behavior transformers repr
 esented as sets of connectors. They take as arguments typed components and
  give a composite component. We propose two different ways...
DTSTART:20161027T140000
DTEND:20161027T160000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Joseph Sifakis - Modeling architectures and their properties in BIP
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3193CzbfnJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 13 October 2016 - 206
= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
16:15 - Salle :
  206

Ismail Oukid\, SAP
https://wwwdb.inf.tu-dresden.de/team/external-member
 s/ismail-oukid/

« Storage Class Memory (aka NVRAM): Challenges and Opportun
 ities » 

Abstract:

Storage Class Memory (SCM)\, also known as byte-addressab
 le\nnon-volatile memory\, or NVRAM\, is a new class of memory technologies
 \nthat have the potential to revolutionize the architecture of\npersistent
  software. Indeed\, SCM combines the low latency and high\nbandwidth of DR
 AM with the density\, non-volatility\, and economic\ncharacteristic of tra
 ditional storage media (SSDs\, HDDs). While SCM\ncan be used as...
DTSTART:20161013T161500
DTEND:20161013T171500
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Ismail Oukid - Storage Class Memory (aka NVRAM): Challenges and Opp
 ortunities
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3194vhkHuW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 12 October 2016 - Auditorium (IMA
 G)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : Auditorium (IMAG)\n\nLouis Dureuil\, Vérimag-CEA\n\n
 \n« Analyse de code et processus d’évaluation des composants sécurisés con
 tre l’injection de faute » \n\nRésumé :\n\nLasers\, impulsions électriques
  et électromagnétiques\, confèrent à un attaquant le pouvoir mystérieux de
  perturber la logique de fonctionnement des appareils informatiques. Cette
  étonnante capacité peut s’avérer particulièrement néfaste pour les compos
 ants sécurisés\, tels que les cartes à puce. Face à cette menace\, la sécu
 rité de ces composants est évaluée par des laboratoires...
DTSTART:20161012T100000
DTEND:20161012T120000
DURATION:PT2H0M0S
LOCATION:Auditorium (IMAG)
SUMMARY:Louis Dureuil - Analyse de code et processus d’évaluation des compo
 sants sécurisés contre l’injection de faute
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-31956e5zSB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 October 2016 - Room 206 (build
 ing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n15:30 - Salle : Room 206 (building IMAG)\n\nCristina SERBAN\, 
 VERIMAG\n\n\n« A Decision Procedure for Separation Logic in SMT » \n\nAbst
 ract:\n\nWe present a complete decision procedure for the entire quantifie
 r-free fragment of Separation Logic (SL) interpreted over heaplets with da
 ta elements ranging over a parametric multi-sorted (possibly infinite) dom
 ain. The algorithm uses a combination of theories and is used as a special
 ized solver inside a DPLL(T) architecture. A prototype was implemented wit
 hin the CVC4 SMT solver. Preliminary evaluation suggests the possibility o
 f using...
DTSTART:20161006T153000
DTEND:20161006T163000
DURATION:PT1H0M0S
LOCATION:Room 206 (building IMAG)
SUMMARY:Cristina SERBAN - A Decision Procedure for Separation Logic in SMT
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3195936onb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n11:30 - Salle : Auditorium (Builbing IMAG)\n\nParosh Abdul
 la\, Uppsala University\nhttp://user.it.uu.se/~parosh/\n\n« Automatic Veri
 fication of Linearization Policies » \n\nAbstract:\n\nWe consider the prob
 lem of proving linearizability for concurrent threads that access a shared
  data structure. Such systems give rise to unbounded numbers of threads th
 at operate on an bounded data domain and that access dynamically allocated
  memory. Furthermore\, proving linearizability is harder than proving cont
 rol state reachability due to existentially quantified linearization point
 s. The...
DTSTART:20160929T113000
DTEND:20160929T123000
DURATION:PT1H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Parosh Abdulla - Automatic Verification of Linearization Policies
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3196uuKfbR@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n10:30 - Salle : Auditorium (Builbing IMAG)\n\nJoel Ouaknin
 e\, Max Planck Institute and Oxford University\nhttp://nts.imag.fr/index.p
 hp/Infinite_Systems_Verification_Day\n\n« Decision Problems for Linear Dyn
 amical Systems » \n\nAbstract:\n\nDynamical systems\, both discrete and co
 ntinuous\, permeate vast areas of mathematics\, physics\, engineering\, an
 d computer science. In this talk\, we consider a selection of natural deci
 sion problems for linear dynamical systems\, such as reachability of a giv
 en hyperplane. Such problems have applications in a wide array of scientif
 ic areas\,...
DTSTART:20160929T103000
DTEND:20160929T113000
DURATION:PT1H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Joel Ouaknine - Decision Problems for Linear Dynamical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3197l5UOsI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 September 2016 - Auditorium (B
 uilbing IMAG)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = =\n09:30 - Salle : Auditorium (Builbing IMAG)\n\nAndreas Pode
 lski\, University of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff
 /podelski\n\n« Thread Modularity on the Next Level » \n\nAbstract:\n\nA th
 read-modular proof for the correctness of a concurrent program is based on
  an inductive and interference-free annotation of each thread. It is well-
 known that the corresponding proof system is not complete (unless one adds
  auxiliary variables). We introduce a hierarchy of proof systems where eac
 h level k corresponds to a new notion of thread modular- ity (level 1 corr
 esponds...
DTSTART:20160929T093000
DTEND:20160929T103000
DURATION:PT1H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Andreas Podelski - Thread Modularity on the Next Level
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3197JfUMvC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - HDR - Thursday 29 September 2016 - Auditorium (Builbin
 g IMAG)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =
14:00 - Salle : Auditorium (Builbing IMAG)

Radu Iosif\, VERIMAG
http:/
 /nts.imag.fr/index.php/Radu_Iosif

« Automata and Logics for Program Verific
 ation » 

Abstract:

In this thesis\, we present several theoretical and pract
 ical results on program verification\, the main purpose being that of prov
 iding cost-efficient solutions to problems that almost always belong to un
 decidable classes. We appeal to logic and automata theory as they provide 
 essentially the mechanisms to problem solving that are needed for program 
 verification. In this respect\, we investigate:\n\n* logics...
DTSTART:20160929T140000
DTEND:20160929T170000
DURATION:PT3H0M0S
LOCATION:Auditorium (Builbing IMAG)
SUMMARY:Radu Iosif - Automata and Logics for Program Verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3198DFTMgX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday  5 July 2016 - IMAG building\, Room 
 206
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
10:00 - Salle : IMAG building\, Room 206

Jyo Deshmukh\, TEMA Toyota\, Los
  Angeles


« Recent progress on formal methods for CPS » 

Abstract:

Cars are cy
 berphysical systems: physical phenomenon are regulated using embedded cont
 rol software.  We discuss some of the challenges designing such systems\, 
 and posit that some key technologies to meet these can be found in a diver
 se set of fields: temporal logic\, optimization and machine learning. We d
 iscuss some of our recent progress and ongoing work in this area.\n


= = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =...
DTSTART:20160705T100000
DTEND:20160705T120000
DURATION:PT2H0M0S
LOCATION:IMAG building\, Room 206
SUMMARY:Jyo Deshmukh - Recent progress on formal methods for CPS
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3199m6zxUn@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday  5 July 2016 - Auditorium IMAG
= = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 -
  Salle : Auditorium IMAG

Rahul Mangaram\, University of Pennsylvania
https:/
 /www.seas.upenn.edu/~rahulm/

« Challenges with Medical Cyber-Physical Syste
 ms » 

Abstract:

This talk will focus on two challenge problems with achievin
 g high confidence in medical device software and systems:\n\n1. From Verif
 ied Models to Verified Code for Implantable Medical Devices\nThe design of
  bug-free and safe software is challenging\, especially in complex implant
 able devices that control and actuate organs whose response is not fully u
 nderstood. Currently\, over 15% of all medical device...
DTSTART:20160705T140000
DTEND:20160705T160000
DURATION:PT2H0M0S
LOCATION:Auditorium IMAG
SUMMARY:Rahul Mangaram - Challenges with Medical Cyber-Physical Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3200DT5Tul@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 June 2016 - 206
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 20
 6

Sergiy Bogomolov\, IST Austria
http://www.sergiybogomolov.com/

« Scalable S
 tatic Hybridization Methods for Analysis of Nonlinear Systems » 

Abstract:

H
 ybridization methods enable the analysis of hybrid automata with\ncomplex\
 , nonlinear dynamics through a sound abstraction process.\nComplex dynamic
 s are converted to simpler ones with added noise\, and\nthen analysis is d
 one using a reachability method for the simpler\ndynamics. Several such re
 cent approaches advocate that only “dynamic”\nhybridization techniques—i.e
 .\, those where the dynamics are...
DTSTART:20160630T140000
DTEND:20160630T150000
DURATION:PT1H0M0S
LOCATION:206
SUMMARY:Sergiy Bogomolov - Scalable Static Hybridization Methods for Analys
 is of Nonlinear Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3200NVkiG2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 22 June 2016 - New IMAG building A
 uditorium
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
14:00 - Salle : New IMAG building Auditorium

Heiko FALK\, Hamburg U
 niversity of Technology (TUHH) 
http://www.tuhh.de/es/esd/people/hfalk/pgp

«
  WCET-Aware Compilation and Optimization for Real-Time Systems  » 

Abstract
 :

During the design of embedded software\, compilers play an important\nrol
 e\, since the machine code generated by them directly influences\ncriteria
  like\, e.g.\, execution times. Particularly\, compiler\noptimizations cou
 ld be beneficial to reduce such criteria\nsystematically. In the domain of
  real-time systems\, the average-case\nexecution time (ACET)...
DTSTART:20160622T140000
DTEND:20160622T160000
DURATION:PT2H0M0S
LOCATION:New IMAG building Auditorium
SUMMARY:Heiko FALK - WCET-Aware Compilation and Optimization for Real-Time 
 Systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3201wMG2fk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 16 June 2016 - Auditorium du Bât I
 MAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Auditorium du Bât IMAG\n\nJan Lanik\, VERIMAG\n\n\n«
  Power reduction in sequential circuits  » \n\nAbstract:\n\nThe topic of t
 his thesis are methods for power reduction in digital circuits by reducing
  average switching on the transistor level. These methods are structural i
 n the sense that they are not related to tuning physical properties of the
  circuitry but to the internal structure of the implemented logic and ther
 efore independent on the particular technology. We developed two novel met
 hods. One is based on optimizing the structure of the combinatorial part o
 f a...
DTSTART:20160616T140000
DTEND:20160616T160000
DURATION:PT2H0M0S
LOCATION:Auditorium du Bât IMAG
SUMMARY:Jan Lanik - Power reduction in sequential circuits 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3202b5GWVE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday 26 May 2016 - amphithéâtre\, bâtiment
  IMAG de l'Univ. G\n= = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = = =\n17:00 - Salle : amphithéâtre\, bâtiment IMAG de l'Uni
 v. G\n\nFrehse Goran\, VERIMAG\nhttps://sites.google.com/site/frehseg/\n\n
 «  Scalable Verification of Hybrid Systems » \n\nAbstract:\n\nIn model-bas
 ed design\, a mathematical model of the system behavior is used to check w
 hether it achieves the desired performance (e.g.\, rise or settling time) 
 while satisfying critical 'safety' constraints (e.g.\, saturation\, overfl
 ow). This check can be difficult\, in particular when the system is hybrid
 \, i.e.\, has continuous dynamics (physics) as well as event-based dynamic
 s (mode...
DTSTART:20160526T170000
DTEND:20160526T190000
DURATION:PT2H0M0S
LOCATION:amphithéâtre\, bâtiment IMAG de l'Univ. G
SUMMARY:Frehse Goran -  Scalable Verification of Hybrid Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3203dIX9ej@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 May 2016 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nBruno Grenet\, LIRMM\, Universit
 é de Montpellier\nhttp://www.lirmm.fr/~grenet/\n\n« Factorisation de polyn
 ômes lacunaires » \n\nRésumé :\n\nLa représentation lacunaire est la repré
 sentation naturelle d\'un polynôme par la liste de ses monômes non nuls (c
 \'est essentiellement celle utilisée par le mathématicien sur sa feuille d
 e papier). Elle est de taille logarithmique en le degré du polynôme\, et d
 onc compacte pour les polynômes de grand degré ayant peu de monômes non nu
 ls. L\'algorithmique des polynômes en représentation lacunaire est...
DTSTART:20160512T140000
DTEND:20160512T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Bruno Grenet - Factorisation de polynômes lacunaires
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3203OCo8zl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 April 2016 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nCamille Coti\, Université Pari
 s XIII / LIPN\nhttp://www-lipn.univ-paris13.fr/~coti/\n\n« Parallel\, dist
 ributed behavioral cartography of parametric timed automata » \n\nAbstract
 :\n\nParametric timed automata (PTA) allow the specification and verificat
 ion of timed systems incompletely specified\, or subject to future changes
 . The behavioral cartography splits the parameter space of PTA in tiles in
  which the discrete behavior is uniform. Applications include the optimiza
 tion of timing constants\, and the measure of the system robustness w.r.t.
  the...
DTSTART:20160428T140000
DTEND:20160428T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Camille Coti - Parallel\, distributed behavioral cartography of par
 ametric timed automata
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3204Adis9G@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 March 2016 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle A. Turing CE4

Amaury Pouly\, Oxford University\, Dept.
  of Computer Science


« Solvability of Matrix-Exponential Equations » 

Abstra
 ct:

We consider a continuous analogue of Babai\, Lipton et al's problem of 
 solving multiplicative matrix equations. Given k+1 square matrices A_1\,..
 .\, A_k\, C\, all of the same dimension\, whose entries are real algebraic
 \, we examine the problem of deciding whether there exist non-negative rea
 ls t_1\, ...\, t_k such that\n\nexp(A_1 t_1)exp(A_2 t_2)...exp(A_n t_n) = 
 C.\n\nWe show that this problem is undecidable in general\, but...
DTSTART:20160324T140000
DTEND:20160324T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Amaury Pouly - Solvability of Matrix-Exponential Equations
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3205vVap7I@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kuntzm
 ann (MJK)	   
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =
09:00 - Salle : Maison Jean Kuntzmann (MJK)	   

Alan Burns\, Univ
 ersity	 of York
https://www-users.cs.york.ac.uk/~burns/

« Mixed Criticality -
  A Personal View » 

Abstract:

In this talk I will discuss the notion of a mi
 xed criticality system (MCS)\, give a brief outline of the available MCS l
 iterature\, motivate an alternative MCS model and discuss the open issues 
 surrounding the MCS research. 

About the speaker:\n\nProf. Alan Burns\, Uni
 versity of York\nhttps://www-users.cs.york.ac.uk/~burns/\n\nProfessor Alan
  Burns is a member of the Department of Computer...
DTSTART:20160309T090000
DTEND:20160309T100000
DURATION:PT1H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)	   
SUMMARY:Alan Burns - Mixed Criticality - A Personal View
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3205HGAkjh@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kunt
 zmann (MJK)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = =\n10:00 - Salle : Maison Jean Kuntzmann (MJK)\n\nSanjoy Baruah
 \, University of North Carolina at Chapel Hill.\nhttp://cs.unc.edu/people/
 sanjoy-k-baruah/\n\n« Mixed-criticality Scheduling on Multiprocessors » \n
 \nAbstract:\n\nThe real-time scheduling community has devoted considerable
  effort at better understanding how to schedule mixed-criticality workload
 s upon uniprocessor platforms\; in contrast\, the issue of multiprocessor 
 mixed-criticality scheduling is relatively under-explored. I will describe
  some recent work in this direction\, presenting some preliminary results 
 and an...
DTSTART:20160309T100000
DTEND:20160309T110000
DURATION:PT1H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Sanjoy Baruah - Mixed-criticality Scheduling on Multiprocessors
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3206iDZSeM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday  9 March 2016 - Maison Jean Kuntzm
 ann (MJK)
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
11:00 - Salle : Maison Jean Kuntzmann (MJK)

Luca Santinelli\, ONERA
  (French Aerospace Lab)
http://www.onera.fr/staff/luca-santinelli

« Mixed-Cr
 iticalities and Probabilities » 

Abstract:

In this talk I will discuss possi
 ble point of contacts between the mixed-criticality problem (modeling and 
 analysis) and the probabilistic real-time (timing analysis and schedulabil
 ity).\nI will propose 3 main parts where probabilities could help enhancin
 g both the mixed-critical modeling and the mixed-critical scheduling.\n

Abo
 ut the speaker:\n\nLuca Santinelli\, ONERA (French...
DTSTART:20160309T110000
DTEND:20160309T120000
DURATION:PT1H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Luca Santinelli - Mixed-Criticalities and Probabilities
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3207hDu2c4@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  9 March 2016 - Maison Jean Kuntz
 mann (MJK)\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Maison Jean Kuntzmann (MJK)\n\nDario Socci\, 
 Verimag\n\n\n« Scheduling of Certifiable  Mixed-Criticality Systems » \n\n
 Abstract:\n\nModern real-time systems tend to be mixed-critical\, in the s
 ense that they integrate on the same computational platform applications a
 t different levels of criticality (e.g.\, safety critical and mission crit
 ical). Integration gives the advantages of reduced cost\, weight and power
  consumption\, which can be crucial for modern applications like Unmanned 
 Aerial Vehicles (UAVs). On the other hand\, this leads to major complicati
 ons in...
DTSTART:20160309T140000
DTEND:20160309T160000
DURATION:PT2H0M0S
LOCATION:Maison Jean Kuntzmann (MJK)
SUMMARY:Dario Socci - Scheduling of Certifiable  Mixed-Criticality Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3208XEBihe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday  2 March 2016 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nAlexey Bakhirkin\, University
  of Leicester\nhttp://www.cs.le.ac.uk/people/ab643/\n\n«  Towards finding 
 non-terminating behaviours in programs  » \n\nAbstract:\n\nWe present our 
 take on a problem of finding a recurrent set of an imperative program. A r
 ecurrent set is a set of states that\, once reached\, cannot or may not be
  escaped by an execution (there exist multiple definitions). A straightfor
 ward application of a recurrent set is to show the existence of non-termin
 ating executions in the program\, for that it needs to be complemented by 
 a proof of...
DTSTART:20160302T140000
DTEND:20160302T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexey Bakhirkin -  Towards finding non-terminating behaviours in p
 rograms 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3208GUTuVZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  1 March 2016 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nArnaud Sangnier\, LIAFA PARIS 7
 \n\n\n« On the Complexity of Verifying Regular Properties on Flat Counter 
 Systems » \n\nAbstract:\n\nAmong the approximation methods for the verific
 ation of counter systems\, one of them consists in model-checking their fl
 at unfoldings. That is why\, optimal algorithms for model-checking flat co
 unter systems are being designed since this may represent the core of a ve
 rification process. Unfortunately\, the complexity characterization of mod
 el-checking problems for such operational models is not always well studie
 d except...
DTSTART:20160301T140000
DTEND:20160301T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Arnaud Sangnier - On the Complexity of Verifying Regular Properties
  on Flat Counter Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32170Gw7C5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  4 February 2016 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

   \, Verimag


« PhD Seminars » 

Abstrac
 t:

PhD students present their work.\n\n- <b>14:00 Dellabani Mahieddine: Imp
 lementation of Distributed Real-Time applications.</b>\n\nAbstract: The de
 sign and implementation of distributed real-time systems is acknowledged t
 o be a very difficult task. A central question being how to efficiently co
 ordinate parallel activities by means of point-to-point communication so a
 s to keep global consistency while meeting timing constraints. Considering
  real-time constraints brings additional complexity since...
DTSTART:20160204T140000
DTEND:20160204T170000
DURATION:PT3H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - PhD Seminars
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3217MnahUF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday 29 January 2016 - CTL
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:00 - Salle : CT
 L

Mathilde Duclos\, Université Grenoble-Alpes


« Méthodes pour la vérificatio
 n des protocoles cryptographiques dans le modèle calculatoire (Methods for
  cryptographic protocol verification in the computational model ) » 

Résumé
  :

Les preuves de sécurité pour les systèmes cryptographiques peuvent être 
 effectuées dans\ndifférents modèles qui correspondent chacun à des hypothè
 ses de sécurité différentes. Dans\nle modèle symbolique\, on considère qu’
 un attaquant ne peut deviner aucun secret et qu’il\na seulement la possibi
 lité d’appliquer un ensemble...
DTSTART:20160129T100000
DTEND:20160129T120000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Mathilde Duclos - Méthodes pour la vérification des protocoles cryp
 tographiques dans le modèle calculatoire (Methods for cryptographic protoc
 ol verification in the computational model )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3218XRZjd7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 28 January 2016 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:00 - Salle : salle A. Turing CE4

   \, Verimag


« PhD Seminars  » 

Abstrac
 t:

PhD students present their work. \n\n- <b> 14:00 Maxime Puys: Cybersecur
 ity in industrial systems\, from packet filtering to formal methods</b>\n
 \nAbstract : \nRecently medias are showing an increasing number of attacks
  against in-\ndustrial systems. Such attacks become feasible because these
  systems\nare recently spreading geographically and communicating more and
  more\nthrough unsafe mediums like Internet. As industrial systems histori
 cally\nhave been isolated from the rest of the world\, there...
DTSTART:20160128T140000
DTEND:20160128T170000
DURATION:PT3H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - PhD Seminars 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3219BjoJLT@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  7 January 2016 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:00 - Salle : salle A. Turing CE4

   \, Verimag 


« Phd Seminars  » 

Abstra
 ct:

PhD students present their work. \n\n- <b>14:00  Hamza Rihani: WCET Ana
 lysis in Shared Resources Real-Time Systems</b>\n\nAbstract: \nPredictabil
 ity is an important aspect in real-time and safety-critical systems\, wher
 e non-functional properties -- such as the timing behavior -- have high im
 pact on the system correctness. As many safety-critical systems have a gro
 wing performance demand\, old and simple architectures are not sufficient 
 anymore. Multi-core systems offer higher processing speed...
DTSTART:20160107T140000
DTEND:20160107T170000
DURATION:PT3H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:    - Phd Seminars 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3220U03usa@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 10 December 2015 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - S
 alle : CTL\n\nAlexios Lekidis\, Verimag/DCS\nhttp://www-verimag.imag.fr/~l
 ekidis/\n\n« Design flow for the rigorous development of networked embedde
 d systems » \n\nRésumé :\n\nLes systèmes embarqués en réseau sont devenus 
 une avancée technologique majeure au cours des dernières années. Telle qu’
 ils sont utilisés dans une grande diversité d'applications\, le principal 
 défi pose est de développer des applications fonctionnelles\, en assurant 
 leurs défis de conception. Ces défis concernent l'utilisation des leurs re
 ssources matérielles limitées (p.ex. la mémoire du processeur\,...
DTSTART:20151210T133000
DTEND:20151210T153000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Alexios Lekidis - Design flow for the rigorous development of netwo
 rked embedded systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3221D80UUu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday 10 December 2015 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
10:00 - Salle : salle A. Turing CE4

PEKTAŞ Abdurrahman\, TUBITAK


« Behavior
  based malware classification using online machine learning » 

Résumé :

Les 
 malwares\, autrement dit programmes malicieux ont grandement évolué ces\nd
 erniers temps et sont devenus une menace majeure pour les utilisateurs\ngr
 and public\, les entreprises et même le gouvernement. Malgré la présence e
 t\nl'utilisation intensive de divers outils anti-malwares comme les anti-v
 irus\,\nsystèmes de détection d'intrusions\, pare-feux etc \; les concepte
 urs de\nmalwares peuvent significativement...
DTSTART:20151210T100000
DTEND:20151210T120000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:PEKTAŞ Abdurrahman - Behavior based malware classification using on
 line machine learning
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3221gJ502e@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 16 October 2015 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
0
 9:30 - Salle : salle A. Turing CE4

Enea Zaffanella\, Università degli Studi
  di Parma


« A Few Notes on the Implementation of Convex Polyhedra Using the
  Double Description Framework » 

Abstract:

The first part of the seminar pre
 sents an algorithm for the removal of\nconstraints (resp.\, generators) fr
 om a convex polyhedron represented\nin the Double Description framework. I
 nstead of recomputing the dual\nrepresentation from scratch\, the algorith
 m tries to better exploit the\ninformation available in the DD pair\, so a
 s to capitalize on the\ncomputational work already done. A...
DTSTART:20151016T093000
DTEND:20151016T103000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Enea Zaffanella - A Few Notes on the Implementation of Convex Polyh
 edra Using the Double Description Framework
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3222vAGBJP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 15 October 2015 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
10:00 - Salle : salle A. Turing CE4

Andy King\, University of Kent


« The Yi
 ng and the Yang of Binary Reversing » 

Abstract:

I will explain how the prob
 lem of recovering types (the ying) in binary\nreversing\, has a yang\, whi
 ch is a high-level witness that defines the\ntypes.  Quite apart from prov
 iding a principled approach to type\nrecovery\, the formulation gives a ty
 pe-based decompiler for free.


= = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = =
Other seminars at VERIMAG -...
DTSTART:20151015T100000
DTEND:20151015T110000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andy King - The Ying and the Yang of Binary Reversing
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3223vK8rNL@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday 15 October 2015 - CTL
= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 
 CTL

Alexis Fouilhe\, Verimag


« Revisiting the abstract domain of polyhedra: 
 constraints-only representation and formal proof » 

Abstract:

The work repor
 ted in this thesis revisits in two ways the abstract domain of\npolyhedra 
 used for static analysis of programs. First\, strong guarantees are\nprovi
 ded on the soundness of the operations on polyhedra\, by using of the Coq
 \nproof assistant to check the soundness proofs. The means used to ensure 
 cor-\nrectness don’t hinder the performance of the resulting Verimag Polyh
 edra\nLibrary (VPL). It is built on the principle of...
DTSTART:20151015T140000
DTEND:20151015T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Alexis Fouilhe - Revisiting the abstract domain of polyhedra: const
 raints-only representation and formal proof
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3224KhBE1I@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 14 October 2015 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

Chantal Keller\, Université Paris Sud
 

« F*: Higher-Order Effectful Program Verification » 

Abstract:

F* is an ML-l
 ike language designed for program verification. It is based\non refinement
  types\, a powerful extension of ML types to express\nproperties about pro
 grams. These properties are automatically checked\nvia the generation of v
 erification conditions that are finally\ndischarged by SMT solvers. F* pro
 vides a uniform framework to deal both\nwith programs with effects and non
 -termination\, for which one might want\nto establish some...
DTSTART:20151014T140000
DTEND:20151014T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chantal Keller - F*: Higher-Order Effectful Program Verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3224lfWtOn@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 September 2015 - Amphiteatre Mais
 on Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = =\n10:00 - Salle : Amphiteatre Maison Jean Kuntzmann\n\nA
 li Kassem\, Verimag\nhttp://www-verimag.imag.fr/~kassem/\n\n« Vérification
  automatique de protocoles d'examen\, de monnaie\, de réputation\, et de r
 outage (Automated Verification of Exam\, Cash\, Reputation\, and Routing P
 rotocols) » \n\nRésumé :\n\nLa sécurité est une exigence cruciale dans les
  applications basées sur l'information et la technologie de communication\
 , surtout quand un réseau ouvert tel que l'Internet est utilisé. Pour assu
 rer la sécurité dans ces applications de nombreux protocoles cryptographiq
 ues...
DTSTART:20150918T100000
DTEND:20150918T120000
DURATION:PT2H0M0S
LOCATION:Amphiteatre Maison Jean Kuntzmann
SUMMARY:Ali Kassem - Vérification automatique de protocoles d'examen\, de m
 onnaie\, de réputation\, et de routage (Automated Verification of Exam\, C
 ash\, Reputation\, and Routing Protocols)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3225HukKuf@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 10 September 2015 - salle A. Turing
  CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : salle A. Turing CE4

 Julien Signoles Nikolai Kosmatov\, 
 CEA6LIST


« Combinations of Static and Dynamic Analyses in Frama-C: An Overv
 iew (Combinations of Static and Dynamic Analyses in Frama-C: An Overview) 
 » 

Abstract:

Initially considered as orthogonal research fields\, static and
  dynamic\nanalysis techniques have been for a long time used separately to
  improve\nthe quality of software.  However\, the development of both appr
 oaches\nhas lead to the discovery of common issues and to the realization 
 of\npotential synergies. The present talk gives an overview...
DTSTART:20150910T140000
DTEND:20150910T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY: Julien Signoles Nikolai Kosmatov - Combinations of Static and Dyna
 mic Analyses in Frama-C: An Overview (Combinations of Static and Dynamic A
 nalyses in Frama-C: An Overview)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3226d1g5av@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  3 September 2015 - salle A. Turing
  CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : salle A. Turing CE4

Amaury Pouly\, LIX (Polytechnique)
ht
 tp://www.lix.polytechnique.fr/~pamaury/me/fr/

« On the complexity of some c
 ontinuous space reachability problems » 

Abstract:

In this talk\, I will pre
 sent some results about the two reachability problems of some continuous s
 pace. The first problem is that of\nregion to region reachability for piec
 ewise affine functions. We show that\, starting from dimension 2\, the bou
 nded time version\nis NP-complete\, even if the function is assumed to be 
 continuous. The second problem is is related to  polynomial...
DTSTART:20150903T140000
DTEND:20150903T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Amaury Pouly - On the complexity of some continuous space reachabil
 ity problems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3227hXWiKB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  2 July 2015 - Amphi E ENSIMAG\n=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n
 14:00 - Salle : Amphi E ENSIMAG\n\nChristos H. Papadimitriou\, UC Berkeley
 \nhttp://www.cs.berkeley.edu/~christos/\n\n« Life under the Lens » \n\nAbs
 tract:\n\nApplying the algorithmic point of view to the natural\, life\, a
 nd social sciences often results in unexpected insights and progress in ce
 ntral problems\, a mode of research that has been described as ``the lens 
 of computation.''  I will focus on examples in the life sciences\, from jo
 int work with Erick Chastain\, Costis Daskalakis\, Adi Livnat\, Umesh Vazi
 rani\, Santosh Vempala\, and Albert Wu:  Evolution of a population through
  sexual...
DTSTART:20150702T140000
DTEND:20150702T160000
DURATION:PT2H0M0S
LOCATION:Amphi E ENSIMAG
SUMMARY:Christos H. Papadimitriou - Life under the Lens
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3227KSMgKS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 25 June 2015 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Pablo Buiras\, Chalmers University of Tec
 hnology (Sweden)
http://www.cse.chalmers.se/~buiras/

«  Mixing Static and Dy
 namic Typing for Information-Flow  Control in Haskell » 

Abstract:

Informati
 on-Flow Control (IFC) is a well-established approach for allowing untruste
 d code to manipulate sensitive data without disclosing it.\n\nIFC is typic
 ally enforced via type systems and static analyses or via dynamic executio
 n monitors. The LIO Haskell library\, originating in operating systems res
 earch\, implements a purely dynamic monitor of the...
DTSTART:20150625T140000
DTEND:20150625T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pablo Buiras -  Mixing Static and Dynamic Typing for Information-Fl
 ow  Control in Haskell
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32284Fk2g9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 11 June 2015 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nChris Myers\, University of Uta
 h\n\n\n« LEMA: A Tool for the Formal Verification of Digitally-Intensive A
 nalog/Mixed-Signal Circuits  » \n\nAbstract:\n\nThe increasing integration
  of analog/mixed-signal (AMS) circuits into system designs has further com
 plicated an already difficult verification problem. Recently\, formal veri
 fication\, which has been successful in the purely digital domain\, has ma
 de some in-roads in the AMS domain. This talk describes one such formal ve
 rification tool for AMS circuits\, LEMA. In particular\, LEMA is capable o
 f generating...
DTSTART:20150611T140000
DTEND:20150611T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chris Myers - LEMA: A Tool for the Formal Verification of Digitally
 -Intensive Analog/Mixed-Signal Circuits 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32292C3V84@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  9 June 2015 - MJK\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Salle 
 : MJK\n\nAhlem TRIKI\, Verimag\n\n\n« Distributed Implementations of Timed
  Component-based Systems (Implémentations Distributés des Systems Temps-ré
 el à base de Composants) » \n\nRésumé :\n\nCorrect distributed implementat
 ion of real-time systems has always been a challenging task. The coordinat
 ion of components executing on a distributed platform has to be ensured by
  complex communication protocols taking into account their timing constrai
 nts. In this thesis\, we propose rigorous design flow starting from a high
 -level model of an application software in BIP (Behavior\, Interaction\,..
 .
DTSTART:20150609T133000
DTEND:20150609T153000
DURATION:PT2H0M0S
LOCATION:MJK
SUMMARY:Ahlem TRIKI - Distributed Implementations of Timed Component-based 
 Systems (Implémentations Distributés des Systems Temps-réel à base de Comp
 osants)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3230iHc6v9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 28 May 2015 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nAndrew Reynolds\, EPFL Lausanne 
 \nhttp://lara.epfl.ch/~reynolds/\n\n« Using CVC4 for Proofs by Induction i
 n SMT » \n\nAbstract:\n\nSatisfiability modulo theory solvers are increasi
 ngly being used to solve quantified formulas over structures such as integ
 ers and term algebras. This talk presents a set of techniques for integrat
 ing inductive reasoning within SMT solving algorithms that is sound with r
 espect to the interpretation of structures in SMT-LIB standard. The techni
 ques include inductive strengthening of conjecture to be proven\, as well 
 as...
DTSTART:20150528T140000
DTEND:20150528T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andrew Reynolds - Using CVC4 for Proofs by Induction in SMT
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3230ICujig@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  8 April 2015 - CTL (Amphitheater
 )\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n13:30 - Salle : CTL (Amphitheater)\n\nAyoub Nouri\, Verimag\nhttp://ww
 w-verimag.imag.fr/~nouri/\n\n« Rigorous System-level Modeling and Performa
 nce Evaluation for Embedded System Design  » \n\nAbstract:\n\nIn the prese
 nt work\, we tackle the problem of modeling and evaluating performance in 
 the context of embedded systems design. These have become essential for mo
 dern societies and experienced important evolution. Due to the growing dem
 and on functionality and programmability\, software solutions have gained 
 in importance\, although known to be less efficient than dedicated hardwar
 e....
DTSTART:20150408T133000
DTEND:20150408T163000
DURATION:PT3H0M0S
LOCATION:CTL (Amphitheater)
SUMMARY:Ayoub Nouri - Rigorous System-level Modeling and Performance Evalua
 tion for Embedded System Design 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3231bUHpSV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  3 April 2015 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Damien Pous\, ENS de Lyon
http://perso.ens-
 lyon.fr/damien.pous/

« Algorithms for language equivalence of finite automa
 ta » 

Abstract:

Finite automata are used in a wide range of verification pro
 blems.\nWe introduce 'bisimulation up to congruence' as a technique for\np
 roving language equivalence of non-deterministic finite automata.\nExploit
 ing this technique\, we devise an optimisation of the classical\nalgorithm
  by Hopcroft and Karp which\, as we show\, is exploiting a\nweaker 'bisimu
 lation up to equivalence' technique. The...
DTSTART:20150403T140000
DTEND:20150403T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Damien Pous - Algorithms for language equivalence of finite automat
 a
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32320G3rUt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 February 2015 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

  Seminaires doctorants 3\, Verimag


« 
 Verimag PhD seminars 3 » 

Abstract:

14:00-14:35 Egor Karpenkov\nPolicy Itera
 tion: a Scalable Approach\n(supervision David Monniaux)\n\nMax-Policy iter
 ation is a new technique for obtaining inductive\ninvariants in the progra
 m\, which is based on the ideas of\nabstract interpretation.  One of the m
 ajor pitfalls of abstract\ninterpretation is widening: if the invariant va
 lue does not converge\nafter a few iterations\, the invariant is 'widened'
  to the largest\nvalue of the abstract domain.  Abstract...
DTSTART:20150219T140000
DTEND:20150219T170000
DURATION:PT3H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 3 - Verimag PhD seminars 3
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32336N9v7e@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 12 February 2015 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

  Seminaires doctorants 2\, Verimag


« 
 Verimag PhD seminars 2 » 

Abstract:

14:00-14:35 Dogan Ulus\nMonitoring Timed
  Regular Expressions\n(supervision Oded Maler)\n\nTimed level of abstracti
 on is extremely useful to model systems\nwith real-time constraints. Once 
 such systems are modeled as timed\nsystems\, properties with timing inform
 ation can be specified using a\nvariety of different formalisms such as te
 mporal logics and regular\nexpressions. In this work we use timed regular 
 expressions (TRE)\nas a compact but highly-expressive...
DTSTART:20150212T140000
DTEND:20150212T170000
DURATION:PT3H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 2 - Verimag PhD seminars 2
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3234zfvSnu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  5 February 2015 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

  Seminaires doctorants 1\, Verimag


« 
 Verimag PhD seminars 1 » 

Abstract:

14:00-14:35: Josselin Feist \nBinary ana
 lysis to assist detection and exploitability of\nvulnerability related to 
 dynamic memory management\n(supervision Parie-Laure Potet)\n\nVulnerabilit
 y detection aims to find software bugs that could be\nexploited by malicio
 us users to hijack the program execution or to\naccess sensible data.  My 
 work focus on a specific vulnerability\ncalled use-after-free.  In this pr
 esentation I will introduce the\nused of a static...
DTSTART:20150205T140000
DTEND:20150205T163000
DURATION:PT2H30M0S
LOCATION:salle A. Turing CE4
SUMMARY:  Seminaires doctorants 1 - Verimag PhD seminars 1
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3234pXkAX0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 29 January 2015 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nJim  Kapinski\, TEMA Toyota 
 Technical Center in Los Angeles\n\n\n« Applying V&V technologies to automo
 tive engine control: challenges and directions » \n\nAbstract:\n\nIn the m
 odel-based development (MBD) paradigm for embedded control software\, veri
 fication and validation (V&V) technologies are critical to ensure high qua
 lity of the software. In the automotive context\, powertrain control (PTC)
  software development is increasingly being performed using MBD principles
 \; however\, application of advanced V&V techniques to PTC software contin
 ues to be a...
DTSTART:20150129T140000
DTEND:20150129T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jim  Kapinski - Applying V&V technologies to automotive engine cont
 rol: challenges and directions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3235jxOEb8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 15 January 2015 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:00 - Salle : salle A. Turing CE4

Alexandre Marechal\, Verimag PhD stude
 nt


« A new Linearization Technique for Multivariate Polynomials Using Conve
 x Polyhedra Based on Handelman-Krivine's Theorem » 

Abstract:

We present a n
 ew linearization method to over-approximate non-linear multivariate polyno
 mials with convex polyhedra.\nIt is based on Handelman-Krivine's theorem a
 nd consists in using products of constraints of a polyhedron to over-appro
 ximate a polynomial on this polyhedron. We implemented it together with tw
 o other linearization methods that we will not detail in...
DTSTART:20150115T140000
DTEND:20150115T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexandre Marechal - A new Linearization Technique for Multivariate
  Polynomials Using Convex Polyhedra Based on Handelman-Krivine's Theorem
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3236gIoeGI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 10 December 2014 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nCristina Serban\, VERIMAG
 \n\n\n« An Introduction to Separation Logic » \n\nAbstract:\n\nSeparation 
 logic is a novel system for reasoning about program correctness\, which ex
 tends Hoare logic by allowing reasoning over the state of the heap. It was
  developed by John C. Reynolds\, Peter O'Hearn\, Samin Ishtiaq and Hongseo
 k Yang and is based on early work by Rod Burstall. Separation logic facili
 tates reasoning about shared mutable data structures and also supports loc
 al reasoning. It has also been extended to deal with other situations\, su
 ch as...
DTSTART:20141210T140000
DTEND:20141210T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Cristina Serban - An Introduction to Separation Logic
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3236h7x5lm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 21 November 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nChih-Hong Cheng\, ABB Germany
 \n\n\n« G4LTL-ST - Automatic Generation of PLC programs  » \n\nAbstract:\n
 \nG4LTL-ST automatically synthesizes control code for industrial Programma
 ble Logic Controls (PLC) from timed behavioral specifications of input-out
 put signals. These specifications are expressed in a linear temporal logic
  (LTL) extended with non-linear arithmetic constraints and timing constrai
 nts on signals. G4LTL-ST generates code in IEC 61131-3-compatible Structur
 ed Text\, which is compiled into executable code for a large number of ind
 ustrial...
DTSTART:20141121T140000
DTEND:20141121T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chih-Hong Cheng - G4LTL-ST - Automatic Generation of PLC programs 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3237fVbZhv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 13 November 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n13:30 - Salle : salle A. Turing CE4\n\nVictor Magron\, Imperial Co
 llege\nhttp://cas.ee.ic.ac.uk/people/vmagron/\n\n« New applications of mom
 ent-SOS hierarchies » \n\nAbstract:\n\nSemidefinite programming is relevan
 t to a wide range of mathematic fields\, including combinatorial optimizat
 ion\, control theory\, matrix completion. In 2001\, Lasserre introduced a 
 hierarchy of semidefinite relaxations for particular polynomial instances 
 of the Generalized Moment Problem (GMP). My talk emphasizes new applicatio
 ns of this moment-SOS hierarchy\, investigated during my PhD and Postdoc..
 .
DTSTART:20141113T133000
DTEND:20141113T153000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Victor Magron - New applications of moment-SOS hierarchies
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3238fNvUfA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  7 November 2014 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

Jean-Baptiste Jeannin\, Carnegie Mellon
  University
http://www.cs.cmu.edu/~jeannin 

« Differential Temporal Dynamic 
 Logic for Hybrid Systems and Airplane Collision Avoidance  » 

Abstract:

Diff
 erential Dynamic Logic can express important properties about\nCyber-Physi
 cal Systems\, by combining discrete assignments and control\nstructures wi
 th differential equations. However it can only express\nproperties about t
 he end state of a system. In this talk\, we first\nintroduce the different
 ial temporal dynamic logic dTL2\, a logic to\nspecify...
DTSTART:20141107T140000
DTEND:20141107T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Baptiste Jeannin - Differential Temporal Dynamic Logic for Hyb
 rid Systems and Airplane Collision Avoidance 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3239vgrJ0I@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 15 October 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nAndreas Podelski\, Universi
 ty of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff/podelski\n\n« 
 Proof Spaces for Unbounded Parallelism  » \n\nAbstract:\n\nWe present a pr
 oof system which can be used to exploit sequential verification technology
  for proving the correctness of multi-threaded programs with unboundedly m
 any threads. The corresponding verification method can leverage the techni
 ques of well-structured transition systems. The proof system is complete r
 elative to more traditional proof systems for multi-threaded programs whic
 h allow...
DTSTART:20141015T140000
DTEND:20141015T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andreas Podelski - Proof Spaces for Unbounded Parallelism 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3239gi2mxl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 14 October 2014 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nAndreas Podelski\, University
  of Freiburg\nhttp://swt.informatik.uni-freiburg.de/staff/podelski\n\n« St
 atic Analysis Modulo Theory » \n\nAbstract:\n\nWe present a new approach t
 o program verification.  We call it 'Static Analysis Modulo Theory' in ana
 logy with SMT solving.  Satisfiability here corresponds to the existence o
 f an error path in the program\, or: unsatisfiability corresponds to the e
 mptiness of an automaton. Each time the tool finds an error path\, i.e.\, 
 a word accepted by the automaton\, it analyzes the word in the theory of t
 he data...
DTSTART:20141014T140000
DTEND:20141014T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Andreas Podelski - Static Analysis Modulo Theory
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3240Go80wu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 13 October 2014 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sall
 e : CTL\n\nPranav TENDULKAR\, Verimag\n\n\n« Allocation et Ordonnancement 
 sur des processeurs multi-coeur avec des solveurs SMT (Mapping and Schedul
 ing on Multi-core Processors using SMT Solvers) » \n\nRésumé :\n\nDans l'o
 bjectif d'augmenter les performances\, l'architecture des processeurs a év
 olué vers des plate-formes 'multi-core' et 'many-core' composées de multip
 le unités de traitements. Toutefois\, trouver des moyens efficaces pour ex
 écuter du logiciel parallèle reste un problème difficile. Avec un grand no
 mbre d'unités de calcul disponibles\, le logiciel doit orchestrer la...
DTSTART:20141013T133000
DTEND:20141013T153000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Pranav TENDULKAR - Allocation et Ordonnancement sur des processeurs
  multi-coeur avec des solveurs SMT (Mapping and Scheduling on Multi-core P
 rocessors using SMT Solvers)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3241uoduJg@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday 13 October 2014 - Amphithéâtre - Maiso
 n Jean Kuntzmann
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = =
15:30 - Salle : Amphithéâtre - Maison Jean Kuntzmann

Julien 
 Henry\, Université de Grenoble
http://www-verimag.imag.fr/~jhenry/

« Analyse
  statique de programmes par interprétation abstraite et procédures de déci
 sion (Static Analysis by Abstract Interpretation and Decision Procedures) 
 » 

Résumé :

Chers tous\, \n\nJ'ai le plaisir de vous inviter à la soutenance
  de ma thèse de doctorat\, intitulée:\n\n'Analyse statique de programmes p
 ar interprétation abstraite et procédures de décision'\n\nqui aula lieu le
  lundi 13 octobre 2014 à 15h30 dans...
DTSTART:20141013T153000
DTEND:20141013T173000
DURATION:PT2H0M0S
LOCATION:Amphithéâtre - Maison Jean Kuntzmann
SUMMARY:Julien Henry - Analyse statique de programmes par interprétation ab
 straite et procédures de décision (Static Analysis by Abstract Interpretat
 ion and Decision Procedures)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-324213sjpe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday  9 October 2014 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
10:30 - Salle : salle A. Turing CE4

Kim Quyên Lý\, LIAMA\, VERIMAG


« Verific
 ation automatique de certificats de terminaison (Automated verification of
  termination certificates) » 

Résumé :

Bonjour à tous\,\n\nJ\'ai le plaisir 
 de vous inviter à ma soutenance de thèse\, intitulée\n\n« Automated verifi
 cation of termination certificates »\n\nVous êtes chaleureusement invités 
 au pot qui suivra et qui se déroulera au même endroit.\n\nJury :\nMr Frédé
 ric Blanqui\, Chargé de recherche à l’INRIA\, Paris\, Co-Directeur de thès
 e\nMr David Delahaye\, Maître de...
DTSTART:20141009T103000
DTEND:20141009T123000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Kim Quyên Lý - Verification automatique de certificats de terminais
 on (Automated verification of termination certificates)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3243SNNd2i@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  3 October 2014 - Maison Jean Kuntzman
 n
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : Maison Jean Kuntzmann

Raphaël Jamet\, Verimag
http://www-ver
 imag.imag.fr/~rjamet/

« Protocoles et Modèles pour la Sécurité des Réseaux 
 Ad Hoc Sans-Fil (Protocols and Models for the Security of Wireless Ad Hoc 
 Networks) » 

Résumé :

Bonjour à tous\,\n\nJ'ai le plaisir de vous inviter à 
 ma soutenance de thèse\, intitulée\n\n'Protocoles et Modèles pour la Sécur
 ité des Réseaux Ad Hoc Sans-Fil'.\n\nElle aura lieu le vendredi 3 Octobre 
 à 14h00\, en français\,\nà la Maison Jean Kuntzmann\, sur le campus de Gre
 noble.\nUn plan est disponible :...
DTSTART:20141003T140000
DTEND:20141003T170000
DURATION:PT3H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Raphaël Jamet - Protocoles et Modèles pour la Sécurité des Réseaux 
 Ad Hoc Sans-Fil (Protocols and Models for the Security of Wireless Ad Hoc 
 Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3243BuIB0Z@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 12 September 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nJean-Marc Vincent\, LIG\nhtt
 p://mescal.imag.fr/membres/jean-marc.vincent/index.html/\n\n« A Spatiotemp
 oral Data Aggregation Technique for the Macroscopic Analysis of Large-scal
 e Systems  » \n\nRésumé :\n\nAnalysts commonly use execution traces collec
 ted at runtime to understand the behavior of an application running on dis
 tributed and parallel systems. These traces are inspected post mortem usin
 g various visualization techniques that\, however\, do not scale properly 
 for a large number of events. This issue\, mainly due to human perception.
 ..
DTSTART:20140912T140000
DTEND:20140912T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Marc Vincent - A Spatiotemporal Data Aggregation Technique for
  the Macroscopic Analysis of Large-scale Systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3244B2RsJI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 28 May 2014 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Dejan Nickovic\, Austrian Institute of Te
 chnology
http://www.ait.ac.at/departments/safety-security/business-units/sa
 fe-and-autonomous-systems/?L=1

« Require\, Test and Trace It » 

Abstract:

We 
 propose a framework for requirement-driven test generation which combines 
 contract-based interface theories with model-based testing.  We design a s
 pecification language\, that we call requirement interfaces\, for formaliz
 ing different views (aspects) of synchronous data-flow systems \nfrom thei
 r informal requirements. Multiple views of a system\, each...
DTSTART:20140528T140000
DTEND:20140528T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Dejan Nickovic - Require\, Test and Trace It
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3245GFKiI3@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 28 April 2014 - Maison Jean Kuntzman
 n\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n13:00 - Salle : Maison Jean Kuntzmann\n\nChristian VON ESSEN\, Verimag
 /UJF\n\n\n« Vérification et synthèse quantitative (Quantitative verificati
 on and synthesis) » \n\nRésumé :\n\nCette thèse contribue à l'étude théori
 que et a l'application de la vérification et de la synthèse quantitative. 
 Nous étudions les stratégies qui optimisent la fraction de deux récompense
 s des MDPs. L'objectif est la synthèse de régulateurs efficaces dans des e
 nvironnements probabilistes. Premièrement nous montrons que les stratégies
  déterministes et sans mémoire sont suffisants. Sur la base de...
DTSTART:20140428T130000
DTEND:20140428T160000
DURATION:PT3H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Christian VON ESSEN - Vérification et synthèse quantitative (Quanti
 tative verification and synthesis)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3245THR7uv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 14 April 2014 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Kees Goossens\, TUE
http://www.es.ele.tue.n
 l/~kgoossens/

« CompSOC: A Mixed-Criticality Platform\, Formalism\, and Des
 ign Flow » 

Abstract:

Cyber-physical\, embedded real-time systems often cont
 ain multiple concurrent applications that\nhave different characteristics 
 and requirements\, and are often designed by different parties. As a resul
 t\, a\nsingle system contains applications designed using different models
  of computation\, and with different\ncriticalities (e.g. real time\, safe
 ty critical\, adaptive\, or not). CompSOC is a complete solution...
DTSTART:20140414T140000
DTEND:20140414T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Kees Goossens - CompSOC: A Mixed-Criticality Platform\, Formalism\,
  and Design Flow
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32468tVEvl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  3 April 2014 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle A. Turing CE4

Florian Brandner\, ENSTA-ParisTech 
http:
 //perso.ensta-paristech.fr/~brandner/

« Refinement of Worst-Case Execution 
 Time Bounds by Graph Pruning » 

Abstract:

As real-time systems increase in c
 omplexity to provide more and more \nfunctionality and perform more demand
 ing computations\, the problem of \nstatically analyzing the Worst-Case Ex
 ecution Time bound (WCET) of real-time \nprograms is becoming more and mor
 e time-consuming and imprecise.\n\nThe problem stems from the fact that wi
 th increasing program size also the \nnumber of...
DTSTART:20140403T140000
DTEND:20140403T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Florian Brandner - Refinement of Worst-Case Execution Time Bounds b
 y Graph Pruning
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3247VmMMkH@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  3 April 2014 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : salle A. Turing CE4\n\nJan Reineke\, Universität des 
 Saarlandes\nhttp://embedded.cs.uni-saarland.de/reineke.php\n\n« PRET DRAM 
 controller: bank privatization for predictability and temporal isolation  
 » \n\nAbstract:\n\nHard real-time embedded systems employ high-capacity me
 mories such as Dynamic RAMs (DRAMs) to cope with increasing data and code 
 sizes of modern designs. However\, memory controller design has so far lar
 gely focused on improving average-case performance. As a consequence\, the
  latency of memory accesses is unpredictable\, which complicates the worst
 -case...
DTSTART:20140403T100000
DTEND:20140403T120000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Reineke - PRET DRAM controller: bank privatization for predicta
 bility and temporal isolation 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3248AZtriz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - HDR - Thursday 13 March 2014 - Amphi H\, Ensimag
= = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 -
  Salle : Amphi H\, Ensimag

Matthieu Moy\, Verimag
http://www-verimag.imag.fr
 /~moy/

« High-level Models for Embedded Systems » 

Résumé :

  Les systèmes em
 barqués modernes ont atteint un niveau de complexité\n  qui fait qu'il n'e
 st plus possible d'attendre les premiers\n  prototypes physiques pour vali
 der les décisions sur l'intégration\n  des composants matériels et logicie
 ls. Il est donc nécessaire\n  d'utiliser des modèles\, tôt dans le flot de
  conception.\n  Les travaux présentés dans ce document contribuent à l'éta
 t de l'art\n  dans plusieurs domaines.\n\n ...
DTSTART:20140313T140000
DTEND:20140313T160000
DURATION:PT2H0M0S
LOCATION:Amphi H\, Ensimag
SUMMARY:Matthieu Moy - High-level Models for Embedded Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3248UuKf8U@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 27 February 2014 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

Eugene Asarin\, LIAFA 
http://www.liaf
 a.jussieu.fr/~asarin/

« Toward a Timed Theory of Channel Coding » 

Abstract:
 

During last five years we are working on entropy of timed languages. In th
 is talk\, based on our FORMATS'12 paper\, we will briefly recall this noti
 on and present our ideas on applying the entropy to  transmission of hybri
 d (discrete-analog) information over channels.  \n\nThe classical theory o
 f constrained-channel coding deals with the following questions: given two
  languages representing a source and a channel\, is it...
DTSTART:20140227T140000
DTEND:20140227T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Eugene Asarin - Toward a Timed Theory of Channel Coding
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3249SbstCB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 14 February 2014 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

Franck Cassez\, NICTA\, Sydney\, Austra
 lie
http://www.irccyn.fr/franck/

«  A compositional approach to inter-proced
 ural analysis » 

Abstract:

We address the problem of analysing inter-procedu
 ral programs without inlining function calls.\nJoint work with Christian M
 üller and Karla Burnett (more detailed abstract to come).


= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
Other seminars at 
 VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html?lang=en
Loca
 tion/Vision: salle A. Turing CE4 -...
DTSTART:20140214T140000
DTEND:20140214T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Franck Cassez -  A compositional approach to inter-procedural analy
 sis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32506ivKG7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  7 February 2014 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

 	Victor   	Magron \, LAAS 


« Formal Certi
 ficates for Nonlinear Inequalities » 

Abstract:

In this talk\, I will presen
 t a general framework to provide valid\ncertificates for nonlinear real in
 equalities\, defined by semialgebraic or\ntranscendental expressions and t
 o prove the correctness of these\ncertificates inside the Coq proof system
 .\n\nThe application range for such a tool is widespread\; for instance Ha
 les\\\'\nproof of Kepler\\\'s conjecture involves thousands of nonlinear i
 nequalities.\nThe functions we are dealing with are...
DTSTART:20140207T140000
DTEND:20140207T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY: 	Victor   	Magron  - Formal Certificates for Nonlinear Inequalities
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3250W4zVLl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 February 2014 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nNajah Ben Said\, Verimag\n
 \n\n« Information Flow Security in Component-Based Systems.  » \n\nAbstrac
 t:\n\nThe amount and complexity of nowadays conceived systems and software
  knows a continuous increase and ensuring information security in these sy
 stems is also paramount. Information flow security policies are very adequ
 ate and quite used to track the circulation of sensitive information throu
 ghout the system. The application of global constraints on the system?s in
 formation flow allows  to ensure event and data confidentiality and integr
 ity.  In...
DTSTART:20140206T140000
DTEND:20140206T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Najah Ben Said - Information Flow Security in Component-Based Syste
 ms. 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3251S7UtuV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  6 February 2014 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
15:00 - Salle : salle A. Turing CE4

Ali Kassem\, Verimag


« Formal Security
  Analysis for Routing  Protocols and E-exams » 

Abstract:

    Security proto
 cols aim at securing communications over public net-\nworks. Their design 
 is error-prone and not an easy task. Formal\nmethods have shown their usef
 ulness for providing a careful security\nanalysis and discovering flaws if
  exist. We make some contributions\nin security analysis of routing protoc
 ols and e-exams.\n    First\, we work on route validity in ad-hoc networks
 . We consider\nthe non-cooperative attacker model to...
DTSTART:20140206T150000
DTEND:20140206T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ali Kassem - Formal Security Analysis for Routing  Protocols and E-
 exams
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3252p8WLfB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 30 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nAbhinav Srivastav\, Verimag
 \n\n\n« Multi-objective scheduling for multi-core systems  » \n\nAbstract:
 \n\nThe aim of this thesis is to study the scheduling problems in context 
 of multi-objectives. Most of the problem pertaining to scheduling on multi
 -core machines are NP hard. Therefore\, we are interested in finding the g
 ood approximations for such problems. One such problem that we consider he
 re is the construction of pareto optimal front for jobshop problem with st
 retch for each job as quality of service. In this presentation\, I will di
 scuss...
DTSTART:20140130T150000
DTEND:20140130T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Abhinav Srivastav - Multi-objective scheduling for multi-core syste
 ms 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3253woTfOC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nSouha Ben Rayana\, Verimag\n
 \n\n« Compositional Verification of Component- Based Real-time Systems and
  Applications » \n\nAbstract:\n\nThe aim of this thesis is to overcome the
  state-space explosion problem related to the verification of timed system
 s with great number of components. Some methods for compositional verifica
 tion where proposed for untimed systems. However\, for timed systems\, ano
 ther important  issue is encountered. In fact\, the main difficulty with c
 ompositional verification of timed system is that calculating the local in
 variant of...
DTSTART:20140123T140000
DTEND:20140123T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Souha Ben Rayana - Compositional Verification of Component- Based R
 eal-time Systems and Applications
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3253AcUmtA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n16:00 - Salle : salle A. Turing CE4\n\nAlexios Lekidis\, Verimag\n
 \n\n« Model-based design in sensor network systems » \n\nAbstract:\n\nSens
 or networks have emerged as a dominant technology over the last years. Sin
 ce they are used in a vast variety of applications\, the main arising chal
 lenge is to provide efficient design solutions ensuring limited communicat
 ion cost and energy consumption\, manageable complexity and reduced failur
 e rate. A well-known formalism\, considering all these constraints\, is mo
 del-based design since it allows the simulation and validation of...
DTSTART:20140123T160000
DTEND:20140123T170000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexios Lekidis - Model-based design in sensor network systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3254X4PxOc@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 23 January 2014 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
15:00 - Salle : salle A. Turing CE4

Alexis Fouilhe\, Verimag


« Verifying nu
 merical static analysis results with a proof assistant » 

Abstract:

This tal
 k will give an overview of my PhD work\, both accomplished an\nprojected. 
  The main focus is on adapting existing numerical static\nanalysis techniq
 ues so that their result can be proved correct using\nthe Coq proof assist
 ant.\nTo start with\, a lightweight approach to proving the correctness of
  an\nimplementation of the abstract domain of polyhedra will be described.
 \nI will then move to ongoing and projected work. Handling...
DTSTART:20140123T150000
DTEND:20140123T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Alexis Fouilhe - Verifying numerical static analysis results with a
  proof assistant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3255mC3goZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n16:00 - Salle : salle A. Turing CE4\n\nIrini-Eleftheria Mens\, Veri
 mag\n\n\n« Learning Regular Languages over Large Alphabets » \n\nAbstract:
 \n\nIn this work we developed  a generic algorithm for learning regular la
 nguages defined over a large alphabet &#931\;. Such an alphabet can be inf
 inite\, like N or R or just so large that it is impossible or impractical 
 to treat it in an enumerative way. The obvious solution is to use a symbol
 ic representation where transitions are labeled by predicates which are ap
 plicable to the alphabet in question. Learning algorithms infer an automat
 on from a...
DTSTART:20140116T160000
DTEND:20140116T170000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Irini-Eleftheria Mens - Learning Regular Languages over Large Alpha
 bets
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3255JXLMNw@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nJan Lanik\, Verimag\n\n\n« S
 witching reduction in sequential circuits » \n\nAbstract:\n\nThe power con
 sumed by switching of logical elements is one of the most important contri
 butors to the power consumption of modern CMOS chips. We investigate metho
 ds to reduce the switching that could be used in EDA tools.\n\n\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther se
 minars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html?l
 ang=en\nLocation/Vision: salle A. Turing CE4 -...
DTSTART:20140116T150000
DTEND:20140116T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Lanik - Switching reduction in sequential circuits
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3256mslE3b@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 January 2014 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nOzgun Pinarer\, Verimag\n\n
 \n« Estimation of energy consumption of embedded system network  » \n\nAbs
 tract:\n\nEmbedded system networks are built up by sets of nodes which are
  communicating with each other. Each of these nodes has some hardware rest
 rictions like limited memory\, microprocessor\, battery and autonomy. With
  regard to autonomy\, it is crucial to be able to accurately estimate the 
 energy consumption of these systems\, both before deployment (for a predic
 tion of life time)\, and while running (to adapt their behavior depending 
 on the energy...
DTSTART:20140116T140000
DTEND:20140116T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ozgun Pinarer - Estimation of energy consumption of embedded system
  network 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3257pu4w28@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday  7 January 2014 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

Corneliu Popeea\, Technische Universita
 et Muenchen
http://www7.in.tum.de/~popeea/

« Automated verification of multi
 -threaded programs (Automated verification of multi-threaded programs) » 

R
 ésumé :

My research aims to provide techniques for building automated\nveri
 fication technology for the multi-core computing era. The last\nfifteen ye
 ars have provided significant progress in how automated\nverification tech
 nology helps in building sequential software. Despite\nthis success\, and 
 despite significant advances in testing\nmulti-threaded...
DTSTART:20140107T140000
DTEND:20140107T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Corneliu Popeea - Automated verification of multi-threaded programs
  (Automated verification of multi-threaded programs)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3258mTDFp2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 12 December 2013 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - S
 alle : CTL\n\nYvan Rivierre\, VERIMAG\nhttp://www-verimag.imag.fr/~rivierr
 e/\n\n« Algorithmes auto-stabilisants pour la construction de structures c
 ouvrantes réparties (Self-Stabilizing Algorithms for Constructing Distribu
 ted Spanning Structures) » \n\nRésumé :\n\nCette thèse s’intéresse à la co
 nstruction auto-stabilisante de structures couvrantes dans un système répa
 rti. L’auto-stabilisation est un paradigme pour la tolérance aux fautes da
 ns les algorithmes répartis. Plus précisément\, elle garantit que le systè
 me retrouve un comportement correct en temps fini après avoir...
DTSTART:20131212T133000
DTEND:20131212T153000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Yvan Rivierre - Algorithmes auto-stabilisants pour la construction 
 de structures couvrantes réparties (Self-Stabilizing Algorithms for Constr
 ucting Distributed Spanning Structures)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3259NSgvI0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  9 December 2013 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

Giuseppe Lipari\, LSV et Scuola Superio
 re Sant'Anna\, Pisa
http://retis.sssup.it/~lipari/

« Hierarchical scheduling
  and component-based analysis of real-time systems  » 

Abstract:

The complex
 ity of modern embedded real-time systems is constantly\nincreasing\, as ne
 w and more complex functionality is added to existing\nsoftware. At the sa
 me time\, due to the increasing computational power\nof the hardware platf
 orms and to the pressure to reduce the costs\,\nsoftware that in the past 
 was run on different computational nodes\, is\nnow being...
DTSTART:20131209T140000
DTEND:20131209T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Giuseppe Lipari - Hierarchical scheduling and component-based analy
 sis of real-time systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3259hUbcNT@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 25 November 2013 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
11:30 - Salle : salle A. Turing CE4

Mahfuza Farooque\, École polytechnique
h
 ttp://www.lix.polytechnique.fr/~mahfuza/

« A Bisimulation between DPLL(T) a
 nd a Proof-Search Strategy for the Focused Sequent Calculus » 

Abstract:

We 
 describe how the Davis-Putnam-Logemann-Loveland procedure DPLL is bisimila
 r to the goal-directed proof-search mechanism described by a standard but 
 carefully chosen sequent calculus. We thus relate a procedure described as
  a transition system on states to the gradual completion of incomplete pro
 of-trees.\nFor this we use a focused sequent calculus...
DTSTART:20131125T113000
DTEND:20131125T123000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mahfuza Farooque - A Bisimulation between DPLL(T) and a Proof-Searc
 h Strategy for the Focused Sequent Calculus
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32605v2Po1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 25 November 2013 - Amphiteatre Maiso
 n Jean Kuntzmann\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = = = = =\n14:00 - Salle : Amphiteatre Maison Jean Kuntzmann\n\nJa
 nnik Dreier\, VERIMAG\nhttp://www-verimag.imag.fr/~dreier/\n\n« Vérificati
 on formelle des protocoles de vote et de vente aux enchères: De l'anonymat
  à l'équité et la vérifiabilité (Formal Verification of Voting and Auction
  Protocols: From Privacy to Fairness and Verifiability) » \n\nRésumé :\n\n
 Dans cette thèse nous étudions formellement la sécurité des protocoles de 
 vote et d’enchère en ligne. Le vote en ligne est utilisé en Estonie et dan
 s certaines régions de la Suisse. D’autre part\, les enchères...
DTSTART:20131125T140000
DTEND:20131125T170000
DURATION:PT3H0M0S
LOCATION:Amphiteatre Maison Jean Kuntzmann
SUMMARY:Jannik Dreier - Vérification formelle des protocoles de vote et de 
 vente aux enchères: De l'anonymat à l'équité et la vérifiabilité (Formal V
 erification of Voting and Auction Protocols: From Privacy to Fairness and 
 Verifiability)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3261PH84UZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 October 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nMirko Fiacchini\, GIPSA-lab\
 , Grenoble\nhttp://www.gipsa-lab.grenoble-inp.fr/page_pro.php?vid=1757\n\n
 « Set-theory and invariance for complex systems » \n\nAbstract:\n\nThe pro
 blem of characterizing the regions of stability and convergence\, i.e. the
  domains of attraction\, underlies most of the results in control theory\,
  as stability and convergence are usually essential properties of a contro
 l law. Also the Lyapunov theory for stability\, for instance\, is implicit
 ly concerned with the characterization of the regions of the state space w
 here...
DTSTART:20131031T140000
DTEND:20131031T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mirko Fiacchini - Set-theory and invariance for complex systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3262oiecKV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 September 2013 - salle A. Turi
 ng CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =\n14:00 - Salle : salle A. Turing CE4\n\nGarnacho Manuel\, IRIT\nht
 tp://www.irit.fr/~Manuel.Garnacho/\n\n« A Mechanized Semantic Framework fo
 r Real-Time Systems » \n\nAbstract:\n\nIn this talk I will present a logic
 al framework for defining and validating real-time formalisms as well as r
 easoning methods over them. For this purpose\, at first we have implemente
 d in the Coq proof assistant well known semantic domains for real-time sys
 tems based on transitions systems and timed runs. We experiment our framew
 ork by considering the real-time CSP-based language FIACRE\, which has bee
 n defined...
DTSTART:20130926T140000
DTEND:20130926T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Garnacho Manuel - A Mechanized Semantic Framework for Real-Time Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3262VuPEmE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 16 September 2013 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nJean Quilbeuf\, Verimag\nhttp://www-veri.imag.fr/~quilbeuf\n
 \n«  Implantations distribuées de modèles à base de composants communicant
 s par interactions multiparties avec priorités : application au langage BI
 P.  (Distributed Implementations of Component-based Systems with Prioritiz
 ed Multiparty Interactions. Application to the BIP Framework.) » \n\nRésum
 é :\n\nLes nouveaux systèmes ont souvent recours à une implémentation dist
 ribuée du logiciel\, pour des raisons d'efficacité et à cause de l'emplace
 ment physique de certains capteurs et actuateurs. S'assurer de la...
DTSTART:20130916T140000
DTEND:20130916T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Jean Quilbeuf -  Implantations distribuées de modèles à base de com
 posants communicants par interactions multiparties avec priorités : applic
 ation au langage BIP.  (Distributed Implementations of Component-based Sys
 tems with Prioritized Multiparty Interactions. Application to the BIP Fram
 ework.)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3263D6vMno@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 18 July 2013 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Gaël Thomas\, Paris VI / LIP6
http://pages
 perso-systeme.lip6.fr/Gael.Thomas/

« A Study of the Scalability of Stop-the
 -world Garbage Collectors on Multicores » 

Abstract:

Large-scale multicore a
 rchitectures create new challenges for garbage\ncollectors (GCs). In parti
 cular\, throughput-oriented stop-the-world\nalgorithms demonstrate good pe
 rformance with a small number of cores\,\nbut have been shown to degrade b
 adly beyond approximately 8 cores on a\n48-core with OpenJDK 7. This negat
 ive result raises the question\nwhether the stop-the-world...
DTSTART:20130718T140000
DTEND:20130718T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gaël Thomas - A Study of the Scalability of Stop-the-world Garbage 
 Collectors on Multicores
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3264nVj70b@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 11 July 2013 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Sriram Sankaranarayanan\, University of C
 olorado at Boulder
http://www.cs.colorado.edu/~srirams/

« Invariance and Ter
 mination for Probabilistic Programs using Martingales. » 

Abstract:

Probabil
 istic programs are standard imperative programs enriched with constructs t
 o generate random values according to a pre-specified distribution. Such p
 rograms are common in a variety of application domains\, including risk as
 sessment\, biological systems\, sensor fusion algorithms and randomized al
 gorithms.\n\nWe present deductive techniques for the...
DTSTART:20130711T140000
DTEND:20130711T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sriram Sankaranarayanan - Invariance and Termination for Probabilis
 tic Programs using Martingales.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3265VBoHdU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 10 July 2013 - CTL
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CT
 L

Xiaomu Shi\, VERIMAG UJF


« Certification d'un simulateur de jeu d'instruct
 ions (Certification of an Instruction Set Simulator) » 

Résumé :

Cette thèse
  expose nos travaux de certification d'une partie d'un\nprogramme C/C++ no
 mmé SimSoC (Simulation of System on Chip)\, qui\nsimule le comportement d'
 architectures basées sur des processeurs tels\nque ARM\, PowerPC\, MIPS ou
  SH4. Un tel simulateur peut être utilisé\npour developper le logiciel d'u
 n système embarqué spécifique\, afin de\nraccourcir les phases des dévelop
 pement et de test\, en particulier\nquand la...
DTSTART:20130710T140000
DTEND:20130710T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Xiaomu Shi - Certification d'un simulateur de jeu d'instructions (C
 ertification of an Instruction Set Simulator)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3265B5k5jv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 27 June 2013 - salle A. Pnueli CE3
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Pnueli CE3

Klaus Draeger\, University of Oxford
http:
 //www.cs.ox.ac.uk/people/klaus.draeger/

« Synchronization Invariants » 

Abst
 ract:

Invariants are an important tool for the verification of\ncomplex sys
 tems. One very simple class of invariants for compositional\nreasoning is 
 given by linear constraints on the occurrences of\nsynchronization sequenc
 es. This class of invariants exhibits some\nquite interesting properties\,
  including connections to mathematical\nfields such as topology. I am curr
 ently investigating generalizations\nof these concepts to...
DTSTART:20130627T140000
DTEND:20130627T151500
DURATION:PT1H15M0S
LOCATION:salle A. Pnueli CE3
SUMMARY:Klaus Draeger - Synchronization Invariants
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3266ggwKoG@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - HDR - Wednesday 19 June 2013 -  salle Remy Lemaire (K2
 23) à l'Institut Néel
= = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = =
13:15 - Salle :  salle Remy Lemaire (K223) à l'Institu
 t Néel

Jessy Clédière\, CEA-Grenoble LETI DSIS STCS CESTI


« Treize années au
  Centre d'Evaluation de la Sécurité des Technologies de l'Information du C
 EA-Grenoble (CESTI-Léti) » 

Résumé :

Vous êtes cordialement invité à ma sout
 enance d'HDR intitulée « Treize années au Centre d'Evaluation de la Sécuri
 té des Technologies de l'Information du CEA-Grenoble (CESTI-Léti) » qui au
 ra lieu le 19 juin prochain à 13h15. \n\nLieu : \nsalle Remy Lemaire (K223
 ) à l'Institut Néel (CNRS\, 25...
DTSTART:20130619T131500
DTEND:20130619T151500
DURATION:PT2H0M0S
LOCATION: salle Remy Lemaire (K223) à l'Institut Néel
SUMMARY:Jessy Clédière - Treize années au Centre d'Evaluation de la Sécurit
 é des Technologies de l'Information du CEA-Grenoble (CESTI-Léti)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3267slm9CU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 11 June 2013 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 30 - Salle : salle A. Turing CE4

Christian von Essen\, Verimag


« Of Markov D
 ecision Processes and Airborne Collisions » 

Abstract:

Airspace collision av
 oidance systems have a long history. The several revisions\nof TCAS (Traff
 ic Collision Avoidance System) have been mandatory on medium\nand large ai
 rplanes for decades.\nFor the next generation of TCAS (called ACAS-X)\, de
 veloped by MIT Licoln Labs\,\nquantitative synthesis techniques are employ
 ed.\nIn this talk\, we will present this system from the perspective of Mo
 del\nChecking. We will present several questions that have...
DTSTART:20130611T143000
DTEND:20130611T151000
DURATION:PT0H40M0S
LOCATION:salle A. Turing CE4
SUMMARY:Christian von Essen - Of Markov Decision Processes and Airborne Col
 lisions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32694tsnvb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 May 2013 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Chantal Keller\, Laboratoire d'informatiqu
 e de l'X
http://www.lix.polytechnique.fr/~keller/

« A Modular Integration of
  SAT/SMT Solvers to Coq through Proof Witnesses » 

Abstract:

In this talk\, 
 I will present a way to enjoy the power of SAT and SMT\nprovers in Coq wit
 hout compromising soundness. This requires these\nprovers to return not on
 ly a yes/no answer\, but also a proof witness\nthat can be independently r
 echecked. We present such a checker\, written\nand fully certified in Coq.
  It is conceived in a modular way\, in order\nto tame the...
DTSTART:20130530T140000
DTEND:20130530T151500
DURATION:PT1H15M0S
LOCATION:salle A. Turing CE4
SUMMARY:Chantal Keller - A Modular Integration of SAT/SMT Solvers to Coq th
 rough Proof Witnesses
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3271rB2lK7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 May 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n16:00 - Salle : salle A. Turing CE4\n\nAdam Halasz\, West Virginia Univ
 ersity\nhttp://www.math.wvu.edu/~halasz/\n\n« Challenges and possible stra
 tegies in the modeling of signal initiation by membrane bound receptors » 
 \n\nAbstract:\n\nProgress in the systems biology of cells has been driven 
 by novel experimental methods\, made possible by advances in DNA manipulat
 ion\, signal processing\, and data handling capacities. In recent years\, 
 it is becoming clear that the amount of investment and of the accumulated 
 data are not matched by the level of predictive insight or clinical benefi
 ts derived...
DTSTART:20130523T160000
DTEND:20130523T180000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Adam Halasz - Challenges and possible strategies in the modeling of
  signal initiation by membrane bound receptors
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3272gx1oOA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday  6 May 2013 - Amphitéâtre MJK
= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Sa
 lle : Amphitéâtre MJK

Emmanuel Sifakis\, Verimag/UJF


« Programmation efficac
 e et sécurisé d'applications à mémoire partagée (Towards efficient and sec
 ure shared memory applications) » 

Résumé :

L'utilisation massive des platef
 ormes multi-cœurs et multi-processeurs a pour effet\nde favoriser la progr
 ammation parallèle à mémoire partagée. Néanmoins\, exploiter\nefficacement
  et de manière correcte le parallélisme sur ces plateformes reste un\nprob
 lème de recherche ouvert.\nDe plus\, leur modèle d'exécution sous-jacent\,
  et notamment les modèles de...
DTSTART:20130506T140000
DTEND:20130506T160000
DURATION:PT2H0M0S
LOCATION:Amphitéâtre MJK
SUMMARY:Emmanuel Sifakis - Programmation efficace et sécurisé d'application
 s à mémoire partagée (Towards efficient and secure shared memory applicati
 ons)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32747tULsx@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 26 April 2013 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Zhoulai Fu\, IMDEA Madrid
http://software.i
 mdea.org/people/zhoulai.fu/index.html

« Picking up your targets --- aggress
 ive strong update beyond common sense » 

Abstract:

Strong update --- the ass
 ignments overwrite the contents of the target property\,\n is essential fo
 r precise static analysis of  memory operations. Classically\,\nthe strong
  update is safe  if such assignment will definitely occur and that it\nass
 igns to a unique location.\n\nWe find that this classic safety condition  
 of strong update can be weakened if\nwe semantically...
DTSTART:20130426T140000
DTEND:20130426T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Zhoulai Fu - Picking up your targets --- aggressive strong update b
 eyond common sense
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3275HjFmCA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 25 April 2013 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle A. Turing CE4

Deshmukh Jyotirmoy\, Toyota 
http://www.c
 erc.utexas.edu/~jyotirmoy/

« Mining Temporal Requirements of an Industrial-
 Scale Control System » 

Abstract:

Industrial-scale control systems are often
  developed in the model-based design paradigm. This typically involves cap
 turing a plant model that describes the dynamical characteristics of the p
 hysical processes within the system\, and a controller model\, which is a 
 block-diagram-based\nrepresentation of the software used to regulate the p
 lant behavior. In practice\, plant models and controller...
DTSTART:20130425T140000
DTEND:20130425T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Deshmukh Jyotirmoy - Mining Temporal Requirements of an Industrial-
 Scale Control System
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3276XhbhbT@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 12 April 2013 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Florent Garnier\, VERIMAG


« Verifying C-Pro
 grams memory faults freedom by mean of  Abstract Interpretation and a-post
 eriori model verification » 

Abstract:

This work presents an original techni
 que that\nallow to guarantee that a given ANSI C program is free from cert
 ain\nmemory faults. The faults we consider are pervasive in such\nprograms
  and all C program developers as well as program users\nhave been concerne
 d with such issues.\nIn this work\, we are tracking a subset of the memory
  faults\,\nsuch as: A memory access through\na dangling...
DTSTART:20130412T140000
DTEND:20130412T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Florent Garnier - Verifying C-Programs memory faults freedom by mea
 n of  Abstract Interpretation and a-posteriori model verification
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32775dRUh1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  9 April 2013 - CTL Ampitheatre\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 3:30 - Salle : CTL Ampitheatre\n\nParaskevas Bourgos\, Verimag / UJF\n\n\n
 « Flot de conception rigoureux pour la programmation de plates-formes many
 core (Rigorous Design Flow for Programming Manycore Platforms) » \n\nRésum
 é :\n\nL’objectif du travail présenté dans cette thèse  est de répondre à 
 un verrou fondamental\, qui est «comment programmer d’une manière rigoureu
 se et efficace des applications embarquées sur des plateformes multi-coeur
 s?». Cette problématique pose plusieurs défis: 1) le développement d’une a
 pproche rigoureuse basée sur les modèles pour pouvoir...
DTSTART:20130409T133000
DTEND:20130409T153000
DURATION:PT2H0M0S
LOCATION:CTL Ampitheatre
SUMMARY:Paraskevas Bourgos - Flot de conception rigoureux pour la programma
 tion de plates-formes manycore (Rigorous Design Flow for Programming Manyc
 ore Platforms)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3278wp2URA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 22 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nKarem Sakalla\, University of Mi
 chigan Ann Arbor\nhttp://web.eecs.umich.edu/~karem/\n\n« Saucy3: Fast Symm
 etry Discovery in Graphs » \n\nAbstract:\n\nIn this talk I will describe t
 he saucy symmetry detection algorithm. The origins of Saucy can be traced 
 to our attempt to find and break the symmetries of difficult SAT instances
 . A CNF instance was encoded as a colored graph and passed on to a graph a
 utomorphism tool to find a set of symmetry generators (vertex permutations
  that preserve the edge relation)  which were then used to create...
DTSTART:20130322T140000
DTEND:20130322T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Karem Sakalla - Saucy3: Fast Symmetry Discovery in Graphs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3279u0v5XE@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 19 March 2013 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
11
 :00 - Salle : salle A. Turing CE4

Sanjit Seshia\, University of California\
 , Berkeley
http://www.eecs.berkeley.edu/~sseshia/

« Integrating Induction an
 d Deduction for Verification and Synthesis » 

Abstract:

Even with impressive
  advances in automated formal methods\, certain\nproblems in system verifi
 cation and synthesis remain challenging.\nExamples include the verificatio
 n of quantitative properties of software\ninvolving constraints on timing 
 and energy consumption\, and the\nautomatic synthesis of systems from spec
 ifications. The challenges\nmainly arise from three sources:...
DTSTART:20130319T110000
DTEND:20130319T120000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sanjit Seshia - Integrating Induction and Deduction for Verificatio
 n and Synthesis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3279xDRPJb@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n11:00 - Salle : salle A. Turing CE4\n\nRolf Ernst\, TU Braunschweig\nht
 tp://www.ida.ing.tu-bs.de/home/mitarbeiter/ernst\n\n«  Mixed critical syst
 em design and analysis  » \n\nAbstract:\n\nWith increasing use of embedded
  systems in safety critical systems\, architectures and design processes f
 or safety have become a primary objective in systems design. Most such sys
 tems are also time critical leading to safety and time critical systems. S
 afety standards impose strong requirements on such systems challenging sys
 tem performance and cost. Very often\, however\, only part of the function
 s is...
DTSTART:20130318T110000
DTEND:20130318T123000
DURATION:PT1H30M0S
LOCATION:salle A. Turing CE4
SUMMARY:Rolf Ernst -  Mixed critical system design and analysis 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32807jW8WN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nWang Yi\, Uppsala University\nht
 tp://user.it.uu.se/~yi/\n\n« Scheduling and Analysis of Cyclic Mode-Switch
 es  » \n\nAbstract:\n\nWe propose to structure the global behavior of real
 -time systems using modes and mode switches.  In each mode\, a system is e
 xecuting a set of real-time tasks generating resource requests\; a mode sw
 itch may be triggered at any time by internal software or hardware errors\
 , or external events. During a mode switch\, the pending requests generate
 d in the source mode should be handled in the target mode according to a m
 ode change...
DTSTART:20130318T140000
DTEND:20130318T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Wang Yi - Scheduling and Analysis of Cyclic Mode-Switches 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32815Ri1ni@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 18 March 2013 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nWang Yi\, Uppsala University\nht
 tp://user.it.uu.se/~yi/\n\n« Scheduling and Analysis of Cyclic Mode-Switch
 es  » \n\nAbstract:\n\nWe propose to structure the global behavior of real
 -time systems using modes and mode switches.  In each mode\, a system is e
 xecuting a set of real-time tasks generating resource requests\; a mode sw
 itch may be triggered at any time by internal software or hardware errors\
 , or external events. During a mode switch\, the pending requests generate
 d in the source mode should be handled in the target mode according to a m
 ode change...
DTSTART:20130318T140000
DTEND:20130318T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Wang Yi - Scheduling and Analysis of Cyclic Mode-Switches 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3282IjdTxv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday  6 March 2013 - salle A. Turing CE
 4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 
14:00 - Salle : salle A. Turing CE4

Marc Pouzet\, UPMC / ENS
http://www.di.e
 ns.fr/~pouzet/

« Zélus: A Synchronous Language with ODEs » 

Abstract:

In this
  talk\, I will overview the design\, semantics and implementation\nof a sy
 nchronous language that mixes difference equations\, hierarchical automata
 \nand ODEs.


= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Other seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-S
 eminars\,62.html?lang=en
Location/Vision: salle A. Turing CE4 - http://www-
 verimag.imag.fr/Plan-d-acces.html?lang=fr
To...
DTSTART:20130306T140000
DTEND:20130306T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Marc Pouzet - Zélus: A Synchronous Language with ODEs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32825svxPk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 21 February 2013 - Amphi 22\, rez-
 de-chaussée de l'UFR IMAG (bat F)\n= = = = = = = = = = = = = = = = = = = =
  = = = = = = = = = = = = = = = = =\n14:00 - Salle : Amphi 22\, rez-de-chau
 ssée de l'UFR IMAG (bat F)\n\nValentin Perrelle\, UJF / Verimag\n\n\n« Ana
 lyse Statique de Programmes Manipulant des Tableaux (Static Analysis of Pr
 ograms Manipulating Arrays) » \n\nRésumé :\n\nL’analyse statique de progra
 mmes est un domaine crucial en compilation\, en optimisation\, et en valid
 ation de logiciels. Les structures de données complexes (tableaux\, listes
 \, graphes\,...)\, omniprésentes dans les programmes\, posent des problème
 s difficiles\, du fait qu’elles représentent des ensembles de données de..
 .
DTSTART:20130221T140000
DTEND:20130221T160000
DURATION:PT2H0M0S
LOCATION:Amphi 22\, rez-de-chaussée de l'UFR IMAG (bat F)
SUMMARY:Valentin Perrelle - Analyse Statique de Programmes Manipulant des T
 ableaux (Static Analysis of Programs Manipulating Arrays)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3283z0F2kJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 31 January 2013 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n15:00 - Salle : salle A. Turing CE4\n\nAhlem Triki\, Verimag\n\n\n«
  Seminaire doctorant » \n\nRésumé :\n\nTBA\n\n\n\n\n= = = = = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = =\nOther seminars at VER
 IMAG - http://www-verimag.imag.fr/Verimag-Seminars\,62.html?lang=en\nLocat
 ion/Vision: salle A. Turing CE4 - http://www-verimag.imag.fr/Plan-d-acces.
 html?lang=fr\nTo unsubscribe\, reply to this mail with UNSUBSCRIBE in the 
 subject\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =
DTSTART:20130131T150000
DTEND:20130131T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ahlem Triki - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3284NimB2x@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 31 January 2013 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:00 - Salle : salle A. Turing CE4

Dario Socci \, Verimag


« Seminaire doct
 orant » 

Résumé :

Design Flow for Mixed-Critical Applications on Multi-core 
 Systems\n\nabstract:\nThe introduction of many-cores and multi-cores is le
 ading to an increasing trend in embedded systems towards implementing mult
 iple subsystems upon a single shared platform. However\, in most applicati
 ons\, not all the subsystems are equally critical. Especially this observa
 tion is important when human lives depend on correct functionality\, e.g. 
 in avionics systems. In mixed criticality systems...
DTSTART:20130131T140000
DTEND:20130131T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Dario Socci  - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3285eWxklA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
15:30 - Salle : salle A. Turing CE4

Ayoub Nouri \, Verimag


« Seminaire doct
 orant » 

Résumé :

Towards an Integrated Approach for Performance Evaluation 
 of Embedded Systems : Statistical Model Checking and Learning-based Abstra
 ction.\n\nWe are trying in this work to combine Statistical Model Checking
  with abstraction based on Learning techniques to make the former techniqu
 e more scalable. In the same time we are doing code generation targeting m
 ulticolor platforms to be able to get real metrics from physical platform 
 or accurate simulators to make the models to be checked...
DTSTART:20130124T153000
DTEND:20130124T163000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ayoub Nouri  - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3285pxbcf9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
13:30 - Salle : salle A. Turing CE4

Julien Henry\, Verimag


« Seminaire doct
 orant » 

Résumé :

Titre : Analyse statique par interprétation abstraite et p
 rocédures de décision.\n\nL'interprétation abstraite est une technique cla
 ssique d'analyse statique qui permet de calculer une sur-approximation des
  état atteignables d'un programme. Cette sur-approximation peut être rendu
 e plus précise en distinguant tous les chemins à l'intérieur des boucles\,
  mais cette énumération de chemins a un coût exponentiel. L'utilisation de
  techniques SMT permet d'éviter en...
DTSTART:20130124T133000
DTEND:20130124T143000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Julien Henry - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3286TJGzz8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 24 January 2013 - salle A. Turing C
 E4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:30 - Salle : salle A. Turing CE4

Raphael  Jamet\, Verimag


« Seminaire do
 ctorant » 

Résumé :

Secure and resilient protocols for wireless sensor\n\nTh
 e goal for this thesis is to build and analyze secure protocols for wirele
 ss sensor networks. The inherent limitations of these platforms cause a lo
 t of security challenges when compared to traditional networks\, and thus\
 , we need to find new ways of achieving security. We will first present ou
 r work on neighborhood detection\, where we developed a model for the veri
 fication of k-neighborhoods in WSNs\, and proposed a new...
DTSTART:20130124T143000
DTEND:20130124T153000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Raphael  Jamet - Seminaire doctorant
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3287V7UMUh@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 16 January 2013 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nPrabhakar Pavithra\, IMDEA\
 , Spain\nhttp://www.software.imdea.org/people/pavithra.prabhakar/index.htm
 l\n\n« Approximation based Verification of Hybrid Systems » \n\nAbstract:
 \n\nThe increasing demand for automation in safety-critical applications s
 uch as aeronautics\, automotive\, industrial process control\, medical dev
 ices and so on\, has pressurized the need for scalable formal analysis tec
 hniques for ensuring reliable and error-free operation of the systems. A u
 nique feature of these systems is the mixed discrete continuous behaviors 
 they exhibit\,...
DTSTART:20130116T140000
DTEND:20130116T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Prabhakar Pavithra - Approximation based Verification of Hybrid Sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3287SnPl2p@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  7 December 2012 - CTL
= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : C
 TL

Romain Testylier\, UJF


« Reachability analysis of nonlinear dynamical sys
 tems » 

Abstract:

This thesis is concerned with safety verification of hybri
 d systems\, which are a common mathematical model for describing systems i
 ntegrating both continuous and discrete dynamics. They found applications 
 in various domains such that embedded systems and biological systems.\n\nB
 esides the undecidability of the verification problem for even hybrid syst
 ems with simple dynamics\, the main difficulty in applying the standard ap
 proaches (which have been successful for hardware and...
DTSTART:20121207T140000
DTEND:20121207T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Romain Testylier - Reachability analysis of nonlinear dynamical sys
 tems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3288aIMrRl@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n15:00 - Salle : salle A. Turing CE4\n\nIrina Asavoae\, University 
 Alexandru Ioan Cuza\, Iasi\, Romania\n\n\n« Bounded Model Checking of Recu
 rsive Programs with Pointers in K Abstract » \n\nAbstract:\n\nWe present a
 n adaptation of the model checking pushdown systems to semantics-based ver
 iﬁcation. First we introduce the algebraic notion of pushdown systems spec
 iﬁcations (PSS) and adapt a model checking algorithm for this new notion. 
 Then we instantiate everything in the K framework\, namely we show why K i
 s a suitable environment for PSS. Finally\, we give a parametric K speciﬁc
 ation...
DTSTART:20121206T150000
DTEND:20121206T160000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Irina Asavoae - Bounded Model Checking of Recursive Programs with P
 ointers in K Abstract
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3289d6jaTj@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  6 December 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nMihail Asavoae\, University
  Alexandru Ioan Cuza\, Iasi\, Romania   \n\n\n« Semantics-Based WCET Analy
 sis » \n\nAbstract:\n\nWe propose a general methodology for worst-case exe
 cution time (WCET) analysis centered around a formal executable semantics 
 of the underlying programming language. We assert that a formal definition
  of a language has all the necessary information to be used for program an
 alysis and verification\, therefore we define\, in a rewrite-based framewo
 rk called K\, a formal executable semantics of a MIPS-based assembly langu
 age. This...
DTSTART:20121206T140000
DTEND:20121206T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Mihail Asavoae - Semantics-Based WCET Analysis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3290Fl2FVP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  9 November 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nDamien Massé\, Université de 
 Bretagne Occidentale (Brest)\nhttp://www.lisyc.univ-brest.fr/pages_perso/d
 masse/\n\n« Inférences de propriétés de terminaison par itération de strat
 égies » \n\nRésumé :\n\nDans le cadre de l'interprétation abstraite\, les 
 techniques d'itérations de polices (ou de stratégies) ont été proposées co
 mme alternative à la méthode classique d'élargissement/rétrécissement pour
  approximer des points fixes avec une précision accrue. Nous étudions ici 
 l'application de ces techniques à la surapproximation de...
DTSTART:20121109T140000
DTEND:20121109T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Damien Massé - Inférences de propriétés de terminaison par itératio
 n de stratégies
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32908avWnF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Tuesday  6 November 2012 - Maison Jean Kuntzma
 nn\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n10:00 - Salle : Maison Jean Kuntzmann\n\nPascal Lafourcade\, Verimag
 \nhttp://www-verimag.imag.fr/~plafourc/\n\n« Sécurité assisté par ordinate
 ur pour les primitives cryptographiques\, les protocoles de vote électroni
 ques et les réseaux de capteurs sans fil (Computer Aided Security for Cryp
 tographic Primitives\, Voting protocols\, and Wireless Sensor Networks) » 
 \n\nRésumé :\n\nLa sécurité est une des préoccupations principales de l’in
 formatique moderne. De plus en plus de personnes utilisent un ordinateur p
 our des opérations sensibles comme pour des transferts bancaires\, des...
DTSTART:20121106T100000
DTEND:20121106T130000
DURATION:PT3H0M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Pascal Lafourcade - Sécurité assisté par ordinateur pour les primit
 ives cryptographiques\, les protocoles de vote électroniques et les réseau
 x de capteurs sans fil (Computer Aided Security for Cryptographic Primitiv
 es\, Voting protocols\, and Wireless Sensor Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3291EgHBwW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Monday 29 October 2012 - CTL
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CT
 L

Jean-François KEMPF\, VERIMAG


« Exploration de l'espace de design assistée
  par ordinateur pour les systèmes multi-coeurs (On Computer-Aided Design-S
 pace Exploration for Multi-Cores) » 

Résumé :

La complexité croissante des s
 ystèmes embarqués nécessite des formalismes de modélisation qui peuvent êt
 re simulés et analysés pour explorer l'espace des alternatives de concepti
 on. Cette thèse décrit le développement d'un formalisme de modélisation et
  des outils pour l'exploration de l'espace de conception à des stades préc
 oces du développement.\nD'une part\,...
DTSTART:20121029T140000
DTEND:20121029T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Jean-François KEMPF - Exploration de l'espace de design assistée pa
 r ordinateur pour les systèmes multi-coeurs (On Computer-Aided Design-Spac
 e Exploration for Multi-Cores)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3292DcIuoW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 24 October 2012 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : CTL\n\nSelma Saidi\, VERIMAG\n\n\n« Optimizing DMA Data Transfers f
 or Embedded Multi-Cores » \n\nAbstract:\n\nMultiprocessor system on chip (
 MPSoC) such as the CELL processor or the more recent Platform2012 are hete
 rogeneous multi-core architectures\, with a powerful host processor and a 
 computation fabric\, consisting of several smaller cores\, whose intended 
 role is to act as a general purpose programmable accelerator. Therefore co
 mputation-intensive (and parallelizable) parts of the application initiall
 y intended to be executed by the host processor are offloaded to the multi
 -cores for...
DTSTART:20121024T140000
DTEND:20121024T170000
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:Selma Saidi - Optimizing DMA Data Transfers for Embedded Multi-Core
 s
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3293DxCtBW@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 16 October 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n15:30 - Salle : salle A. Turing CE4\n\nGuillaume Brat\, NASA Ames\n
 \n\n« An overview of formal methods for Aeronautics at NASA » \n\nAbstract
 :\n\nThe US National Airspace System is undergoing a transformation to add
 ress the dramatic increase in air traffic in the future. The FAA\, and the
  JPDO\, have identified a certain number of operational improvements and i
 nfusion of technologies needed to address the problem. This effort is know
 n as NextGen\, the Next Generation of air traffic system. Certain technolo
 gy gaps have been identified for NextGen\, especially when it comes to the
  V&V of...
DTSTART:20121016T153000
DTEND:20121016T173000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Guillaume Brat - An overview of formal methods for Aeronautics at N
 ASA
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3293SJTovF@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  2 October 2012 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nArtur Pietrek\, VERIMAG\n\n\n« TIREX: a textual target-level i
 ntermediate representation for virtual execution  environment\, compiler i
 nformation exchange and program analysis » \n\nAbstract:\n\nSome environme
 nts require several compilers\, for instance one for the operating system\
 , supporting the full C/C++ norm\, and one for the applications\, potentia
 lly supporting less but able to derive more performance. Maintaining diffe
 rent compilers for a target requires considerable effort\, thus it is easi
 er to implement and maintain target-dependent optimizations in a single\, 
 external tool....
DTSTART:20121002T140000
DTEND:20121002T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Artur Pietrek - TIREX: a textual target-level intermediate represen
 tation for virtual execution  environment\, compiler information exchange 
 and program analysis
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3294UaU5Le@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 14 September 2012 - salle A. Turing
  CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : salle A. Turing CE4\n\nRance Delong\, SRI Internati
 onal\n\n\n« MILS and DMILS project (MILS and DMILS project) » \n\nRésumé :
 \n\nPrior MILS work has focused on relatively simple applications that cou
 ld be implemented on a single MILS node. These simple applications have us
 ed a modest number of subjects and objects\, organized into disjoint parti
 tions. The architecture of such systems has been simple enough that its co
 rrespondence to the configuration of the separation kernel may be validate
 d by inspection\, with rigorous assurance only for the correctness of the 
 kernel....
DTSTART:20120914T140000
DTEND:20120915T050000
DURATION:PT15H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Rance Delong - MILS and DMILS project (MILS and DMILS project)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3295si1tkz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 13 September 2012 - salle A. Turing
  CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : salle A. Turing CE4

Corneliu Popeea\, Technical Universi
 ty of Munich
http://www.model.in.tum.de/~popeea/

« Synthesizing Software Ver
 ifiers from Proof Rules » 

Abstract:

Automatically generated tools can signi
 ficantly improve programmer\nproductivity. For example\, parsers and dataf
 low analyzers can be\nautomatically generated from declarative specificati
 ons in the form of\ngrammars\, which tremendously simplifies the task of i
 mplementing a\ncompiler.\nIn this talk\, I will present a method for the a
 utomatic synthesis of\nsoftware verification tools. The...
DTSTART:20120913T140000
DTEND:20120913T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Corneliu Popeea - Synthesizing Software Verifiers from Proof Rules
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3296gOoTPM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 12 July 2012 - salle C. Shannon CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle C. Shannon CE4

Roberto Bruttomesso\, ATRENTA


« Automate
 d Analysis of Parametric Timing-Based Mutual Exclusion Algorithms » 

Abstra
 ct:

Deadlock-free algorithms that ensure mutual exclusion cru- cially\ndepe
 nd on timing assumptions. In this paper\, we describe our expe-\nrience in
  automatically verifying mutual-exclusion and\ndeadlock-freedom of the Fis
 cher and Lynch-Shavit algorithms\, using the\nmodel checker modulo theorie
 s mcmt. First\, we explain how to specify\ntiming-based algorithms in the 
 mcmt input language as symbolic\ntransition systems. Then\,...
DTSTART:20120712T140000
DTEND:20120713T053000
DURATION:PT15H30M0S
LOCATION:salle C. Shannon CE4
SUMMARY:Roberto Bruttomesso - Automated Analysis of Parametric Timing-Based
  Mutual Exclusion Algorithms
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3296ckgugz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  5 July 2012 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Pascal Cuoq\, CEA
http://frama-c.com

« Coll
 aboration d\'analyses dans Frama-C » 

Résumé :

Frama-C est une plateforme co
 llaborative d\'analyse statique pour le langage C. Chaque technique ou idé
 e peut être implémentée dans Frama-C sous la forme d\'un greffon.\n\nUn pr
 emier moyen de collaboration entre greffons est par le langage de spécific
 ation ACSL : l\'analyse de valeurs\, un greffon d\'interprétation abstrait
 e\, insère dans le programme cible des assertions ACSL pour chaque comport
 ement indéfini qu\'elle est incapable d\'exclure....
DTSTART:20120705T140000
DTEND:20120705T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pascal Cuoq - Collaboration d\'analyses dans Frama-C
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3297DEOjhj@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 26 June 2012 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:30 - Salle 
 : CTL\n\nEduardo Mazza\, Verimag\n\n\n« A Formal Framework for Specifying 
 and Analyzing Liabilities Using Log as Digital Evidence (A Formal Framewor
 k for Specifying and Analyzing Liabilities Using Log as Digital Evidence) 
 » \n\nRésumé :\n\nMalgré les progrès importants effectués en matière de co
 nception de logiciels et l'existence de méthodes de développement éprouvée
 s\, il faut reconnaître que les défaillances de systèmes causées par des l
 ogiciels restent fréquentes. Il est donc important de pouvoir déterminer e
 n cas de dommages causés par des logiciels les responsabilités...
DTSTART:20120626T103000
DTEND:20120626T123000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Eduardo Mazza - A Formal Framework for Specifying and Analyzing Lia
 bilities Using Log as Digital Evidence (A Formal Framework for Specifying 
 and Analyzing Liabilities Using Log as Digital Evidence)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-32983Iccsr@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 26 June 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:30 - Salle : salle A. Turing CE4\n\nGerardo Schneider\, Chalmers | U
 niversity of Gothenburg\nhttp://www.cse.chalmers.se/~gersch/\n\n« Towards 
 a Framework for Conflict Analysis of Normative Texts Written in Controlled
  Natural Language » \n\nAbstract:\n\nOur aim is to detect whether texts wr
 itten in natural language contain normative conflicts (i.e.\, whether ther
 e are conflicting obligations\, permissions and prohibitions). In this tal
 k I will present AnaCon\, a framework where such texts are written in a Co
 ntrolled Natural Language (CNL) and automatically translated into the form
 al...
DTSTART:20120626T143000
DTEND:20120626T153000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gerardo Schneider - Towards a Framework for Conflict Analysis of No
 rmative Texts Written in Controlled Natural Language
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3299URXFWC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 June 2012 - salle A. Turing CE
 4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =\n14:00 - Salle : salle A. Turing CE4\n\nJean-Christophe Filliâtre\, CNR
 S / LRI\nhttp://www.lri.fr/~filliatr/index.fr.html\n\n« Combining Interact
 ive and Automated Theorem Proving in Why3 » \n\nAbstract:\n\nWhy3 is a pla
 tform for deductive program verification. It features a rich logical langu
 age with polymorphism\, algebraic data types\, and inductive predicates. W
 hy3 provides an extensive library of proof task transformations that can b
 e chained to produce a suitable input for a large set of theorem provers\,
  including SMT solvers\, TPTP provers\, as well as interactive proof assis
 tants. In...
DTSTART:20120621T140000
DTEND:20120621T151500
DURATION:PT1H15M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jean-Christophe Filliâtre - Combining Interactive and Automated The
 orem Proving in Why3
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3299RVUPe7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  7 June 2012 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Gilles Muller\, LIP6 
http://pagesperso-sy
 steme.lip6.fr/Gilles.Muller/

« Remote Core Locking: Migrating Critical-Sect
 ion Execution to Improve the Performance of Multithreaded Applications » 

A
 bstract:

The scalability of multithreaded applications on current\nmulticor
 e systems is hampered by the performance of\nlock algorithms\, due to the 
 costs of access contention\nand cache misses. In this paper\, we propose a
  new lock\nalgorithm\, Remote Core Locking (RCL) that aims to im-\nprove t
 he performance of critical sections in legacy...
DTSTART:20120607T140000
DTEND:20120607T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Gilles Muller - Remote Core Locking: Migrating Critical-Section Exe
 cution to Improve the Performance of Multithreaded Applications
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3300fvvBjR@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Tuesday  5 June 2012 - CTL
= = = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CTL

T
 esnim Abdellatif\, Verimag


« Rigorous Implementation of Real-time Systems »
  

Abstract:

Real-time systems are systems that are subject to 'real-time con
 straints'? e.g. operational deadlines from event to system response. Build
 ing real-time systems\nrequires the use of design and implementation metho
 dologies that ensure the property of meeting timing constraints e.g. a sys
 tem has to react within user-defined bounds such as deadlines and periodic
 ity.\n\nWe provide a rigorous design and implementation method for real-ti
 me systems. The implementation is generated from a given...
DTSTART:20120605T140000
DTEND:20120605T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Tesnim Abdellatif - Rigorous Implementation of Real-time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3301xv4VWa@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  1 June 2012 - salle A. Turing CE4
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : salle A. Turing CE4\n\nIan Mitchell\, VERIMAG\nhttp://w
 ww.cs.ubc.ca/~mitchell/\n\n« Scalable approximation of the viability kerne
 l and safe control synthesis for LTI systems using maximal reachability » 
 \n\nAbstract:\n\nWe present a connection between the viability kernel and 
 maximal reachable sets.  Current numerical schemes that compute the viabil
 ity kernel suffer from a complexity that is exponential in the dimension o
 f the state space.  In contrast\, extremely efficient and scalable techniq
 ues are available that compute maximal reachable sets.  We show that under
  certain...
DTSTART:20120601T140000
DTEND:20120601T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Ian Mitchell - Scalable approximation of the viability kernel and s
 afe control synthesis for LTI systems using maximal reachability
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3301JVmRgT@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 31 May 2012 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Pavol Cerny\, IST Austria
http://pub.ist.ac
 .at/~cernyp/

« Quantitative Abstraction Refinement » 

Abstract:

We propose a 
 general framework for abstraction with respect to\nquantitative properties
  of systems\, such as worst-case execution time\n(WCET) or power consumpti
 on.  Our framework provides a systematic way\nfor counter-example guided a
 bstraction refinement (CEGAR) for\nquantitative properties.  The salient a
 spect of the framework is that\nit allows anytime verification\, that is\,
  verification algorithms\nthat can be stopped at any time...
DTSTART:20120531T140000
DTEND:20120531T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pavol Cerny - Quantitative Abstraction Refinement
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3302KhXxnO@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday 29 May 2012 - CTL\n= = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n15:00 - Salle :
  CTL\n\nRajarshi RAY\, Verimag\nhttp://www-verimag.imag.fr/~ray/\n\n« Reac
 hability Analysis of Hybrid Systems Using Support Functions » \n\nAbstract
 :\n\nIn model based design\, one constructs a mathematical model of the sy
 stem and uses it to design the system so that it exhibits the desired prop
 erties. For safety critical systems\, it can be of utmost importance to ve
 rify these safety properties on the model\, e.g.\, to account for paramete
 r variations. Computing a finite number of system behaviors via simulation
  is not sufficient to guarantee safety properties. With a reachability ana
 lysis one...
DTSTART:20120529T150000
DTEND:20120529T170000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Rajarshi RAY - Reachability Analysis of Hybrid Systems Using Suppor
 t Functions
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3303UwhxFv@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 25 May 2012 - salle A. Turing CE4
= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00
  - Salle : salle A. Turing CE4

Johannes Reich\, SPA


« A System Perspective o
 n Processes and Their Interactions. » 

Abstract:

The starting point is a vie
 w of our social world as an open network of nondeterministic interactions 
 between possibly deterministic systems. From an engineering perspective on
 e essential question becomes  how we can describe local parts of these net
 works without running into the unfulfillable requirement to describe the n
 etwork as a whole.\n \nTwo different perspectives naturally arise: an inte
 raction centric\, providing the local borders and a...
DTSTART:20120525T140000
DTEND:20120525T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Johannes Reich - A System Perspective on Processes and Their Intera
 ctions.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3304kxzB0u@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 11 May 2012 - salle A. Turing CE4
= = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:00
  - Salle : salle A. Turing CE4

Xavier Urbain\, ENSIIE
http://www.ensiie.fr/~
 urbain/

« Démonstration automatique : techniques\, outils et certification.
  » 

Résumé :

Notre objectif est de permettre la vérification de programme à 
 l'aide de méthodes fondées sur la preuve et aussi automatisées que possibl
 e. Je me concentrerai sur la preuve d'une propriété : la *terminaison*\, d
 ans des formalismes à base de récriture.\n  J'esquisserai tout d'abord un 
 panel de techniques pour la preuve de terminaison\, adaptées à différentes
  extensions qui\, de proche en proche\, mènent...
DTSTART:20120511T100000
DTEND:20120511T120000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Xavier Urbain - Démonstration automatique : techniques\, outils et 
 certification.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3304WCu5vw@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday  9 May 2012 - salle A. Turing CE4
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : salle A. Turing CE4

Pierre Ganty\, IMDEA (Madrid)
http://softw
 are.imdea.org/people/pierre.ganty/

« A Perfect Model for Bounded Verificati
 on (A Perfect Model for Bounded Verification) » 

Résumé :

A class of languag
 es C is perfect if it is closed under\nBoolean operations and the emptines
 s problem is decidable. Perfect\nlanguage classes are the basis for the au
 tomata-theoretic approach to\nmodel checking: a system is correct if the l
 anguage generated by the\nsystem is disjoint from the language of bad trac
 es. Regular languages\nare perfect\, but because the...
DTSTART:20120509T140000
DTEND:20120509T150000
DURATION:PT1H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Pierre Ganty - A Perfect Model for Bounded Verification (A Perfect 
 Model for Bounded Verification)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33057EFvb4@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  5 April 2012 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle A. Turing CE4

Laura Kovacs\, Technical University of V
 ienna
http://www.complang.tuwien.ac.at/lkovacs/

« Playing in the Grey Area o
 f Proofs » 

Abstract:

nterpolation is an important technique in verification
  and static\nanalysis of programs. In particular\, interpolants extracted 
 from\nproofs of various properties are used in invariant generation and\nb
 ounded model checking. A number of recent papers studies\ninterpolation in
  various theories and also extraction of smaller\ninterpolants from proofs
 . In particular\, there are several algorithms\nfor...
DTSTART:20120405T140000
DTEND:20120405T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Laura Kovacs - Playing in the Grey Area of Proofs
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3306sAdSbX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 22 March 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nOded Maler\, VERIMAG\nhttp://w
 ww-verimag.imag.fr/~maler/\n\n« Performance Evaluation of Schedulers in a 
 Probabilistic Setting » \n\nAbstract:\n\nWe show how to evaluate the perfo
 rmance of solutions to finite-horizon scheduling problems where task durat
 ions are specified by bounded uniform distributions. Our computational tec
 hnique\, based on computing the volumes of zones\, constitutes a contribut
 ion to the computational study of scheduling under uncertainty and stochas
 tic systems in general.\n\nJoint work with Kim Larsen\, Bruce Krogh\, Mari
 us Bozga and...
DTSTART:20120322T140000
DTEND:20120322T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Oded Maler - Performance Evaluation of Schedulers in a Probabilisti
 c Setting
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3307gBbPi0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday 12 March 2012 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nNicolas Berthier\, Université de Grenoble\nhttp://www-verimag.ima
 g.fr/~berthier/\n\n« Programmation synchrone de pilotes de périphériques p
 our un contrôle global de ressources dans les systèmes embarqués (Synchron
 ous Programming of Device Drivers for Global Resource Control in Embedded 
 Systems) » \n\nRésumé :\n\nLe travail présenté porte sur la conception de 
 logiciels pour systèmes embarqués. Outre les contraintes de programmation 
 provenant des faibles quantité de mémoire et capacité de calcul\, ces plat
 es-formes matérielles ne disposent parfois que de peu d'énergie...
DTSTART:20120312T140000
DTEND:20120312T170000
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:Nicolas Berthier - Programmation synchrone de pilotes de périphériq
 ues pour un contrôle global de ressources dans les systèmes embarqués (Syn
 chronous Programming of Device Drivers for Global Resource Control in Embe
 dded Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33072JvmWI@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  8 March 2012 - salle A. Turing CE4
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : salle A. Turing CE4

Goran Frehse\, Verimag


« Safety Analysis 
 of Hybrid Systems with SpaceEx » 

Abstract:

In a variety of application doma
 ins such as embedded and cyber-physical systems\, model-based design relie
 s on models that incorporate time-driven as well as event-driven behavior.
  These so-called hybrid systems are difficult to analyze\, because even sm
 all errors in the analysis algorithm can lead to qualitatively different b
 ehaviors.\nWe verify safety properties of hybrid systems by computing thei
 r reachable states. Using set-based computations allows us...
DTSTART:20120308T140000
DTEND:20120308T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Goran Frehse - Safety Analysis of Hybrid Systems with SpaceEx
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3308AUlL3A@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday  5 March 2012 - salle A. Turing CE4
= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:
 00 - Salle : salle A. Turing CE4

Sriram Rajamani\, Microsoft Research
http:/
 /research.microsoft.com/en-us/people/sriram/

« Program Analysis and Machine
  Learning: A Win-Win Deal  » 

Abstract:

We give an account of our experience
 s working at the intersection of two fields: program analysis and machine 
 learning.  In particular\, we show that machine learning can be used to in
 fer annotations for program analysis tools\, and that program analysis tec
 hniques can be used to improve the efficiency of machine learning tools.\n
 \nEvery program analysis tool needs annotations. We show...
DTSTART:20120305T140000
DTEND:20120305T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Sriram Rajamani - Program Analysis and Machine Learning: A Win-Win 
 Deal 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33090owbTe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 March 2012 - salle A. Turing C
 E4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : salle A. Turing CE4\n\nJerôme Leroux \, LABRI \nhttp:
 //www.labri.fr/perso/leroux/ \n\n« Vector Addition System Reachability Pro
 blem  » \n\nAbstract:\n\nThe reachability problem for Vector Addition Syst
 ems (VASs) is a central problem of net theory. The general problem is know
 n decidable by algorithms exclusively based on the classical Kosaraju-Lamb
 ert-Mayr-Sacerdote-Tenney decomposition (KLMTS decomposition). Recently fr
 om this decomposition\, we deduced that a final configuration is not reach
 able from an initial one if and only if there exists a Presburger inductiv
 e...
DTSTART:20120301T140000
DTEND:20120301T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jerôme Leroux  - Vector Addition System Reachability Problem 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3309MdEln1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 23 February 2012 - salle A. Turin
 g CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : salle A. Turing CE4\n\nFranck Petit\, LIP6\nhttp:/
 /pagesperso-systeme.lip6.fr/Franck.Petit/\n\n« Strength of Stabilization v
 s. Amount of Resources » \n\nAbstract:\n\nThe amount of resources used to 
 perform a given task is a key feature in distributed systems\, especially 
 when resource embedding is very costly.  Ad hoc and sensors networks belon
 g to this category of distributed systems because they are supposed to be 
 made of low-power tiny devices\, requiring the smallest amount of resource
 s as possible.  Furthermore\, such networks are expected to be larger and 
 larger\,...
DTSTART:20120223T140000
DTEND:20120223T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Franck Petit - Strength of Stabilization vs. Amount of Resources
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3310s6uXKR@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 10 February 2012 - salle A. Turing 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : salle A. Turing CE4\n\nLaurent George\, INRIA Rocque
 ncourt / AOSTE Team INRIA \nhttp://www-roc.inria.fr/who/Laurent.George/\n
 \n« Robustesse temporelle dans les systèmes embarqués mono et multiprocess
 eur » \n\nRésumé :\n\nLe respect de contraintes temporelles strictes dans 
 un système temps réel peut être garanti par l’établissement de conditions 
 de faisabilité 'pires cas'. Ces conditions de faisabilité sont établies po
 ur un système temps réel spécifié par différents modèles (modèle de taches
  exécutées\, modèle d'ordonnancement\, modèle...
DTSTART:20120210T140000
DTEND:20120210T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Laurent George - Robustesse temporelle dans les systèmes embarqués 
 mono et multiprocesseur
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3311BzVOKj@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 February 2012 - salle A. Turing 
 CE4
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  =
14:00 - Salle : salle A. Turing CE4

Jan Olaf Blech\, Fortiss
http://www.jb
 lech.de/

« Proof Assistant Based Certification for Modeling Languages and i
 ts Application to PLC Development » 

Abstract:

This talk gives an overview o
 n our work on proof assistant based\ncertification of system models: We au
 tomatically generate system model\nrepresentations for Coq out of Eclipse 
 based modeling tools and\nprovide support for verification work on this.  
 The focus of the talk\nis on work for Programmable Logic Controllers (PLC)
 . PLC are widely\nused in embedded systems for the...
DTSTART:20120209T140000
DTEND:20120209T160000
DURATION:PT2H0M0S
LOCATION:salle A. Turing CE4
SUMMARY:Jan Olaf Blech - Proof Assistant Based Certification for Modeling L
 anguages and its Application to PLC Development
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3312KMduXP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 January 2012 - CTL\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : CTL\n\nTom Henzinger\, IST-Austria\nhttp://www.ist.ac.at/research/r
 esearch-groups/henzinger-group/\n\n« Quantitative Reactive Modeling » \n\n
 Abstract:\n\nFormal verification aims to improve the quality of hardware a
 nd software by detecting errors before they do harm. At the basis of forma
 l verification lies the logical notion of correctness\, which purports to 
 capture whether or not a circuit or program behaves as desired. We suggest
  that the boolean partition into correct and incorrect systems falls short
  of the practical need to assess the behavior of hardware and software in 
 a more...
DTSTART:20120126T140000
DTEND:20120126T150000
DURATION:PT1H0M0S
LOCATION:CTL
SUMMARY:Tom Henzinger - Quantitative Reactive Modeling
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3313OiA2pG@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 January 2012 - Grande Salle de V
 ERIMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =
14:00 - Salle : Grande Salle de VERIMAG

Christian von Essen\, Verimag


«
  Synthesizing Efficient Controllers » 

Abstract:

In many situations\, we are
  interested in controllers that implement a good trade-off between conflic
 ting objectives. Examples of conflicting objectives are the speed of a car
  versus its fuel consumption\, or the transmission rate of a wireless devi
 ce versus its energy consumption. In both cases\, we aim for a system that
  efficiently uses its resources.\nIn this talk I show how to automatically
  construct efficient controllers. We provide a specification...
DTSTART:20120119T140000
DTEND:20120119T143000
DURATION:PT0H30M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Christian von Essen - Synthesizing Efficient Controllers
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3313zgvGB8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday 12 January 2012 - CTL
= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : 
 CTL

Marion DAUBIGNARD\, VERIMAG


« Formalisation de preuves de sécurité concr
 ète (Formal Methods for Concrete Security Proofs) » 

Abstract:

In this thesi
 s\, we address the lack of formalisms to carry out \nconcrete security pro
 ofs. \nOur contributions are threefold.\nFirst\, we present a logic\, name
 d Computational Indistinguishability \nLogic (CIL)\, for reasoning about c
 ryptographic systems. It consists \nin a small set of\nrules capturing rea
 soning principles common to many \nproofs.\nTheir formalization relies\non
  classic tools such as bisimulation\nrelations and...
DTSTART:20120112T140000
DTEND:20120112T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Marion DAUBIGNARD - Formalisation de preuves de sécurité concrète (
 Formal Methods for Concrete Security Proofs)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3314v7FVFj@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 18 November 2011 - Ensimag\, Amphi E
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Ensimag\, Amphi E\n\nGiovanni Funchal\, Verimag/STMicro
 electronics\nhttp://funchal.github.com/\n\n« Contributions à la Modélisati
 on Transactionnelle des Systèmes-sur-Puce (Contributions to Transaction-Le
 vel Modeling of Systems-on-a-Chip) » \n\nRésumé :\n\nCette thèse porte sur
  la modélisation des systèmes-sur-puce au niveau transactionnel\, une appr
 oche connue sous le nom de prototypage virtuel. Les prototypes virtuels so
 nt d'un grand intérêt industriel parce qu'ils permettent de démarrer certa
 ines activités (telles que le développement du logiciel embarqué) plus...
DTSTART:20111118T140000
DTEND:20111118T160000
DURATION:PT2H0M0S
LOCATION:Ensimag\, Amphi E
SUMMARY:Giovanni Funchal - Contributions à la Modélisation Transactionnelle
  des Systèmes-sur-Puce (Contributions to Transaction-Level Modeling of Sys
 tems-on-a-Chip)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3315xEiRrV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 14 November 2011 - Grande Salle de 
 CE4\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n14:00 - Salle : Grande Salle de CE4\n\nPhilippe Suter\, EPFL\nhttp:/
 /lara.epfl.ch/~psuter/\n\n« Sets with Cardinality Constraints in Satisfiab
 ility Modulo Theories » \n\nRésumé :\n\n \n\nAbstract:\n\nBoolean Algebra 
 with Presburger Arithmetic (BAPA) is a decidable logic that can express co
 nstraints on sets of elements and their cardinalities. Problems from verif
 ication of complex properties of software often contain fragments that bel
 ong to quantifier-free BAPA (QFBAPA). In contrast to many other NP-complet
 e problems (such as quantifier-free first-order logic or linear arithmetic
 )\, the...
DTSTART:20111114T140000
DTEND:20111114T153000
DURATION:PT1H30M0S
LOCATION:Grande Salle de CE4
SUMMARY:Philippe Suter - Sets with Cardinality Constraints in Satisfiabilit
 y Modulo Theories
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3316VtFaHu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Tuesday  4 October 2011 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nJulien Legriel\, VERIMAG\nhttp://www-verimag.imag.fr/~legriel/
 \n\n« Optimisation multi-critère et application aux systèmes multi-process
 eurs embarqués (Multi-Criteria Optimization and its Application to Multi-P
 rocessor Embedded Systems ) » \n\nRésumé :\n\nDans cette thèse nous dévelo
 ppons de nouvelles techniques pour résoudre les problèmes d'optimisation m
 ulti-critère. Ces problèmes se posent naturellement dans de nombreux domai
 nes d'application (sinon tous) où les choix sont évalués selon différents 
 critères conflictuels (coûts et performance par exemple)....
DTSTART:20111004T140000
DTEND:20111004T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Julien Legriel - Optimisation multi-critère et application aux syst
 èmes multi-processeurs embarqués (Multi-Criteria Optimization and its Appl
 ication to Multi-Processor Embedded Systems )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3317LOJaMm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 15 September 2011 - Grande Salle de
  VERIMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = =
14:00 - Salle : Grande Salle de VERIMAG

Balaji Raman\, DCS\, Verimag
 

« On Buffering with Stochastic Guarantees in Resource-Constrained Media Pl
 ayers » 

Abstract:

Playout delay or buffering are commonly used in the case 
 of streaming multimedia to ensure smooth playout. A large delay\, however\
 , is required for promising a high quality in display.\nSuch significant d
 elays consume huge on-chip memory. We show that when the constraints on ou
 tput are slightly relaxed\, the playout delay needed can be reduced to a n
 egligible value with no perceivable loss in video...
DTSTART:20110915T140000
DTEND:20110915T160000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Balaji Raman - On Buffering with Stochastic Guarantees in Resource-
 Constrained Media Players
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3317cre8or@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 21 July 2011 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nPierre Ganty\, IMDEA\nhttp://software.imdea.org/people/pierre.g
 anty/\n\n« Pattern-based Verification for Multithreaded Programs » \n\nAbs
 tract:\n\nPattern-based verification checks the correctness of the program
  executions that follow a given pattern\, a regular expression over the al
 phabet of program transitions of the form w1* ... wn*. For multithreaded p
 rograms\, the alphabet of the pattern is given by the synchronization oper
 ations between threads. After introducing the model\, we study the complex
 ity of pattern-based verification for abstracted multithreaded. While unre
 stricted...
DTSTART:20110721T140000
DTEND:20110721T150000
DURATION:PT1H0M0S
LOCATION:CTL
SUMMARY:Pierre Ganty - Pattern-based Verification for Multithreaded Program
 s
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3318c7kM0P@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 30 June 2011 - CTL
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CT
 L

Nathalie Bertrand\, IRISA
http://www.irisa.fr/prive/nbertran/

« Determinizi
 ng timed automata. » 

Abstract:

Timed automata are frequently used to model 
 real-time systems. Essentially\ntimed automata are an extension of finite 
 automata with guards and resets of\ncontinuous variables (called clocks) e
 volving at the same pace. They are\nextensively used in the context of val
 idation of real-time systems. One of\nthe reasons for this popularity is t
 hat\, despite the fact that they\nrepresent infinite state systems\, their
  reachability is decidable\, thanks to\nthe construction of...
DTSTART:20110630T140000
DTEND:20110630T150000
DURATION:PT1H0M0S
LOCATION:CTL
SUMMARY:Nathalie Bertrand - Determinizing timed automata.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3319lomx5r@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 28 June 2011 - CTL
= = = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CTL
 

Francesco Logozzo\, Microsoft Research
http://research.microsoft.com/en-us/
 people/logozzo/

« Practical program verification for the working programmer
  with CodeContracts and Abstract Interpretation » 

Abstract:

In this talk I 
 will present Clousot\, an abstract interpretation-based static analyzer to
  be used as verifier for the CodeContracts.\nClousot is routinely used eve
 ry day by many .NET programmers.\n\nIn the first part of the talk I will r
 ecall what contracts are (essentially preconditions\, postconditions and o
 bject invariants)\, why they are almost universally accepted...
DTSTART:20110628T140000
DTEND:20110628T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Francesco Logozzo - Practical program verification for the working 
 programmer with CodeContracts and Abstract Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3320dPLUuh@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Tuesday 21 June 2011 - Amphi CTL
= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle 
 : Amphi CTL

VASSILIKI SFYRLA\, VERIMAG/UJF


« Modélisation des Systèmes Synch
 rones en BIP (Modeling Synchronous Systems in BIP) » 

Abstract:

    A centra
 l idea in systems engineering is that complex systems are built by assembl
 ing com-\nponents. Components have different characteristics\, from a larg
 e variety of viewpoints\, each\nhighlighting different dimensions of a sys
 tem. A central problem is the meaningful composition\nof heterogeneous com
 ponents to ensure their correct interoperation. A fundamental source of\nh
 eterogeneity is the composition of subsystems with...
DTSTART:20110621T140000
DTEND:20110621T170000
DURATION:PT3H0M0S
LOCATION:Amphi CTL
SUMMARY:VASSILIKI SFYRLA - Modélisation des Systèmes Synchrones en BIP (Mod
 eling Synchronous Systems in BIP)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3320siAWbB@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 May 2011 - Grande Salle de VER
 IMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nJannik Dreier\, VERIMAG
 \nhttp://www-verimag.imag.fr/~dreier/\n\n« Privacy Properties for Voting P
 rotocols: The completed picture » \n\nAbstract:\n\nExisting formal definit
 ions of privacy properties for voting protocols such as Coercion-Resistanc
 e or Receipt-Freeness suffer from having been tailored to a specific type 
 of protocol. We propose a new family of privacy notions to unify these def
 initions and accommodate more general types of protocols\, including proto
 cols supporting multiple votes. At the same time\, we extend the threat mo
 del to...
DTSTART:20110526T140000
DTEND:20110526T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Jannik Dreier - Privacy Properties for Voting Protocols: The comple
 ted picture
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3321DnfVG2@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 19 May 2011 - Grande Salle de VERIM
 AG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
14:00 - Salle : Grande Salle de VERIMAG

Viktor  Kuncak\, EPFL
http://lara.e
 pfl.ch/~kuncak/

« Towards Implicit Programming » 

Abstract:

\nWe argue for a 
 programming model where automated reasoning plays a key\nrole during (1) i
 nteractive program development\, (2) program\ncompilation\, and (3) progra
 m execution. I will focus on data\nmanipulation (as opposed to control). I
  outline our recent results in\ncomplete functional synthesis for integer 
 arithmetic\, which is a form\nof program compilation based on decision pro
 cedures. For program\ndevelopment\, I outline our ongoing...
DTSTART:20110519T140000
DTEND:20110519T160000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Viktor  Kuncak - Towards Implicit Programming
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3322AP31Ow@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Wednesday 18 May 2011 - CTL - Grande Salle
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n10:30 - Salle : CTL - Grande Salle\n\nJinyun XUE\, Institute of Softwar
 e\, Chinese Academy of Science\,\n \n\n« PAR Method and PAR Platform for D
 eveloping Reliable Software and Its New Development » \n\nAbstract:\n\nIt 
 is a challenging task of computer scientists for increasing the reliabilit
 y of software and efficiency of developing software. For answering the cha
 llenge\, we are developing the PAR method and its supporting platform\, ca
 lled PAR platform，that is a long-term research project supported by a seri
 es of research foundations of China. PAR method and PAR platform consists 
 of PAR...
DTSTART:20110518T103000
DTEND:20110518T113000
DURATION:PT1H0M0S
LOCATION:CTL - Grande Salle
SUMMARY:Jinyun XUE - PAR Method and PAR Platform for Developing Reliable So
 ftware and Its New Development
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3322rVer2F@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Wednesday 16 March 2011 - Grande Salle de VE
 RIMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =
15:30 - Salle : Grande Salle de VERIMAG

Fabio Somenzi\, University of C
 olorado in Boulder
http://vlsi.colorado.edu/~fabio/

« Clause Manipulation fo
 r Faster Satisfiability » 

Abstract:

Propositional Satisfiability solvers us
 ed in verification are mostly\nbased on backtracking search and read formu
 lae in Conjunctive Normal\nForm.  Which formula is chosen to represent a f
 unction has great\nimpact on solution time.  Therefore\, various technique
 s have been\ndevised to either preprocess the input formula or modify it\n
 during the search.  In this talk\, we review existing...
DTSTART:20110316T153000
DTEND:20110316T163000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Fabio Somenzi - Clause Manipulation for Faster Satisfiability
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33232U5tNj@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  3 March 2011 - Grande Salle de VER
 IMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : Grande Salle de VERIMAG

Hubert Garavel\, INRIA
http://vas
 y.inria.fr

« CADP 2010: A Toolbox for the Construction and Analysis of Dist
 ributed Processe » 

Abstract:

CADP (Construction and Analysis of Distributed
  Processes) is a comprehensive\nsoftware toolbox that implements the resul
 ts of concurrency theory. Started\nin\nthe mid 80s\, CADP has been continu
 ously developed by adding new tools and\nenhancing existing ones. Today\, 
 CADP benefits from a worldwide user\ncommunity\,\nboth in academia and ind
 ustry. This talk presents the latest release...
DTSTART:20110303T140000
DTEND:20110303T160000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Hubert Garavel - CADP 2010: A Toolbox for the Construction and Anal
 ysis of Distributed Processe
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3324LTx3dJ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Thursday  3 February 2011 - CTL
= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle :
  CTL

IMENE BEN HAFAIEDH\, VERIMAG-UJF
http://www-verimag.imag.fr/~benhfaie/

«
  Component-based Systems: from Design to Implementation » 

Abstract:

The goa
 l of the thesis is to provide theory\, methods and tools for the design an
 d implementation\nof component-based systems.\nTo master the complexity of
  systems of components\, we first propose a contract-based design and veri
 fication approach which is both compositional and incremental. Then we pro
 vide a distributed implementation of these systems allowing to preserve so
 me global properties.\nThe proposed verification approach...
DTSTART:20110203T140000
DTEND:20110203T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:IMENE BEN HAFAIEDH - Component-based Systems: from Design to Implem
 entation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3325czv0E7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday 21 January 2011 - CTL
= = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = =
10:30 - Salle : CT
 L

Sophie Quinton\, Verimag / UJF
http://www-verimag.imag.fr/~quinton/

« Desig
 n\, verification and implementation of systems of components » 

Abstract:

In
  this thesis\, we have studied how component-based systems are designed\, 
 verified and then implemented. We have focused in particular on formalisms
  involving complex interactions\, where connectors are not only used to tr
 ansfer data but also play a role in the synchronization of components.\n\n
 1. DESIGN AND VERIFICATION\nContracts are emerging as a concept of choice 
 when systems are designed by teams working independently....
DTSTART:20110121T103000
DTEND:20110121T123000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Sophie Quinton - Design\, verification and implementation of system
 s of components
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3325ejWLiN@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Monday 20 December 2010 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nJohn Plaice\, University of New South Wales\nhttp://www.cse.unsw.
 edu.au/~plaice/\n\n« La programmation Cartésienne (Habilitation à Diriger 
 des Recherches) (Cartesian Programming (HDR defence)) » \n\nAbstract:\n\nW
 e present a new form of declarative programming inspired by the Cartesian 
 coordinate sys-\ntem. This Cartesian programming\, illustrated by the Tran
 sLucid language\, assumes that all\nprogrammed entities vary with respect 
 to all possible dimensions\, or degrees of freedom. This\nmodel is immedia
 tely applicable to areas of science\, engineering and business in which wo
 rking\nwith...
DTSTART:20101220T140000
DTEND:20101220T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:John Plaice - La programmation Cartésienne (Habilitation à Diriger 
 des Recherches) (Cartesian Programming (HDR defence))
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3326c0LCAD@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 18 November 2010 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nAntoine GERBAUD\, S
 ynchrone/Asynchrone\n\n\n« Le modèle du marcheur pour les réseaux d'intera
 ctions (Walker model for complex networks) » \n\nRésumé :\n\ntba\n\n\n\n\n
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
 \nOther seminars at VERIMAG - http://www-verimag.imag.fr/Verimag-Seminars\
 ,62.html?lang=en\nLocation/Vision: Grande Salle de VERIMAG - http://www-ve
 rimag.imag.fr/Plan-d-acces.html?lang=fr\nTo unsubscribe\, reply to this ma
 il with UNSUBSCRIBE in the subject\n= = = = = = = = = = = = = = = = = = = 
 = = = = = = = =...
DTSTART:20101118T140000
DTEND:20101118T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Antoine GERBAUD - Le modèle du marcheur pour les réseaux d'interact
 ions (Walker model for complex networks)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33272sDbn0@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday  5 November 2010 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sa
 lle : CTL\n\nMoshe Vardi\, Rice University\nhttp://www.cs.rice.edu/~vardi/
 \n\n« From Philosophical to Industrial Logics  » \n\nAbstract:\n\nOne of t
 he surprising developments in the area of program verification is how seve
 ral ideas introduced by logicians in the first part of the 20th century en
 ded up yielding at the start of the 21st century industry-standard propert
 y-specification languages called PSL and SVA. This development was enabled
  by the equally unlikely transformation of the mathematical machinery of a
 utomata on infinite words\, introduced in the early 1960s for second-order
 ...
DTSTART:20101105T140000
DTEND:20101105T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Moshe Vardi - From Philosophical to Industrial Logics 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3328NTs5UM@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 28 October 2010 - CTL\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sa
 lle : CTL\n\nMohamad Jaber\, VERIMAG\nhttp://www-verimag.imag.fr/~jaber\n
 \n« Centralized and Distributed Implementations of Correct-by-construction
  Component-based Systems by using Source-to-source Transformations in BIP 
 » \n\nAbstract:\n\nThe thesis studies theory and methods for generating au
 tomatically centralized and distributed implementations from a high-level 
 model of an application software in BIP. BIP (Behavior\, Interaction\, Pri
 ority) is a component framework with formal operational semantics. Coordin
 ation between components is achieved by using multiparty interactions and 
 dynamic...
DTSTART:20101028T133000
DTEND:20101028T160000
DURATION:PT2H30M0S
LOCATION:CTL
SUMMARY:Mohamad Jaber - Centralized and Distributed Implementations of Corr
 ect-by-construction Component-based Systems by using Source-to-source Tran
 sformations in BIP
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3328Dule6N@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 22 September 2010 - Maison Jean Kun
 tzmann
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =
15:00 - Salle : Maison Jean Kuntzmann

Mathias Péron\, UJF / VERIMAG
htt
 p://www-verimag.imag.fr/~peron/

« Contributions à l’analyse statique de pro
 grammes manipulant des tableaux (Contributions to the Static Analysis of P
 rograms Handling Arrays) » 

Résumé :

Si l'analyse automatique des accès aux 
 tableaux a été largement\nétudiée\, on trouve très peu de résultats convai
 ncants sur l'analyse\ndu contenu des tableaux.\n\nPour une telle analyse\,
  les analyses numériques sont centrales. \nNotamment\, si l'on découvre l'
 invariant i <> j\, on évite d'affaiblir\nla...
DTSTART:20100922T150000
DTEND:20100922T173000
DURATION:PT2H30M0S
LOCATION:Maison Jean Kuntzmann
SUMMARY:Mathias Péron - Contributions à l’analyse statique de programmes ma
 nipulant des tableaux (Contributions to the Static Analysis of Programs Ha
 ndling Arrays)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3329GvBhPC@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday 15 September 2010 - CTL\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : CTL\n\nTayeb BOUHADIBA\, Verimag\nhttp://www-verimag.imag.fr/~bou
 hadib/\n\n« 42\, Une Approche à Composants pour le prototypage Virtuel des
  Systèmes Embarqués Hétérogènes  (42\,  A Component-Based Approach to Virt
 ual  Prototyping of Heterogeneous Embedded Systems ) » \n\nRésumé :\n\nLes
  travaux présentés dans cette thèse portent sur le prototypage virtuel des
  systèmes embarqués hétérogènes. La conception d'un système embarqué est c
 omplexe\, et trouver une solution optimale est difficile. L'intérêt du pro
 totypage virtuel est de fournir un modèle exécutable de ce...
DTSTART:20100915T140000
DTEND:20100915T170000
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:Tayeb BOUHADIBA - 42\, Une Approche à Composants pour le prototypag
 e Virtuel des Systèmes Embarqués Hétérogènes  (42\,  A Component-Based App
 roach to Virtual  Prototyping of Heterogeneous Embedded Systems )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3330Mz5Jiu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Friday 27 August 2010 - MJK\n= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - Salle
  : MJK\n\nManuel Garnacho\, VERIMAG - DCS\n\n\n« Automatisation de la cert
 ification formelle de systèmes critiques par instrumentation d\\\'interpré
 teurs abstraits (Automatic and formal certification of critical systems by
  instrumentation of abstract interpreters) » \n\nRésumé :\n\nLes travaux m
 enés dans cette thèse portent sur la certification de programmes impératif
 s utilisés dans des applications critiques. Les certificats établissent la
  validité des propriétés sémantiques des programmes. Ils sont produits sou
 s forme de preuves déductives vérifiables par machine. Le défi...
DTSTART:20100827T100000
DTEND:20100827T120000
DURATION:PT2H0M0S
LOCATION:MJK
SUMMARY:Manuel Garnacho - Automatisation de la certification formelle de sy
 stèmes critiques par instrumentation d\\\'interpréteurs abstraits (Automat
 ic and formal certification of critical systems by instrumentation of abst
 ract interpreters)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3331uLglwV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 26 August 2010 - Grande Salle de 
 VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = =\n19:00 - Salle : Grande Salle de VERIMAG\n\nSébastien Bourdeauduc
 q\, Sharism at Work\nhttp://www.sharism.cc/\n\n« Milkymist : un System-on-
 Chip libre et orienté video temps réel » \n\nRésumé :\n\nAvec la diminutio
 n des coûts et la large disponibilité de FPGAs relativement denses et perf
 ormants\, il devient aisé pour les particuliers de concevoir des puces num
 ériques\, et de repousser ainsi les limites du libre vers le niveau de la 
 conception électronique numérique. Milkymist\, l\'un des plus gros projets
  actuels d’électronique numérique libre\, développe un...
DTSTART:20100826T190000
DTEND:20100826T200000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Sébastien Bourdeauducq - Milkymist : un System-on-Chip libre et ori
 enté video temps réel
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3331IoLPBa@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  8 July 2010 - Grande Salle de VE
 RIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nSophie Quinton\, Verima
 g\nhttp://www-verimag.imag.fr/~quinton/\n\n« Achieving distributed control
  through model checking » \n\nAbstract:\n\nWe apply model checking of know
 ledge properties to the design of distributed controllers that enforce glo
 bal constraints on concurrent systems. We calculate when processes can dec
 ide\, autonomously\, to take or block an action so that the global constra
 int will not be violated. When the separate processes cannot make this dec
 ision alone\, it may be possible to temporarily coordinate several process
 es in...
DTSTART:20100708T140000
DTEND:20100708T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Sophie Quinton - Achieving distributed control through model checki
 ng
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33324RC1S7@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  1 July 2010 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sall
 e : CTL\n\nJocelyne Troccaz\, CNRS/TIMC\nhttp://membres-timc.imag.fr/Jocel
 yne.Troccaz/\n\n« TBA » \n\nRésumé :\n\nL'équipe GMCAO (Gestes Médico-Chir
 urgicaux Assistés par Ordinateur) développe des systèmes informatisés d'as
 sistance à la réalisation de gestes diagnostiques et thérapeutiques. Le pl
 us souvent ces systèmes intègrent une phase de planification basée sur une
  imagerie médicale pré-opératoire (par exemple scanner ou IRM)\; ensuite l
 ors de la réalisation du geste des données per-opératoires (per = pendant)
  sont acquises et après recalage(*) permettent de transférer...
DTSTART:20100701T140000
DTEND:20100701T160000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Jocelyne Troccaz - TBA
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3333FJkO8j@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Friday 18 June 2010 - Grande Salle de VERI
 MAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = =\n10:00 - Salle : Grande Salle de VERIMAG\n\nArshia Cont\, IRCAM\nhttp
 ://imtr.ircam.fr/imtr/Arshia_Cont\n\n« Antescofo : A performance-synchrono
 us language for computer music » \n\nAbstract:\n\nWithin centuries of evol
 ution\, musical notation has become a fascinating mean for abstraction of 
 time and transcription of thought. A musical score transports the conceive
 d structure from the compositional ideas towards various interpretations. 
 The main particularity of interest here is its power of abstraction in des
 cribing complex\, parallel\, hierarchical and multiple-clock processes at 
 the time...
DTSTART:20100618T100000
DTEND:20100618T120000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arshia Cont - Antescofo : A performance-synchronous language for co
 mputer music
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3334uP9tc5@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 17 June 2010 - Grande Salle de VE
 RIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nKarel Heurtefeux\, Sync
 hrone\nhttp://www-verimag.imag.fr/~heurtefe/\n\n« Localisation qualitative
  appliquée au routage et à l\'accès au canal dans les réseaux de capteurs 
 (Qualitative localization applied to routing and MAC layer in Wireless Sen
 sor Networks) » \n\nRésumé :\n\nLes réseaux de capteurs sont constitués de
  centaines d\'entités électroniques communiquant sans fil et forment ainsi
  des réseaux étendus\, denses et contraints en énergie. Dans ce contexte\,
  il est souvent utile d\'avoir une information sur la proximité des...
DTSTART:20100617T140000
DTEND:20100617T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Karel Heurtefeux - Localisation qualitative appliquée au routage et
  à l\'accès au canal dans les réseaux de capteurs (Qualitative localizatio
 n applied to routing and MAC layer in Wireless Sensor Networks)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-333432w03l@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 27 May 2010 - CTL\n= = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Salle 
 : CTL\n\nThanh Hung NGUYEN\, Verimag\nhttp://www-verimag.imag.fr/~thnguyen
 \n\n« Vérification Constructive des Systèmes à base de Composants (Constru
 ctive Verification for Component-based Systems) » \n\nAbstract:\n\nThe goa
 l of the thesis is to develop theory\, methods and tools for the compositi
 onal and incremental verification for component-based systems. We propose 
 a compositional verification method for proving safety properties. The met
 hod is based on the use of two kinds of invariants: component invariants w
 hich express local aspects of systems and interaction invariants which...
DTSTART:20100527T140000
DTEND:20100527T170000
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:Thanh Hung NGUYEN - Vérification Constructive des Systèmes à base d
 e Composants (Constructive Verification for Component-based Systems)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33358EskZm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIMAG
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 0:00 - Salle : Grande Salle de VERIMAG

Christophe JOUBERT\, Technical Unive
 rsity of Valencia\, Spain


« Datalog-based Program Analysis with BES and RWL
  » 

Abstract:

In this talk\, we present two powerful\, fully automated metho
 ds to\nevaluate Datalog queries in the context of object-oriented program
 \nanalyses: the first approach transforms the Datalog program in an\nimpli
 cit Boolean Equation Systems (BESs) solved by existing general\npurpose ve
 rification toolboxes\, such as CADP\, providing local BES\nresolutions wit
 h linear-time complexity\; the second approach\ntransforms...
DTSTART:20100510T100000
DTEND:20100510T110000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Christophe JOUBERT - Datalog-based Program Analysis with BES and RW
 L
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3336VxODHe@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n15:15 - Salle : Grande Salle de VERIMAG\n\nArnaud Sangnier\, DISI\, U
 niversità di Genova \nhttp://www.disi.unige.it/person/SangnierA/\n\n« Weak
  Time Petri Nets Strike back!  » \n\nAbstract:\n\nWe consider the model of
  Time Petri Nets where time is associated with transitions. Two semantics 
 for time elapsing can be considered: the strong one\, for which all transi
 tions are urgent\, and the weak one\, for which time can elapse arbitraril
 y. It is well known that many verification problems such as the marking re
 achability are undecidable with the strong semantics. In this talk\, we fo
 cus on Time...
DTSTART:20100510T151500
DTEND:20100510T161500
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arnaud Sangnier - Weak Time Petri Nets Strike back! 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3337lzXcLG@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIM
 AG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nNadia El Mrabet\, GREYC al
 go team - Université de Caen\n\n\n« Arithmétique des couplages\, performan
 ce et résistance aux attaques par canaux cachés  » \n\nRésumé :\n\nMes tra
 vaux portent sur l'étude des couplages\, et plus particulièrement leur uti
 lisation en cryptographie. Mes premiers travaux ont portés sur l'arithméti
 que des couplages à travers une comparaison des complexités en nombre d'op
 érations des couplages de Weil et Tate. Puis je me suis intéressée à l'étu
 de de l'arithmétique utile pour les couplages. Un de mes travaux...
DTSTART:20100510T140000
DTEND:20100510T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nadia El Mrabet - Arithmétique des couplages\, performance et résis
 tance aux attaques par canaux cachés 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3337C024Aw@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Monday 10 May 2010 - Grande Salle de VERIMAG
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 6:30 - Salle : Grande Salle de VERIMAG

Regis Gascon\, Inria Sophia-Antipoli
 s


«   (Verification of quantitative properties on constraint automata ) » 

A
 bstract:

Traditional temporal logics like LTL or CTL* use propositional var
 iables\nas atomic formulas.\nConsequently\, these logics allow only to sta
 te properties on the control\nlocations of the models.\nThey are not well 
 suited to state richer properties on the objects\n(data) that models can h
 andle:\nintergers (counters)\, reals (clocks)\, strings (stacks\, queues).
 ..\nIndeed\, this kind of\ndata are interpreted in infinite...
DTSTART:20100510T163000
DTEND:20100510T173000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Regis Gascon -   (Verification of quantitative properties on constr
 aint automata )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3338ZLERdm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  7 May 2010 - Grande Salle de VERIMAG
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 4:00 - Salle : Grande Salle de VERIMAG

Kevin Marquet\, Verimag


« Vérificatio
 n automatique de modèles de systèmes sur puce  » 

Résumé :

La modélisation d
 es systèmes sur puce permet de valider en avance de phase des architecture
 s matérielles. Lors de ce séminaire je présenterai mes travaux traitant de
  la vérification formelle et\nautomatique de programmes SystemC\, le stand
 ard en matière de modélisation. Je détaillerai comment une représentation 
 formelle peut être extraite d'un tel programme parallèle. Je décrirai les 
 avantages\nd'une forme exécutable et...
DTSTART:20100507T140000
DTEND:20100507T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Kevin Marquet - Vérification automatique de modèles de systèmes sur
  puce 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3339xrPFTt@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday  7 May 2010 - Grande Salle de VERIMAG
 
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
1
 5:15 - Salle : Grande Salle de VERIMAG

Alexandre DONZE\, verimag


« Conceptio
 n et analyse basée sur les modèles de systèmes hybrides: techniques par si
 mulations\, applications et perspectives (Model-based design and analysis 
 of hybrid systems:simulation-based techniques\, applications and perspecti
 ves) » 

Résumé :

Lors de ce séminaire\, je présenterai mes contributions pas
 sées\,\nprésentes et prévues dans le domaine de la vérification et de\nl'a
 nalyse des systèmes continus et hybrides\, en particulier en\nprésence de 
 dynamiques non-linéaires. Je rappellerai...
DTSTART:20100507T151500
DTEND:20100507T161500
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Alexandre DONZE - Conception et analyse basée sur les modèles de sy
 stèmes hybrides: techniques par simulations\, applications et perspectives
  (Model-based design and analysis of hybrid systems:simulation-based techn
 iques\, applications and perspectives)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3340RrFFEA@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 22 April 2010 - Grande Salle de VER
 IMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : Grande Salle de VERIMAG

Nikolay Kosmatov\, CEA - LISI


« L
 e traitement des alias internes dans l'outil de génération de tests PathCr
 awler (All-Paths Test Generation for Programs with Internal Aliases in Pat
 hCrawler) » 

Résumé :

Nous présentons le problème des alias dans le cadre de
  la méthode de\ngénération automatique de tests tous-les-chemins par la re
 cherche en\nprofondeur d'abord à l'aide de l'exécution symbolique en contr
 aintes.\n\nNous classons les alias en deux classes : les alias externes pr
 ésents au\npoint d'entrée dans la fonction...
DTSTART:20100422T140000
DTEND:20100422T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nikolay Kosmatov - Le traitement des alias internes dans l'outil de
  génération de tests PathCrawler (All-Paths Test Generation for Programs w
 ith Internal Aliases in PathCrawler)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3340H0fGHL@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Wednesday  7 April 2010 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sal
 le : CTL\n\nMohamed Yassin CHKOURI\, VERIMAG\nhttp://www-verimag.imag.fr/~
 chkouri/\n\n« Modélisation des systèmes temps-réel embarqués en utilisant 
 AADL pour la génération automatique d’applications formellement vérifiées 
 (Modelling real-time embedded systems using AADL for the automatic generat
 ion of applications formally verified) » \n\nRésumé :\n\nLe langage d’anal
 yse et de description d’architectures (AADL) fait l’objet d’un intérêt cro
 issant dans l’industrie des systèmes embarqués tempsréel. Il définit plusi
 eurs catégories de composants\, réparties en trois...
DTSTART:20100407T133000
DTEND:20100407T160000
DURATION:PT2H30M0S
LOCATION:CTL
SUMMARY:Mohamed Yassin CHKOURI - Modélisation des systèmes temps-réel embar
 qués en utilisant AADL pour la génération automatique d’applications forme
 llement vérifiées (Modelling real-time embedded systems using AADL for the
  automatic generation of applications formally verified)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3341WJUsf6@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  1 April 2010 - Grande Salle de VER
 IMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : Grande Salle de VERIMAG

Claire Maiza\, Compiler Design L
 ab\, Saarland University
http://rw4.cs.uni-saarland.de/people/burguiere.sht
 ml

« Static analysis of interferences in the cache memory in preemptive rea
 l-time systems » 

Abstract:

Hard real-time embedded systems require verifica
 tion of timing\nconstraints and thus estimation of upper-bounds on the exe
 cution time.\nHowever\, usual timing analyses assume programs to be execut
 ed with\nuninterrupted execution. Our aim is to broaden the scope of curre
 nt\ntiming analysis techniques to programs running on...
DTSTART:20100401T140000
DTEND:20100401T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Claire Maiza - Static analysis of interferences in the cache memory
  in preemptive real-time systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3342baGuJP@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Friday 19 March 2010 - Grande Salle de VERIM
 AG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =
10:00 - Salle : Grande Salle de VERIMAG

Nicolas Blanc\, ETH Zurich
http://w
 ww.cprover.org/scoot/

« Static Analysis for SystemC with Scoot: From Verifi
 cation to Simulation (Analyse statique de SystemC avec Scoot : de la Verif
 ication à la Simulation) » 

Abstract:

SYSTEMC is a description language for 
 computer systems that is based on C++.\nThe language is used for modeling 
 electronic devices at arbitrary\nlevels of abstraction.\nIn particular\, S
 ystemC can describe models with both hardware and\nsoftware aspects.\nAs t
 oday’s electronic designs are incredibly large and...
DTSTART:20100319T100000
DTEND:20100319T110000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Nicolas Blanc - Static Analysis for SystemC with Scoot: From Verifi
 cation to Simulation (Analyse statique de SystemC avec Scoot : de la Verif
 ication à la Simulation)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3343l7jJgD@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday  9 March 2010 - CTL\n= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - Sall
 e : CTL\n\nThomas GAWLITZA\, verimag\n\n\n« Combining Strategy Iteration w
 ith Semidefinite Programming for Abstract Interpretation » \n\nAbstract:\n
 \nWe present a practical strategy improvement algorithm for computing leas
 t solutions of fixpoint equation systems\, whose right-hand sides use orde
 r-concave operators and the maximum operator. These equation systems stric
 tly generalize systems of rational equations. We use our algorithm for com
 puting precise numerical invariants of programs by abstract interpretation
 . Thereby we consider the abstract domain of quadratic zones introduced by
  AdjÃ©...
DTSTART:20100309T100000
DTEND:20100309T120000
DURATION:PT2H0M0S
LOCATION:CTL
SUMMARY:Thomas GAWLITZA - Combining Strategy Iteration with Semidefinite Pr
 ogramming for Abstract Interpretation
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3343lJftfH@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Friday  5 March 2010 - CTL
= = = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = =
13:30 - Salle : CTL

M
 arc Poulhiès\, VERIMAG - DCS
http://www-verimag.imag.fr/~poulhies/

« Concept
 ion et Implantation de Système Fondé sur les Composants. Vers une Unificat
 ion des Paradigmes Génie Logiciel et Système. (Design and Implementation o
 f Component Based Systems. Towards a Unification of the Software Engineeri
 ng and the System Paradigms. ) » 

Résumé :

Cette thèse a été co-encadrée par
  le laboratoire MAPS/AMS de France Telecom R&D\n(aujourd'hui MAPS/SHINE) e
 t le laboratoire VERIMAG.\n\nLe développement de logiciels pour les systèm
 es embarqués présente de nombreux\ndéfis....
DTSTART:20100305T133000
DTEND:20100306T053000
DURATION:PT16H0M0S
LOCATION:CTL
SUMMARY:Marc Poulhiès - Conception et Implantation de Système Fondé sur les
  Composants. Vers une Unification des Paradigmes Génie Logiciel et Système
 . (Design and Implementation of Component Based Systems. Towards a Unifica
 tion of the Software Engineering and the System Paradigms. )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3344Svvtnd@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  4 March 2010 - Grande Salle de VER
 IMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = =
14:00 - Salle : Grande Salle de VERIMAG

Ondrej Sery\, Charles University
  Prague
http://dsrg.mff.cuni.cz/~sery/

« Code analysis with Blast  » 

Abstrac
 t:

The first part of the talk will present the Blast model checker\, which 
 has originated at UC Berkley (Ranjit Jhala\, Rupak Majumdar\, Gregoire Sut
 re) and has been thereafter developed also at other institutions\, e.g.\, 
 EPFL Lausanne (T. Henzinger)\, UC San Diego (Ranjit Jhala)\, UC Los Angele
 s (Rupak Majumdar)\, Simon Fraser University (Dirk Beyer).\n\nBlast is a c
 ounter-example guided abstraction refinement model checker for C...
DTSTART:20100304T140000
DTEND:20100304T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Ondrej Sery - Code analysis with Blast 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3345snVpcm@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Tuesday 16 February 2010 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBahareh Badban\, Uni
 versity of Konstanz\nhttp://www.inf.uni-konstanz.de/soft/members/badban/ 
 \n\n«  Automated Invariant Generation for the Verification of Real-Time Sy
 stems » \n\nRésumé :\n\n\n\n\n\nAbstract:\n\nAlthough real-time model chec
 king has significantly advanced the quality of\nsafety-critical systems\, 
 the demand for more rigorous verification methods is\nstill increasing. Th
 e modeling of many such systems requires dense time\ndomains to reflect th
 e fact that events may happen arbitrarily close to each\nother in actual a
 pplications....
DTSTART:20100216T140000
DTEND:20100216T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bahareh Badban -  Automated Invariant Generation for the Verificati
 on of Real-Time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3346k5EAvk@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Thursday  4 February 2010 - Amphi\n= = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n13:30 - Sa
 lle : Amphi\n\nMarius Bozga\, Verimag\nhttp://www-verimag.imag.fr/~bozga\n
 \n« Component-Based Construction of Real-Time Systems » \n\nAbstract:\n\nT
 he design of complex and reliable IT systems is a challenging engineering 
 problem.  In contrast to traditional engineering disciplines\, predictabil
 ity cannot be guaranteed at design time and a\nposteriori analyses are man
 datory for ensuring corectness and estimating runtime performances.\n\nDur
 ing the five past years\, I have contributed to the development of a syste
 m design methodology based on BIP - Behavior\, Interaction\, Priority - co
 mponent...
DTSTART:20100204T133000
DTEND:20100204T163000
DURATION:PT3H0M0S
LOCATION:Amphi
SUMMARY:Marius Bozga - Component-Based Construction of Real-Time Systems
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-334616unTz@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Friday 29 January 2010 - Amphi F018\, UFR IMA
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : Amphi F018\, UFR IMA\n\nDang Thao\, VERIMAG\n\n\n« Meth
 ods and tools for  Computer Aided Design of Embedded Systems  » \n\nAbstra
 ct:\n\nDue to an increasing use of computers\, there has been a dramatic r
 ise in interest in embedded systems\, that is systems in which the compute
 r interacts with the physical world. The main objective of my research has
  been to develop new analysis methods and tools\, with a focus on semi-for
 mal approaches (such as testing) and by exploring new application areas (s
 uch as\, analog and mixed-signal circuits and biological systems). In part
 icular\, my...
DTSTART:20100129T140000
DTEND:20100129T160000
DURATION:PT2H0M0S
LOCATION:Amphi F018\, UFR IMA
SUMMARY:Dang Thao - Methods and tools for  Computer Aided Design of Embedde
 d Systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-33471GazTU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 14 January 2010 - Grande Salle de
  VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nArnaud Sangnier\, Un
 iversite de Turin\nhttp://www.di.unito.it/~sangnier/\n\n« Reversal-bounded
  counter machines revisited » \n\nAbstract:\n\nWe extend the class of reve
 rsal-bounded counter machines by authorizing a finite number of alternatio
 ns between increasing and decreasing mode over a given bound. We prove tha
 t extended reversal-bounded counter machines also have effective semi-line
 ar reachability sets and enjoy the same properties as the original reversa
 l-bounded counter machines. We also prove that the property of being...
DTSTART:20100114T140000
DTEND:20100114T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Arnaud Sangnier - Reversal-bounded counter machines revisited
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3348EE6L2G@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n16:00 - Salle : Grande Salle de VERIMAG\n\nMatthias Althoff\, 
 Technische Universität München\n\n\n« Reachability Analysis of Nonlinear a
 nd Hybrid Systems with Zonotopes » \n\nAbstract:\n\nThe necessity of autom
 atic tools for the verification of dynamic systems is constantly increasin
 g due to the growing complexity of the technical world. A possible answer 
 to this problem is the verification of hybrid systems based on reachabilit
 y analysis. One of the biggest challenges in reachability analysis is the 
 curse of dimension. As a possible solution to this problem\, zonotopes hav
 e been...
DTSTART:20091119T160000
DTEND:20091119T170000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Matthias Althoff - Reachability Analysis of Nonlinear and Hybrid Sy
 stems with Zonotopes
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3349buJBu1@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 19 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBruce Krogh \, Dept
 . of Electrical and Computer Engineering\, Carn\n\n\n« Research Directions
  in Cyber-Physical Systems  » \n\nAbstract:\n\nLast year the U.S. National
  Science Foundation launched a new initiative in cyber-physical systems (C
 PS)\, which according to the program announcement “refers to the tight con
 joining of and coordination between computational and physical resources.”
  The first part of this talk will review the general CPS research agenda\,
  with some observations concerning the relationships between CPS and earli
 er...
DTSTART:20091119T140000
DTEND:20091119T160000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bruce Krogh  - Research Directions in Cyber-Physical Systems 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3350xo6Vvh@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 12 November 2009 - Grande Salle d
 e VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\n11:00 - Salle : Grande Salle de VERIMAG\n\nFlorent Garnier\, V
 ermimagg- Team DCS\nhttp://www-verimag.imag.fr/~fgarnier/\n\n« A classific
 ation of randomized fair strategies for studying termination of term rewri
 ting (A classification of randomized fair strategies for studying terminat
 ion of term rewriting) » \n\nAbstract:\n\nIn this talk\, we tackled the pr
 oblem of the probabilistic termination of infinite state space rule-based 
 programs when non-deterministic choices are solved using randomized strate
 gies. In this talk\, we consider the probabilistic termination of Term Rew
 rite...
DTSTART:20091112T110000
DTEND:20091112T114500
DURATION:PT0H45M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Florent Garnier - A classification of randomized fair strategies fo
 r studying termination of term rewriting (A classification of randomized f
 air strategies for studying termination of term rewriting)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3351cbzv2L@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Monday  9 November 2009 - CTL\n= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - Sal
 le : CTL\n\nYliès Falcone\, Vérimag\nhttp://www-verimag.imag.fr/~falcone\n
 \n« Etude et mise en oeuvre de méthodes de validation à l'exécution (Study
  and implementation of runtime validation techniques) » \n\nRésumé :\n\nL'
 étude de cette thèse porte sur trois méthodes de validation dynamiques : l
 es méthodes de vérification\, d'enforcement (mise en application)\, et de 
 test de propriétés lors de l'exécution des systèmes. Nous nous intéressero
 ns à ces approches en l'absence de spécification comportementale du systèm
 e à valider. Pour notre étude\, nous nous plaçons dans la...
DTSTART:20091109T140000
DTEND:20091109T170000
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:Yliès Falcone - Etude et mise en oeuvre de méthodes de validation à
  l'exécution (Study and implementation of runtime validation techniques)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3351gkIUK9@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 29 October 2009 - Grande Salle de V
 ERIMAG
= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = =
14:00 - Salle : Grande Salle de VERIMAG

Stephane Demri\, ENS CACHAN
htt
 p://www.lsv.ens-cachan.fr/~demri/

« Les problèmes de couverture et finitude
  pour les systèmes d'addition de vecteurs arborescents.  (The covering and
  boundedness problems for branching vector addition\nsystems ) » 

Résumé :

L
 es systèmes d'addition de vecteurs arborescents (BVAS) forment un modèle f
 ormel de calcul qui est\nutilisé par exemple en linguistique ou pour la vé
 rification de protocoles cryptographiques. Ce modèle a\naussi des  liens é
 troits avec des logiques de données...
DTSTART:20091029T140000
DTEND:20091029T160000
DURATION:PT2H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Stephane Demri - Les problèmes de couverture et finitude pour les s
 ystèmes d'addition de vecteurs arborescents.  (The covering and boundednes
 s problems for branching vector addition\nsystems )
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3352vtVU08@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 28 October 2009 - MJK
= = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle :
  MJK

Colas Le Guernic\, VERIMAG
http://www-verimag.imag.fr/~leguerni/

« Calcu
 l d'Atteignabilité des Systèmes Hybrides à Partie Continue Linéaire (Reach
 ability Analysis of Hybrid Systems with Linear Continuous Dynamics) » 

Résu
 mé :

Cette thèse est consacrée au calcul des états atteignables des système
 s linéaires et hybrides. \n\nLa première partie est consacrée aux systèmes
  linéaires. Après avoir présenté les méthodes existantes\, nous introduiso
 ns notre principale contribution: un nouveau schéma algorithmique pour l'a
 nalyse d'accessibilité des systèmes...
DTSTART:20091028T140000
DTEND:20091028T160000
DURATION:PT2H0M0S
LOCATION:MJK
SUMMARY:Colas Le Guernic - Calcul d'Atteignabilité des Systèmes Hybrides à 
 Partie Continue Linéaire (Reachability Analysis of Hybrid Systems with Lin
 ear Continuous Dynamics)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3353JmSOFV@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - Thesis - Wednesday 21 October 2009 - Amphithéâtre CTL
=
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14
 :00 - Salle : Amphithéâtre CTL

Aldric Degorre\, Vérimag
http://www-verimag.i
 mag.fr/~degorre/

« Langages formels: quelques aspects quantitatifs (On Some
  Quantitative Aspects of Formal Languages) » 

Résumé :

Dans cette thèse nous
  présentons trois directions de recherche assez différentes concernant les
  aspects quantitatifs des langages formels. \n\nLa première étudie des pro
 blèmes d'ordonnancement avec à la fois des dépendances entre tâches à ordo
 nnancer et des comportements infinis et imprévisibles: les flux de requête
 s appartenant à un langage...
DTSTART:20091021T140000
DTEND:20091021T170000
DURATION:PT3H0M0S
LOCATION:Amphithéâtre CTL
SUMMARY:Aldric Degorre - Langages formels: quelques aspects quantitatifs (O
 n Some Quantitative Aspects of Formal Languages)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3354XJVoVX@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 24 September 2009 - Grande Salle 
 de VERIMAG\n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 = = = = = =\n14:00 - Salle : Grande Salle de VERIMAG\n\nBageshri KARKARE\,
  Verimag\n\n\n«  Efficiency\, Precision\, Simplicity\, and Generality in I
 nterprocedural Data Flow Analysis. » \n\nAbstract:\n\nThe full call string
 s method is the most general\, simplest\, and most precise method of perfo
 rming context sensitive interprocedural data flow analysis. It remembers c
 ontexts using call strings. For full precision\, all call strings up to a 
 prescribed length must be constructed. Two limitations of this method are 
 (a) it cannot be used for frameworks with infinite lattices\, and (b) the 
 prescribed...
DTSTART:20090924T140000
DTEND:20090924T150000
DURATION:PT1H0M0S
LOCATION:Grande Salle de VERIMAG
SUMMARY:Bageshri KARKARE -  Efficiency\, Precision\, Simplicity\, and Gener
 ality in Interprocedural Data Flow Analysis.
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-335522VPXG@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Tuesday 15 September 2009 - CTL
= = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle 
 : CTL

Dino Distefano\, Queen Mary University\, London
http://www.dcs.qmul.ac
 .uk/~ddino/ddino_homepage/About_me.html

« Compositional Shape Analysis by m
 eans of Bi-Abduction » 

Abstract:

This talk describes a compositional shape 
 analysis\, where each procedure is analyzed independently of its callers.
 \nThe analysis uses an abstract domain based on a restricted fragment of s
 eparation logic\,\nand assigns a collection of Hoare triples to each proce
 dure\; the triples  provide an over-approximation of  data structure usage
 .\nCompositionality brings its usual benefits --increased...
DTSTART:20090915T140000
DTEND:20090915T150000
DURATION:PT1H0M0S
LOCATION:CTL
SUMMARY:Dino Distefano - Compositional Shape Analysis by means of Bi-Abduct
 ion
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3356k2wUp8@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 25 June 2009 - VERIMAG\n= = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:00 - 
 Salle : VERIMAG\n\nZvonimir Rakamaric\, University of British Columbia \nh
 ttp://www.cs.ubc.ca/~zrakamar/\n\n«  Static and Precise Detection of Concu
 rrency Errors in Systems Code Using SMT Solvers  » \n\nAbstract:\n\nContex
 t-bounded analysis is an attractive approach to verification of\nconcurren
 t programs. Bounding the number of contexts executed per\nthread not only 
 reduces the asymptotic complexity\, but also the\ncomplexity increases slo
 wly from checking a purely sequential program.\nLal and Reps provided a me
 thod for reducing the\ncontext-bounded verification of a concurrent boolea
 n program to...
DTSTART:20090625T100000
DTEND:20090625T110000
DURATION:PT1H0M0S
LOCATION:VERIMAG
SUMMARY:Zvonimir Rakamaric -  Static and Precise Detection of Concurrency E
 rrors in Systems Code Using SMT Solvers 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3356EK79v3@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Thesis
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - Thesis - Thursday 25 June 2009 - Ampithéatre CTL\n= 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n1
 4:00 - Salle : Ampithéatre CTL\n\nScott Cotton\, Verimag\n\n\n« Sur Quelqu
 es Problèmes de la Satisfiabilité (On Some Problems in Satisfiability Solv
 ing) » \n\nRésumé :\n\nUn nombre croissant d'applications\, telles que la 
 vérification et l'optimisation non-linéaire\, fait usage des solveurs SAT 
 et SMT. Malgré des progrès récents dans le développement de techniques de 
 SAT et SMT\, les problèmes pour lesquels les solveurs SAT and SMT sont uti
 lisés sont souvent difficiles et 'intractables'\, et la performance de ces
  solveurs est difficile à estimer. En consequence\, le développement...
DTSTART:20090625T140000
DTEND:20090625T150000
DURATION:PT1H0M0S
LOCATION:Ampithéatre CTL
SUMMARY:Scott Cotton - Sur Quelques Problèmes de la Satisfiabilité (On Some
  Problems in Satisfiability Solving)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3357G7ezmu@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:HDR
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - HDR - Friday 19 June 2009 - CTL\n= = = = = = = = = =
  = = = = = = = = = = = = = = = = = = = = = = = = = = =\n10:15 - Salle : CT
 L\n\nDavid Monniaux\, CNRS / VERIMAG\nhttp://www-verimag.imag.fr/~monniaux
 /\n\n« Analyse statique : de la théorie à la pratique (Static analysis: fr
 om theory to practice) » \n\nRésumé :\n\nIl est important que les logiciel
 s pilotant les systèmes critiques (avions\, centrales nucléaires\, etc.) f
 onctionnent correctement — alors que la plupart des systèmes informatisés 
 de la vie courante (micro-ordinateur\, distributeur de billets\, téléphone
  portable) ont des dysfonctionnements visibles. Il ne s'agit pas là d'un s
 imple problème d'ingéniérie : on sait depuis les travaux de Turing...
DTSTART:20090619T101500
DTEND:20090619T131500
DURATION:PT3H0M0S
LOCATION:CTL
SUMMARY:David Monniaux - Analyse statique : de la théorie à la pratique (St
 atic analysis: from theory to practice)
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-335881rscS@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday 14 May 2009 - CTL
= = = = = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle : CTL
 

Florian Kammueller\, Technische Universitat Berlin
http://user.cs.tu-berlin
 .de/~flokam/

« ASPfun: un calcul pour des objets distribués  » 

Résumé :

La p
 rogrammation d'un grand réseau d' ordinateurs distribués\,\ntel que l'Inte
 rnet\, pose de nouveaux problèmes de sécurité.\nJe présente dans cet expos
 é le langage formel ASPfun pour les\nobjets distribués asynchrones.\n\nASP
 fun élargit la théorie des objets par une communication requêtes-réponse b
 asée sur des futurs. Un futur représente le\nrésultat encore attendu d'une
  requête donnée\; la réponse...
DTSTART:20090514T140000
DTEND:20090514T150000
DURATION:PT1H0M0S
LOCATION:CTL
SUMMARY:Florian Kammueller - ASPfun: un calcul pour des objets distribués 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3359UD4XaU@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  7 May 2009 - VERIMAG\n= = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 - S
 alle : VERIMAG\n\nVillard Jules\, LSV\, Cachan\nhttp://www.lsv.ens-cachan.
 fr/~villard/\n\n« Proving Copyless Message Passing  » \n\nAbstract:\n\nHan
 dling concurrency using a shared memory and locks can be tedious and\nerro
 r-prone. One solution is to use message-passing instead. We study here\na 
 particular flavor that makes the ownership transfer of messages explicit.
 \nIn this case\, ownership of the heap region representing the content of 
 a\nmessage is lost upon sending\, which can lead to efficient implementati
 ons.\nWe have defined a proof system for a concurrent imperative programmi
 ng\nlanguage...
DTSTART:20090507T140000
DTEND:20090507T150000
DURATION:PT1H0M0S
LOCATION:VERIMAG
SUMMARY:Villard Jules - Proving Copyless Message Passing 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3359ozU0JZ@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday 16 April 2009 - VERIMAG/AMPHI CTL
 \n= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = 
 =\n14:00 - Salle : VERIMAG/AMPHI CTL\n\nChristophe Guillon\, STMicroelectr
 onics \nhttp://www.st.com/stonline/\n\n« Les représentations SSA et Psi-SS
 A  » \n\nRésumé :\n\nLa représentation SSA (Static Single Assignment) est 
 fréquemment\nutilisée dans les compilateurs récents pour l'implémentation 
 efficace\nd'algorithmes d'optimisations. Dans cette représentation\, chaqu
 e\ndéfinition d'une variable\, statiquement dans un programme\, est\nrenom
 mée de manière unique\, et des opérations PHI sont introduites\npour fusio
 nner des définitions venant de flots de contrôle différents.\n\nLa...
DTSTART:20090416T140000
DTEND:20090416T150000
DURATION:PT1H0M0S
LOCATION:VERIMAG/AMPHI CTL
SUMMARY:Christophe Guillon - Les représentations SSA et Psi-SSA 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3360jgPRG3@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  9 April 2009 - VERIMAG
= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle
  : VERIMAG

Alexandre Donzé\, VERIMAG
http://www-verimag.imag.fr/~donze/

«  	 C
 alcul numérique d'ensembles atteignables pour les systèmes hybrides et app
 lications  » 

Résumé :

Le calcul d'ensembles atteignables pour les systèmes 
 hybrides à \ndynamiques continues nonlinéaires est un problème toujours di
 fficile.\nLe principal obstacle en est la malédiction de la dimensionalité
 \, qui\ndésigne le fait que le nombre d'opérations nécessaires à  sa résol
 ution\ncroît de manière exponentielle avec le nombre de variables continue
 s.\nDans le cas linéaire\, on s'en sort...
DTSTART:20090409T140000
DTEND:20090409T150000
DURATION:PT1H0M0S
LOCATION:VERIMAG
SUMMARY:Alexandre Donzé -  	 Calcul numérique d'ensembles atteignables pour 
 les systèmes hybrides et applications 
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3361r55EsL@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =
Seminar - VERIMAG - Thursday  2 April 2009 - VERIMAG
= = = = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
14:00 - Salle
  : VERIMAG

Domagoj Babic\, Fujitsu Labs America
http://www.domagoj-babic.com
 /

« Scalable and Precise Extended Static Checking » 

Abstract:

Automatic soft
 ware verification and bug finding have been a long-held\ngoal in software 
 engineering.  Many techniques exist\, trading off\nvarying levels of autom
 ation\, coverage\, precision\, and scalability.\nExtended Stating Checking
  (ESC)\, a combination of static checking and\ndecision procedures has eme
 rged as a powerful technique for improving\nsoftware reliability.  A major
  limitation of the ESC paradigm is that\nit requires...
DTSTART:20090402T140000
DTEND:20090402T150000
DURATION:PT1H0M0S
LOCATION:VERIMAG
SUMMARY:Domagoj Babic - Scalable and Precise Extended Static Checking
END:VEVENT
BEGIN:VEVENT
UID:20260703T152041UTC-3362jNnKVg@129.88.40.24
DTSTAMP:20260703T152041Z
CATEGORIES:Veri_sem
DESCRIPTION:= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
  = = = = =\nSeminar - VERIMAG - Thursday  5 March 2009 - VERIMAG\n= = = = 
 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =\n14:00 -
  Salle : VERIMAG\n\nThomas Gawlitza    \, Technische Universität München\n
 http://www2.informatik.tu-muenchen.de/~gawlitza/\n\n« Precise Relational I
 nvariants Through Strategy Iteration  » \n\nAbstract:\n\nWe present a prac
 tical algorithm for computing exact least solutions\nof systems of equatio
 ns over the rationals with addition\,\nmultiplication with positive consta
 nts\, minimum and maximum. The\nalgorithm is based on strategy improvement
  combined with solving two\nlinear programming problems for each selected 
 strategy. We apply our\ntechnique to compute the abstract least fixpoint s
 emantics of...
DTSTART:20090305T140000
DTEND:20090305T150000
DURATION:PT1H0M0S
LOCATION:VERIMAG
SUMMARY:Thomas Gawlitza     - Precise Relational Invariants Through Strateg
 y Iteration 
END:VEVENT
END:VCALENDAR