The domain of Real-Time Embedded (RTE) systems was ackowledged as being largely influencial
on many feature additions to the upcoming UML2.0 standard [1]. Work on UML1.4 Scheduling, Performance
& Time(SPT) profile also goes in that direction. Still, the generic paradigms underlying these
modeling efforts is that of software components, running on a real-time OSs with physical time constraints
and middleware (e.g., RT-Corba) concerns. In other areas of Embedded System Design other
paradigms are at work, owing to codesign techniques at the border between software and hardware, or
discrete time mathematical engineering (MATLAB/Simulink) and DSP algorithms, etc. The paradigm of
Synchronous Reactive (S/R) systems [2, 3], with discrete logical time and behavior decomposition into
instantaneous reactions, proved quite natural in such areas to model mixed HW/SW System-Level Design
(SLD). We describe here some of the modeling paradigms needed for a true S/R model framework, and
corresponding diagrammatic interpretations.