NEVA: Networks on chips design driven by video and distributed applications
| Circuits for electronic devices are becoming so complex that they are expected to reach a billion transistors by the end of 2008. Traditional silicon chip architectures are nearing the limit of their performance in such applications so the NEVA project was set up to introduce innovative network-on-chip designs, based on multiple processors and asynchronous circuitry. The goal is to allow designers and application engineers to cope with emerging applications resulting from multimedia/communication convergence. In the first instance, datastream applications, mainly from the video environment, will be used as drivers, with a targeted computing power around one giga operations per second per chip. |
| Project profile |
| Posters |
| MEDEA+ Forum 2005, Barcelona, Nov. 21-22, 2005. Poster |
| MEDEA+ Forum 2006, Monaco, Nov. 28-29, 2006. Poster |
| MEDEA+ Forum 2007, Budapest, Nov. 26-27, 2007. Poster |
| VERIMAG Publications |
| * A. Basu, S. Yovine, M. Zanconi. An approach to derivation of component-based implementations from data-oriented specifications. APGES 2007, Oct. 4th 2007, Salzburg, Austria. pdf |
| * I. Assayad, S. Yovine. Modelling and Exploration Environment for Application Specific Multiprocessor Systems. HASE 2007. Dallas, Texas, 2007. IEEE Computer Society Press. (short paper) pdf |
| * I. Assayad, S. Yovine. Methodology and tools for performance analysis of embedded multiprocessor industrial applications. ARTIST International Workshop on Tool Platforms for Modeling, Aanalisis and Validation of Embedded Ssystems 2007. Berlin, Germany, 2007. (short paper) pdf |
| * I. Assayad, S. Yovine. P-Ware: A precise and scalable component-based simulation tool for embedded multiprocessor industrial applications. EUROMICRO Conference on Digital System Design (DSD 2007), August 2007. IEEE Computer Society Press. pdf |
| * I. Assayad, S. Yovine. A scalable framework for modelling and performance analysis of multiprocessor embedded systems: models and benefits. In Proc. of "7th Intl. Conf. on New Technologies of Distributed Systems (NOTERE 2007)", 2007. pdf |
| * I. Assayad, S. Yovine. System-Platform Simulation Model Applied to Performance Analysis of Multi-processor Video Encoding. In Proceedings of "IEEE Symposium on Industrial Embedded Systems (IES 2006)". October 2006. IEEE Computer Society Press. pdf |
| * I. Assayad, V. Bertin, F-X. Defaut, Ph.Gerner, O. Quevreux, S. Yovine. Jahuel: A formal framework for software synthesis. In Proceedings of ICFEM 2005 Seventh International Conference on Formal Engineering Methods. 1-4 November 2005, Manchester, UK. LNCS 3785, Pages: 204-218. Springer, 2005. pdf |