Dataflow multi-core scheduling using SMT solvers

by Pranav Tendulkar   (former PhD student at Verimag)

 introduction, download

with Oded Maler and Petro Poplavko




PhD Thesis.

P. Tendulkar, Mapping and Scheduling on Multi-core Processors using SMT Solvers. Oct 2014


Research Papers and Technical Reports

[1]  P. Tendulkar, P. Poplavko, J. Maselbas, I. Galanommatis, O. Maler, A Runtime Environment for Real-time Streaming Applications on Clustered Multi-cores. VERIMAG Tech. Rep. TR‑2015‑6, 2015.

[2]  P. Tendulkar, P. Poplavko, J. Maselbas, and O. Maler, Pipelined Scheduling of Acyclic SDF Graphs using SMT Solvers. In Proc. IDEA-2015, Investigating Data Flow modeling for Embedded computing Architectures, HiPEAC workshop, 2015 (SLIDES).

[3]  P. Tendulkar, P. Poplavko, I. Galanommatis, and O. Maler, Many-Core Scheduling of Data Parallel Applications using SMT Solvers. In Proc. DSD-2014, Euromicro Conference on Digital System Design, IEEE, 2014. (SLIDES)

[4]  P. Tendulkar, P. Poplavko, and O. Maler, Symmetry Breaking for Multicriteria Mapping and Scheduling on Multicores. In Proc. FORMATS-2013, Int. Conf. Formal Modeling and Analysis of Timed Systems, Springer, 2013. (SLIDES)

[5]  P. Tendulkar, P. Poplavko, O. Maler, Strictly Periodic Scheduling of Acyclic Synchronous Dataflow Graphs using SMT Solvers. VERIMAG Tech. Rep. TR-2014-5, 2014.

[6]  P. Tendulkar, P. Poplavko, O. Maler, Symmetry Breaking for Multi-criteria Mapping and Scheduling on Multicores. VERIMAG Tech. Rep. TR-2013-3, 2013.