Radu Iosif

CNRS researcher (CR1)
Distributed and Complex Systems Group
VERIMAG

Radu [dot] Iosif [at] imag [dot] fr

Research

• Software verification

• Publications

Teaching

• Logic and Automata Theory (SNS Bucharest, UJF Grenoble, EPFL Lausanne)

Projects

• AVERILES (RNTL French National Project)

• VERDYN (French National Young Researchers Grant)

• DYNAMO (ACI French National Project)

Events

• TASE 2009 SPIN 2009 SPIN 2007 FMCO 2006 INFINITY 2006 ICCP 2006 COSMICAH 2005

Tools

• FLATA a tool for the analysis of counter automata

• ARTMC a tool for the verification of programs with complex pointer structures
  

• L2CA converts programs with lists into counter automata

• dSPIN an extension of the model checker SPIN

• BANDERA project home page

• JCAT a deadlock detection tool for Java(TM) multithreading programs

• JSUIF a program internal representation support library entirely written in Java

• YAV yet another verifier for Java(TM) concurrent programs

Last updated Apr 2009 by Radu Iosif