Researcher - FETLAS (ex. RSD)
  • University Grenoble-Alpes, France
  • VERIMAG Lab. Office 218
  • Bâtiment IMAG, 700 Avenue Centrale
  • 38400 Saint-Martin-d’Hères

"When the correctness of a program, its compiler, and the hardware of the computer have all been established with mathematical certainty, it will be possible to place great reliance on the results of the program, and predict their properties with a confidence limited only by the reliability of the electronics", Charles Antony Richard Hoare, 1969

Career Summary

Dr. Abdelhakim Baouya is a Ph.D. in Computer engineering supervised by Otmane Ait Mohamed from CONCORDIA University, CANADA, and Djamal Bennouar with the financial support of Algerian Ministry of Higher Education and Scientific Research since May 2016. Dr. BAOUYA also holds a Master of research in software engineering from the University of BLIDA in Algeria. Currently, Dr. Baouya is a researcher at Verimag laboratory, University of Grenoble Alpes. He is working on Software Architecture specification (UML/MARTE, SysML, AADL, Autofocus AF3), Formal verification, Code generation and deployment for IoT. He is interested in developing formal methods, techniques, and tools for the System-level Design of Embedded and Cyber-Physical Systems. Some of his interests are Model-based Design, Dependability Analysis, Stochastic Component-based Design, Statistical/Probabilistic Model-checking. He is serving as a reviewer and PC member of SSCC 2020, CPS-IoT 2020, IEA/AIE2021, SIAS 2021, SCPS2021. Dr. Baouya is an expert in Eclipse Plugin & Sirius development.

European projects :

1. Brain-IoT (2018-2021)

2. CPS4EU (2020-2022)

3. Foceta (2021-2023)