@phdthesis{Moy14a,
title = { High-level Models for Embedded Systems },
author = {Moy, Matthieu},
year = {2014},
address = {Verimag},
type = {Habilitation \`a Diriger des Recherches ({HDR})},
school = {Univ. Grenoble Alpes, VERIMAG, F-38000 Grenoble, France},
team = {SYNC},
}
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- Seminars
- 16 May 2024 Gaiyun Liu: Modeling, analysis, and supervisory control of networked discrete event systems
- 30 May 2024 Mohamed Maghenem: A hybrid-systems framework for distributed gradient-based estimation
- 27 June 2024 Nicolas Chappe: Tba (toward a verified compilation infrastructure for concurrent programs)
Seminars
New publications
- Some Recent Publications
- David Monniaux, Sylvain Boulmé: Chamois: agile development of CompCert extensions for optimization and security
- David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel: Testing a Formally Verified Compiler
- Aina Rasoldier, Jacques Combaz, Alain Girault, Kevin Marquet, Sophie Quinton: Assessing the Potential of Carpooling for Reducing Vehicle Kilometers Traveled
- Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel B. Sant'Anna: Model Checking of Distributed Algorithms using Synchronous Programs
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- [Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
- [Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences